04dc82e116
Based on 1 normalized pattern(s): this program is free software you can distribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 24 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190115.872212424@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
77 lines
2.1 KiB
C
77 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Purna Chandra Mandal,<purna.mandal@microchip.com>
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* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
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*/
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#ifndef __MICROCHIP_CLK_PIC32_H_
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#define __MICROCHIP_CLK_PIC32_H_
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#include <linux/clk-provider.h>
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/* PIC32 clock data */
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struct pic32_clk_common {
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struct device *dev;
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void __iomem *iobase;
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spinlock_t reg_lock; /* clock lock */
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};
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/* System PLL clock */
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struct pic32_sys_pll_data {
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struct clk_init_data init_data;
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const u32 ctrl_reg;
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const u32 status_reg;
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const u32 lock_mask;
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};
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/* System clock */
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struct pic32_sys_clk_data {
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struct clk_init_data init_data;
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const u32 mux_reg;
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const u32 slew_reg;
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const u32 *parent_map;
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const u32 slew_div;
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};
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/* Reference Oscillator clock */
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struct pic32_ref_osc_data {
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struct clk_init_data init_data;
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const u32 ctrl_reg;
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const u32 *parent_map;
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};
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/* Peripheral Bus clock */
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struct pic32_periph_clk_data {
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struct clk_init_data init_data;
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const u32 ctrl_reg;
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};
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/* External Secondary Oscillator clock */
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struct pic32_sec_osc_data {
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struct clk_init_data init_data;
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const u32 enable_reg;
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const u32 status_reg;
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const u32 enable_mask;
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const u32 status_mask;
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const unsigned long fixed_rate;
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};
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extern const struct clk_ops pic32_pbclk_ops;
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extern const struct clk_ops pic32_sclk_ops;
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extern const struct clk_ops pic32_sclk_no_div_ops;
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extern const struct clk_ops pic32_spll_ops;
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extern const struct clk_ops pic32_roclk_ops;
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extern const struct clk_ops pic32_sosc_ops;
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struct clk *pic32_periph_clk_register(const struct pic32_periph_clk_data *data,
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struct pic32_clk_common *core);
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struct clk *pic32_refo_clk_register(const struct pic32_ref_osc_data *data,
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struct pic32_clk_common *core);
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struct clk *pic32_sys_clk_register(const struct pic32_sys_clk_data *data,
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struct pic32_clk_common *core);
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struct clk *pic32_spll_clk_register(const struct pic32_sys_pll_data *data,
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struct pic32_clk_common *core);
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struct clk *pic32_sosc_clk_register(const struct pic32_sec_osc_data *data,
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struct pic32_clk_common *core);
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#endif /* __MICROCHIP_CLK_PIC32_H_*/
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