5852b1365d
The driver retrieves the clock tree by querying the ATF for the clock names, the clock topology, the parents and other attributes. The driver needs to unmarshal the responses. The definition of the fields in the firmware responses to the queries is inconsistent. Some are specified as a mask, some as a shift, and by the length of the previous field. Define C structs for the entire firmware responses to avoid passing pointers to arrays of an implicit size and make the format of the responses to the queries obvious. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Reviewed-by: Jolly Shah <jolly.shah@xilinx.com> [sboyd@kernel.org: Drop 0 initializers because sparse complains] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
63 lines
1.4 KiB
C
63 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright (C) 2016-2018 Xilinx
|
|
*/
|
|
|
|
#ifndef __LINUX_CLK_ZYNQMP_H_
|
|
#define __LINUX_CLK_ZYNQMP_H_
|
|
|
|
#include <linux/spinlock.h>
|
|
|
|
#include <linux/firmware/xlnx-zynqmp.h>
|
|
|
|
enum topology_type {
|
|
TYPE_INVALID,
|
|
TYPE_MUX,
|
|
TYPE_PLL,
|
|
TYPE_FIXEDFACTOR,
|
|
TYPE_DIV1,
|
|
TYPE_DIV2,
|
|
TYPE_GATE,
|
|
};
|
|
|
|
/**
|
|
* struct clock_topology - Clock topology
|
|
* @type: Type of topology
|
|
* @flag: Topology flags
|
|
* @type_flag: Topology type specific flag
|
|
*/
|
|
struct clock_topology {
|
|
u32 type;
|
|
u32 flag;
|
|
u32 type_flag;
|
|
};
|
|
|
|
struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
|
|
const char * const *parents,
|
|
u8 num_parents,
|
|
const struct clock_topology *nodes);
|
|
|
|
struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
|
|
const char * const *parents,
|
|
u8 num_parents,
|
|
const struct clock_topology *nodes);
|
|
|
|
struct clk_hw *zynqmp_clk_register_divider(const char *name,
|
|
u32 clk_id,
|
|
const char * const *parents,
|
|
u8 num_parents,
|
|
const struct clock_topology *nodes);
|
|
|
|
struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
|
|
const char * const *parents,
|
|
u8 num_parents,
|
|
const struct clock_topology *nodes);
|
|
|
|
struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name,
|
|
u32 clk_id,
|
|
const char * const *parents,
|
|
u8 num_parents,
|
|
const struct clock_topology *nodes);
|
|
|
|
#endif
|