![Vignesh Raghavendra](/assets/img/avatar_default.png)
On TI's AM654/J721e SoCs, certain clocks can be gated/ungated by setting a single bit in SoC's System Control Module registers. Sometime more than one clock control can be in the same register. Add a driver to support such clocks using syscon framework. Driver currently supports controlling EHRPWM's TimeBase clock(TBCLK) for AM654 SoC. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lkml.kernel.org/r/20200227053529.16479-3-vigneshr@ti.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
5 lines
174 B
Makefile
5 lines
174 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
|
|
obj-$(CONFIG_COMMON_CLK_KEYSTONE) += pll.o gate.o
|
|
obj-$(CONFIG_TI_SCI_CLK) += sci-clk.o
|
|
obj-$(CONFIG_TI_SYSCON_CLK) += syscon-clk.o
|