b920de1b77
Add architecture support for the MN10300/AM33 CPUs produced by MEI to the kernel. This patch also adds board support for the ASB2303 with the ASB2308 daughter board, and the ASB2305. The only processor supported is the MN103E010, which is an AM33v2 core plus on-chip devices. [akpm@linux-foundation.org: nuke cvs control strings] Signed-off-by: Masakazu Urade <urade.masakazu@jp.panasonic.com> Signed-off-by: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
192 lines
5.2 KiB
ArmAsm
192 lines
5.2 KiB
ArmAsm
###############################################################################
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#
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# Virtual DMA driver for MN10300 serial ports
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#
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# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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# Written by David Howells (dhowells@redhat.com)
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public Licence
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# as published by the Free Software Foundation; either version
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# 2 of the Licence, or (at your option) any later version.
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#
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###############################################################################
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#include <linux/sys.h>
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#include <linux/linkage.h>
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#include <asm/page.h>
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#include <asm/smp.h>
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#include <asm/cpu-regs.h>
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#include <asm/frame.inc>
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#include <asm/timer-regs.h>
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#include <asm/proc/cache.h>
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#include <asm/unit/timex.h>
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#include "mn10300-serial.h"
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#define SCxCTR 0x00
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#define SCxICR 0x04
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#define SCxTXB 0x08
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#define SCxRXB 0x09
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#define SCxSTR 0x0c
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#define SCxTIM 0x0d
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.text
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###############################################################################
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#
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# serial port interrupt virtual DMA entry point
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# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
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#
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###############################################################################
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.balign L1_CACHE_BYTES
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ENTRY(mn10300_serial_vdma_interrupt)
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or EPSW_IE,psw # permit overriding by
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# debugging interrupts
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movm [d2,d3,a2,a3,exreg0],(sp)
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movhu (IAGR),a2 # see if which interrupt is
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# pending
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and IAGR_GN,a2
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add a2,a2
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add mn10300_serial_int_tbl,a2
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mov (a2+),a3
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mov (__iobase,a3),e2
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mov (a2),a2
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jmp (a2)
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###############################################################################
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#
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# serial port receive interrupt virtual DMA entry point
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# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
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# - stores data/status byte pairs in the ring buffer
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# - induces a scheduler tick timer interrupt when done, which we then subvert
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# on entry:
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# A3 struct mn10300_serial_port *
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# E2 I/O port base
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#
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###############################################################################
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ENTRY(mn10300_serial_vdma_rx_handler)
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mov (__rx_icr,a3),e3
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mov GxICR_DETECT,d2
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movbu d2,(e3) # ACK the interrupt
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movhu (e3),d2 # flush
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mov (__rx_inp,a3),d3
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mov d3,a2
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add 2,d3
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and MNSC_BUFFER_SIZE-1,d3
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mov (__rx_outp,a3),d2
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cmp d3,d2
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beq mnsc_vdma_rx_overflow
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mov (__rx_buffer,a3),d2
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add d2,a2
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movhu (SCxSTR,e2),d2
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movbu d2,(1,a2)
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movbu (SCxRXB,e2),d2
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movbu d2,(a2)
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mov d3,(__rx_inp,a3)
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bset MNSCx_RX_AVAIL,(__intr_flags,a3)
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mnsc_vdma_rx_done:
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mov (__tm_icr,a3),a2
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mov GxICR_LEVEL_6|GxICR_ENABLE|GxICR_REQUEST|GxICR_DETECT,d2
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movhu d2,(a2) # request a slow interrupt
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movhu (a2),d2 # flush
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movm (sp),[d2,d3,a2,a3,exreg0]
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rti
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mnsc_vdma_rx_overflow:
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bset MNSCx_RX_OVERF,(__intr_flags,a3)
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bra mnsc_vdma_rx_done
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###############################################################################
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#
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# serial port transmit interrupt virtual DMA entry point
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# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
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# - retrieves data bytes from the ring buffer and passes them to the serial port
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# - induces a scheduler tick timer interrupt when done, which we then subvert
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# A3 struct mn10300_serial_port *
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# E2 I/O port base
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#
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###############################################################################
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.balign L1_CACHE_BYTES
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ENTRY(mn10300_serial_vdma_tx_handler)
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mov (__tx_icr,a3),e3
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mov GxICR_DETECT,d2
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movbu d2,(e3) # ACK the interrupt
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movhu (e3),d2 # flush
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btst 0x01,(__tx_break,a3) # handle transmit break request
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bne mnsc_vdma_tx_break
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movbu (SCxSTR,e2),d2 # don't try and transmit a char if the
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# buffer is not empty
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btst SC01STR_TBF,d2 # (may have tried to jumpstart)
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bne mnsc_vdma_tx_noint
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movbu (__tx_xchar,a3),d2 # handle hi-pri XON/XOFF
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or d2,d2
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bne mnsc_vdma_tx_xchar
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mov (__tx_info_buffer,a3),a2 # get the uart_info struct for Tx
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mov (__xmit_tail,a2),d3
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mov (__xmit_head,a2),d2
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cmp d3,d2
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beq mnsc_vdma_tx_empty
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mov (__xmit_buffer,a2),d2 # get a char from the buffer and
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# transmit it
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movbu (d3,d2),d2
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movbu d2,(SCxTXB,e2) # Tx
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inc d3 # advance the buffer pointer
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and __UART_XMIT_SIZE-1,d3
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mov (__xmit_head,a2),d2
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mov d3,(__xmit_tail,a2)
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sub d3,d2 # see if we've written everything
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beq mnsc_vdma_tx_empty
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and __UART_XMIT_SIZE-1,d2 # see if we just made a hole
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cmp __UART_XMIT_SIZE-2,d2
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beq mnsc_vdma_tx_made_hole
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mnsc_vdma_tx_done:
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mov (__tm_icr,a3),a2
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mov GxICR_LEVEL_6|GxICR_ENABLE|GxICR_REQUEST|GxICR_DETECT,d2
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movhu d2,(a2) # request a slow interrupt
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movhu (a2),d2 # flush
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mnsc_vdma_tx_noint:
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movm (sp),[d2,d3,a2,a3,exreg0]
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rti
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mnsc_vdma_tx_empty:
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mov +(GxICR_LEVEL_1|GxICR_DETECT),d2
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movhu d2,(e3) # disable the interrupt
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movhu (e3),d2 # flush
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bset MNSCx_TX_EMPTY,(__intr_flags,a3)
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bra mnsc_vdma_tx_done
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mnsc_vdma_tx_break:
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movhu (SCxCTR,e2),d2 # turn on break mode
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or SC01CTR_BKE,d2
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movhu d2,(SCxCTR,e2)
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mov +(GxICR_LEVEL_1|GxICR_DETECT),d2
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movhu d2,(e3) # disable transmit interrupts on this
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# channel
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movhu (e3),d2 # flush
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bra mnsc_vdma_tx_noint
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mnsc_vdma_tx_xchar:
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bclr 0xff,(__tx_xchar,a3)
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movbu d2,(SCxTXB,e2)
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bra mnsc_vdma_tx_done
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mnsc_vdma_tx_made_hole:
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bset MNSCx_TX_SPACE,(__intr_flags,a3)
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bra mnsc_vdma_tx_done
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