![John Garry](/assets/img/avatar_default.png)
Add path to send ssp command to HW. Signed-off-by: John Garry <john.garry@huawei.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
315 lines
6.4 KiB
C
315 lines
6.4 KiB
C
/*
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* Copyright (c) 2015 Linaro Ltd.
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* Copyright (c) 2015 Hisilicon Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#ifndef _HISI_SAS_H_
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#define _HISI_SAS_H_
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#include <linux/dmapool.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <scsi/libsas.h>
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#define DRV_VERSION "v1.0"
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#define HISI_SAS_MAX_PHYS 9
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#define HISI_SAS_MAX_QUEUES 32
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#define HISI_SAS_QUEUE_SLOTS 512
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#define HISI_SAS_MAX_ITCT_ENTRIES 4096
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#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
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#define HISI_SAS_COMMAND_ENTRIES 8192
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#define HISI_SAS_STATUS_BUF_SZ \
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(sizeof(struct hisi_sas_err_record) + 1024)
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#define HISI_SAS_COMMAND_TABLE_SZ \
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(((sizeof(union hisi_sas_command_table)+3)/4)*4)
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#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
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#define HISI_SAS_NAME_LEN 32
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enum {
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PORT_TYPE_SAS = (1U << 1),
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PORT_TYPE_SATA = (1U << 0),
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};
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enum dev_status {
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HISI_SAS_DEV_NORMAL,
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HISI_SAS_DEV_EH,
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};
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struct hisi_sas_phy {
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struct hisi_hba *hisi_hba;
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struct hisi_sas_port *port;
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struct asd_sas_phy sas_phy;
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struct sas_identify identify;
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struct timer_list timer;
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struct work_struct phyup_ws;
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u64 port_id; /* from hw */
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u64 dev_sas_addr;
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u64 phy_type;
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u64 frame_rcvd_size;
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u8 frame_rcvd[32];
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u8 phy_attached;
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u8 reserved[3];
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enum sas_linkrate minimum_linkrate;
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enum sas_linkrate maximum_linkrate;
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};
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struct hisi_sas_port {
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struct asd_sas_port sas_port;
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u8 port_attached;
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u8 id; /* from hw */
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struct list_head list;
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};
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struct hisi_sas_cq {
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struct hisi_hba *hisi_hba;
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int id;
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};
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struct hisi_sas_device {
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enum sas_device_type dev_type;
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u64 device_id;
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u64 running_req;
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u8 dev_status;
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};
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struct hisi_sas_slot {
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struct list_head entry;
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struct sas_task *task;
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struct hisi_sas_port *port;
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u64 n_elem;
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int dlvry_queue;
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int dlvry_queue_slot;
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int idx;
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void *cmd_hdr;
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dma_addr_t cmd_hdr_dma;
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void *status_buffer;
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dma_addr_t status_buffer_dma;
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void *command_table;
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dma_addr_t command_table_dma;
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struct hisi_sas_sge_page *sge_page;
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dma_addr_t sge_page_dma;
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};
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struct hisi_sas_tmf_task {
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u8 tmf;
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u16 tag_of_task_to_be_managed;
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};
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struct hisi_sas_hw {
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int (*hw_init)(struct hisi_hba *hisi_hba);
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void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
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int (*get_free_slot)(struct hisi_hba *hisi_hba, int *q, int *s);
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void (*start_delivery)(struct hisi_hba *hisi_hba);
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int (*prep_ssp)(struct hisi_hba *hisi_hba,
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struct hisi_sas_slot *slot, int is_tmf,
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struct hisi_sas_tmf_task *tmf);
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int complete_hdr_size;
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};
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struct hisi_hba {
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/* This must be the first element, used by SHOST_TO_SAS_HA */
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struct sas_ha_struct *p;
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struct platform_device *pdev;
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void __iomem *regs;
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struct regmap *ctrl;
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u32 ctrl_reset_reg;
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u32 ctrl_reset_sts_reg;
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u32 ctrl_clock_ena_reg;
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u8 sas_addr[SAS_ADDR_SIZE];
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int n_phy;
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spinlock_t lock;
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struct timer_list timer;
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struct workqueue_struct *wq;
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int slot_index_count;
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unsigned long *slot_index_tags;
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/* SCSI/SAS glue */
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struct sas_ha_struct sha;
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struct Scsi_Host *shost;
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struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
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struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
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struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
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int queue_count;
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int queue;
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char *int_names;
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struct hisi_sas_slot *slot_prep;
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struct dma_pool *sge_page_pool;
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struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
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struct dma_pool *command_table_pool;
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struct dma_pool *status_buffer_pool;
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struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
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dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
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void *complete_hdr[HISI_SAS_MAX_QUEUES];
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dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
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struct hisi_sas_initial_fis *initial_fis;
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dma_addr_t initial_fis_dma;
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struct hisi_sas_itct *itct;
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dma_addr_t itct_dma;
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struct hisi_sas_iost *iost;
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dma_addr_t iost_dma;
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struct hisi_sas_breakpoint *breakpoint;
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dma_addr_t breakpoint_dma;
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struct hisi_sas_breakpoint *sata_breakpoint;
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dma_addr_t sata_breakpoint_dma;
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struct hisi_sas_slot *slot_info;
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const struct hisi_sas_hw *hw; /* Low level hw interface */
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};
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/* Generic HW DMA host memory structures */
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/* Delivery queue header */
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struct hisi_sas_cmd_hdr {
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/* dw0 */
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__le32 dw0;
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/* dw1 */
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__le32 dw1;
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/* dw2 */
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__le32 dw2;
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/* dw3 */
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__le32 transfer_tags;
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/* dw4 */
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__le32 data_transfer_len;
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/* dw5 */
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__le32 first_burst_num;
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/* dw6 */
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__le32 sg_len;
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/* dw7 */
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__le32 dw7;
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/* dw8-9 */
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__le64 cmd_table_addr;
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/* dw10-11 */
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__le64 sts_buffer_addr;
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/* dw12-13 */
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__le64 prd_table_addr;
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/* dw14-15 */
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__le64 dif_prd_table_addr;
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};
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struct hisi_sas_itct {
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__le64 qw0;
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__le64 sas_addr;
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__le64 qw2;
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__le64 qw3;
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__le64 qw4;
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__le64 qw_sata_ncq0_3;
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__le64 qw_sata_ncq7_4;
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__le64 qw_sata_ncq11_8;
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__le64 qw_sata_ncq15_12;
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__le64 qw_sata_ncq19_16;
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__le64 qw_sata_ncq23_20;
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__le64 qw_sata_ncq27_24;
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__le64 qw_sata_ncq31_28;
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__le64 qw_non_ncq_iptt;
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__le64 qw_rsvd0;
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__le64 qw_rsvd1;
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};
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struct hisi_sas_iost {
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__le64 qw0;
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__le64 qw1;
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__le64 qw2;
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__le64 qw3;
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};
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struct hisi_sas_err_record {
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/* dw0 */
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__le32 dma_err_type;
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/* dw1 */
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__le32 trans_tx_fail_type;
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/* dw2 */
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__le32 trans_rx_fail_type;
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/* dw3 */
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u32 rsvd;
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};
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struct hisi_sas_initial_fis {
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struct hisi_sas_err_record err_record;
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struct dev_to_host_fis fis;
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u32 rsvd[3];
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};
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struct hisi_sas_breakpoint {
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u8 data[128]; /*io128 byte*/
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};
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struct hisi_sas_sge {
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__le64 addr;
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__le32 page_ctrl_0;
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__le32 page_ctrl_1;
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__le32 data_len;
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__le32 data_off;
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};
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struct hisi_sas_command_table_smp {
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u8 bytes[44];
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};
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struct hisi_sas_command_table_stp {
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struct host_to_dev_fis command_fis;
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u8 dummy[12];
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u8 atapi_cdb[ATAPI_CDB_LEN];
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};
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#define HISI_SAS_SGE_PAGE_CNT SCSI_MAX_SG_SEGMENTS
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struct hisi_sas_sge_page {
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struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
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};
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struct hisi_sas_command_table_ssp {
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struct ssp_frame_hdr hdr;
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union {
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struct {
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struct ssp_command_iu task;
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u32 prot[6];
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};
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struct ssp_tmf_iu ssp_task;
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struct xfer_rdy_iu xfer_rdy;
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struct ssp_response_iu ssp_res;
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} u;
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};
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union hisi_sas_command_table {
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struct hisi_sas_command_table_ssp ssp;
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struct hisi_sas_command_table_smp smp;
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struct hisi_sas_command_table_stp stp;
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};
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extern int hisi_sas_probe(struct platform_device *pdev,
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const struct hisi_sas_hw *ops);
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extern int hisi_sas_remove(struct platform_device *pdev);
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#endif
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