![Andrzej Hajda](/assets/img/avatar_default.png)
Type casting should be avoided if possible. In case of work_struct it can be simply replaced by reference to member field. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
857 lines
19 KiB
C
857 lines
19 KiB
C
/*
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* Copyright (C) 2012 Samsung Electronics Co.Ltd
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* Authors:
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* YoungJun Cho <yj44.cho@samsung.com>
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* Eunchul Kim <chulspro.kim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundationr
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*/
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/pm_runtime.h>
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#include <drm/drmP.h>
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#include <drm/exynos_drm.h>
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#include "regs-rotator.h"
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#include "exynos_drm.h"
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#include "exynos_drm_drv.h"
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#include "exynos_drm_ipp.h"
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/*
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* Rotator supports image crop/rotator and input/output DMA operations.
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* input DMA reads image data from the memory.
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* output DMA writes image data to memory.
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*
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* M2M operation : supports crop/scale/rotation/csc so on.
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* Memory ----> Rotator H/W ----> Memory.
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*/
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/*
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* TODO
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* 1. check suspend/resume api if needed.
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* 2. need to check use case platform_device_id.
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* 3. check src/dst size with, height.
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* 4. need to add supported list in prop_list.
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*/
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#define get_rot_context(dev) platform_get_drvdata(to_platform_device(dev))
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#define get_ctx_from_ippdrv(ippdrv) container_of(ippdrv,\
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struct rot_context, ippdrv);
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#define rot_read(offset) readl(rot->regs + (offset))
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#define rot_write(cfg, offset) writel(cfg, rot->regs + (offset))
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enum rot_irq_status {
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ROT_IRQ_STATUS_COMPLETE = 8,
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ROT_IRQ_STATUS_ILLEGAL = 9,
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};
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/*
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* A structure of limitation.
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*
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* @min_w: minimum width.
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* @min_h: minimum height.
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* @max_w: maximum width.
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* @max_h: maximum height.
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* @align: align size.
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*/
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struct rot_limit {
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u32 min_w;
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u32 min_h;
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u32 max_w;
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u32 max_h;
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u32 align;
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};
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/*
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* A structure of limitation table.
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*
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* @ycbcr420_2p: case of YUV.
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* @rgb888: case of RGB.
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*/
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struct rot_limit_table {
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struct rot_limit ycbcr420_2p;
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struct rot_limit rgb888;
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};
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/*
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* A structure of rotator context.
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* @ippdrv: prepare initialization using ippdrv.
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* @regs_res: register resources.
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* @regs: memory mapped io registers.
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* @clock: rotator gate clock.
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* @limit_tbl: limitation of rotator.
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* @irq: irq number.
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* @cur_buf_id: current operation buffer id.
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* @suspended: suspended state.
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*/
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struct rot_context {
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struct exynos_drm_ippdrv ippdrv;
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struct resource *regs_res;
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void __iomem *regs;
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struct clk *clock;
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struct rot_limit_table *limit_tbl;
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int irq;
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int cur_buf_id[EXYNOS_DRM_OPS_MAX];
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bool suspended;
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};
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static void rotator_reg_set_irq(struct rot_context *rot, bool enable)
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{
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u32 val = rot_read(ROT_CONFIG);
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if (enable == true)
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val |= ROT_CONFIG_IRQ;
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else
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val &= ~ROT_CONFIG_IRQ;
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rot_write(val, ROT_CONFIG);
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}
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static u32 rotator_reg_get_fmt(struct rot_context *rot)
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{
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u32 val = rot_read(ROT_CONTROL);
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val &= ROT_CONTROL_FMT_MASK;
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return val;
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}
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static enum rot_irq_status rotator_reg_get_irq_status(struct rot_context *rot)
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{
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u32 val = rot_read(ROT_STATUS);
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val = ROT_STATUS_IRQ(val);
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if (val == ROT_STATUS_IRQ_VAL_COMPLETE)
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return ROT_IRQ_STATUS_COMPLETE;
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return ROT_IRQ_STATUS_ILLEGAL;
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}
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static irqreturn_t rotator_irq_handler(int irq, void *arg)
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{
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struct rot_context *rot = arg;
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struct exynos_drm_ippdrv *ippdrv = &rot->ippdrv;
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struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
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struct drm_exynos_ipp_event_work *event_work = c_node->event_work;
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enum rot_irq_status irq_status;
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u32 val;
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/* Get execution result */
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irq_status = rotator_reg_get_irq_status(rot);
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/* clear status */
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val = rot_read(ROT_STATUS);
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val |= ROT_STATUS_IRQ_PENDING((u32)irq_status);
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rot_write(val, ROT_STATUS);
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if (irq_status == ROT_IRQ_STATUS_COMPLETE) {
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event_work->ippdrv = ippdrv;
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event_work->buf_id[EXYNOS_DRM_OPS_DST] =
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rot->cur_buf_id[EXYNOS_DRM_OPS_DST];
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queue_work(ippdrv->event_workq, &event_work->work);
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} else {
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DRM_ERROR("the SFR is set illegally\n");
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}
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return IRQ_HANDLED;
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}
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static void rotator_align_size(struct rot_context *rot, u32 fmt, u32 *hsize,
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u32 *vsize)
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{
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struct rot_limit_table *limit_tbl = rot->limit_tbl;
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struct rot_limit *limit;
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u32 mask, val;
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/* Get size limit */
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if (fmt == ROT_CONTROL_FMT_RGB888)
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limit = &limit_tbl->rgb888;
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else
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limit = &limit_tbl->ycbcr420_2p;
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/* Get mask for rounding to nearest aligned val */
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mask = ~((1 << limit->align) - 1);
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/* Set aligned width */
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val = ROT_ALIGN(*hsize, limit->align, mask);
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if (val < limit->min_w)
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*hsize = ROT_MIN(limit->min_w, mask);
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else if (val > limit->max_w)
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*hsize = ROT_MAX(limit->max_w, mask);
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else
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*hsize = val;
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/* Set aligned height */
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val = ROT_ALIGN(*vsize, limit->align, mask);
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if (val < limit->min_h)
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*vsize = ROT_MIN(limit->min_h, mask);
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else if (val > limit->max_h)
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*vsize = ROT_MAX(limit->max_h, mask);
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else
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*vsize = val;
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}
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static int rotator_src_set_fmt(struct device *dev, u32 fmt)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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u32 val;
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val = rot_read(ROT_CONTROL);
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val &= ~ROT_CONTROL_FMT_MASK;
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switch (fmt) {
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case DRM_FORMAT_NV12:
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val |= ROT_CONTROL_FMT_YCBCR420_2P;
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break;
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case DRM_FORMAT_XRGB8888:
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val |= ROT_CONTROL_FMT_RGB888;
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break;
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default:
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DRM_ERROR("invalid image format\n");
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return -EINVAL;
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}
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rot_write(val, ROT_CONTROL);
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return 0;
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}
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static inline bool rotator_check_reg_fmt(u32 fmt)
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{
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if ((fmt == ROT_CONTROL_FMT_YCBCR420_2P) ||
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(fmt == ROT_CONTROL_FMT_RGB888))
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return true;
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return false;
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}
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static int rotator_src_set_size(struct device *dev, int swap,
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struct drm_exynos_pos *pos,
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struct drm_exynos_sz *sz)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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u32 fmt, hsize, vsize;
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u32 val;
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/* Get format */
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fmt = rotator_reg_get_fmt(rot);
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if (!rotator_check_reg_fmt(fmt)) {
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DRM_ERROR("invalid format.\n");
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return -EINVAL;
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}
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/* Align buffer size */
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hsize = sz->hsize;
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vsize = sz->vsize;
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rotator_align_size(rot, fmt, &hsize, &vsize);
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/* Set buffer size configuration */
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val = ROT_SET_BUF_SIZE_H(vsize) | ROT_SET_BUF_SIZE_W(hsize);
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rot_write(val, ROT_SRC_BUF_SIZE);
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/* Set crop image position configuration */
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val = ROT_CROP_POS_Y(pos->y) | ROT_CROP_POS_X(pos->x);
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rot_write(val, ROT_SRC_CROP_POS);
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val = ROT_SRC_CROP_SIZE_H(pos->h) | ROT_SRC_CROP_SIZE_W(pos->w);
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rot_write(val, ROT_SRC_CROP_SIZE);
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return 0;
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}
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static int rotator_src_set_addr(struct device *dev,
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struct drm_exynos_ipp_buf_info *buf_info,
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u32 buf_id, enum drm_exynos_ipp_buf_type buf_type)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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dma_addr_t addr[EXYNOS_DRM_PLANAR_MAX];
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u32 val, fmt, hsize, vsize;
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int i;
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/* Set current buf_id */
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rot->cur_buf_id[EXYNOS_DRM_OPS_SRC] = buf_id;
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switch (buf_type) {
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case IPP_BUF_ENQUEUE:
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/* Set address configuration */
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for_each_ipp_planar(i)
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addr[i] = buf_info->base[i];
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/* Get format */
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fmt = rotator_reg_get_fmt(rot);
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if (!rotator_check_reg_fmt(fmt)) {
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DRM_ERROR("invalid format.\n");
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return -EINVAL;
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}
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/* Re-set cb planar for NV12 format */
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if ((fmt == ROT_CONTROL_FMT_YCBCR420_2P) &&
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!addr[EXYNOS_DRM_PLANAR_CB]) {
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val = rot_read(ROT_SRC_BUF_SIZE);
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hsize = ROT_GET_BUF_SIZE_W(val);
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vsize = ROT_GET_BUF_SIZE_H(val);
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/* Set cb planar */
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addr[EXYNOS_DRM_PLANAR_CB] =
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addr[EXYNOS_DRM_PLANAR_Y] + hsize * vsize;
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}
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for_each_ipp_planar(i)
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rot_write(addr[i], ROT_SRC_BUF_ADDR(i));
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break;
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case IPP_BUF_DEQUEUE:
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for_each_ipp_planar(i)
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rot_write(0x0, ROT_SRC_BUF_ADDR(i));
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break;
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default:
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/* Nothing to do */
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break;
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}
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return 0;
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}
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static int rotator_dst_set_transf(struct device *dev,
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enum drm_exynos_degree degree,
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enum drm_exynos_flip flip, bool *swap)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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u32 val;
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/* Set transform configuration */
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val = rot_read(ROT_CONTROL);
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val &= ~ROT_CONTROL_FLIP_MASK;
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switch (flip) {
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case EXYNOS_DRM_FLIP_VERTICAL:
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val |= ROT_CONTROL_FLIP_VERTICAL;
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break;
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case EXYNOS_DRM_FLIP_HORIZONTAL:
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val |= ROT_CONTROL_FLIP_HORIZONTAL;
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break;
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default:
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/* Flip None */
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break;
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}
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val &= ~ROT_CONTROL_ROT_MASK;
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switch (degree) {
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case EXYNOS_DRM_DEGREE_90:
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val |= ROT_CONTROL_ROT_90;
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break;
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case EXYNOS_DRM_DEGREE_180:
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val |= ROT_CONTROL_ROT_180;
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break;
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case EXYNOS_DRM_DEGREE_270:
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val |= ROT_CONTROL_ROT_270;
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break;
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default:
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/* Rotation 0 Degree */
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break;
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}
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rot_write(val, ROT_CONTROL);
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/* Check degree for setting buffer size swap */
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if ((degree == EXYNOS_DRM_DEGREE_90) ||
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(degree == EXYNOS_DRM_DEGREE_270))
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*swap = true;
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else
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*swap = false;
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return 0;
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}
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static int rotator_dst_set_size(struct device *dev, int swap,
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struct drm_exynos_pos *pos,
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struct drm_exynos_sz *sz)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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u32 val, fmt, hsize, vsize;
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/* Get format */
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fmt = rotator_reg_get_fmt(rot);
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if (!rotator_check_reg_fmt(fmt)) {
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DRM_ERROR("invalid format.\n");
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return -EINVAL;
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}
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/* Align buffer size */
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hsize = sz->hsize;
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vsize = sz->vsize;
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rotator_align_size(rot, fmt, &hsize, &vsize);
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/* Set buffer size configuration */
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val = ROT_SET_BUF_SIZE_H(vsize) | ROT_SET_BUF_SIZE_W(hsize);
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rot_write(val, ROT_DST_BUF_SIZE);
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/* Set crop image position configuration */
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val = ROT_CROP_POS_Y(pos->y) | ROT_CROP_POS_X(pos->x);
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rot_write(val, ROT_DST_CROP_POS);
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return 0;
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}
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static int rotator_dst_set_addr(struct device *dev,
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struct drm_exynos_ipp_buf_info *buf_info,
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u32 buf_id, enum drm_exynos_ipp_buf_type buf_type)
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{
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struct rot_context *rot = dev_get_drvdata(dev);
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dma_addr_t addr[EXYNOS_DRM_PLANAR_MAX];
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u32 val, fmt, hsize, vsize;
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int i;
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/* Set current buf_id */
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rot->cur_buf_id[EXYNOS_DRM_OPS_DST] = buf_id;
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switch (buf_type) {
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case IPP_BUF_ENQUEUE:
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/* Set address configuration */
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for_each_ipp_planar(i)
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addr[i] = buf_info->base[i];
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/* Get format */
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fmt = rotator_reg_get_fmt(rot);
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if (!rotator_check_reg_fmt(fmt)) {
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DRM_ERROR("invalid format.\n");
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return -EINVAL;
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}
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/* Re-set cb planar for NV12 format */
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if ((fmt == ROT_CONTROL_FMT_YCBCR420_2P) &&
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!addr[EXYNOS_DRM_PLANAR_CB]) {
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/* Get buf size */
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val = rot_read(ROT_DST_BUF_SIZE);
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hsize = ROT_GET_BUF_SIZE_W(val);
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vsize = ROT_GET_BUF_SIZE_H(val);
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/* Set cb planar */
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addr[EXYNOS_DRM_PLANAR_CB] =
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addr[EXYNOS_DRM_PLANAR_Y] + hsize * vsize;
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}
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for_each_ipp_planar(i)
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rot_write(addr[i], ROT_DST_BUF_ADDR(i));
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break;
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case IPP_BUF_DEQUEUE:
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for_each_ipp_planar(i)
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rot_write(0x0, ROT_DST_BUF_ADDR(i));
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break;
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default:
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/* Nothing to do */
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break;
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}
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return 0;
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}
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static struct exynos_drm_ipp_ops rot_src_ops = {
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.set_fmt = rotator_src_set_fmt,
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.set_size = rotator_src_set_size,
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.set_addr = rotator_src_set_addr,
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};
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static struct exynos_drm_ipp_ops rot_dst_ops = {
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.set_transf = rotator_dst_set_transf,
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.set_size = rotator_dst_set_size,
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.set_addr = rotator_dst_set_addr,
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};
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static int rotator_init_prop_list(struct exynos_drm_ippdrv *ippdrv)
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{
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struct drm_exynos_ipp_prop_list *prop_list = &ippdrv->prop_list;
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prop_list->version = 1;
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prop_list->flip = (1 << EXYNOS_DRM_FLIP_VERTICAL) |
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(1 << EXYNOS_DRM_FLIP_HORIZONTAL);
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prop_list->degree = (1 << EXYNOS_DRM_DEGREE_0) |
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(1 << EXYNOS_DRM_DEGREE_90) |
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(1 << EXYNOS_DRM_DEGREE_180) |
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(1 << EXYNOS_DRM_DEGREE_270);
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prop_list->csc = 0;
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prop_list->crop = 0;
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prop_list->scale = 0;
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return 0;
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}
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static inline bool rotator_check_drm_fmt(u32 fmt)
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{
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switch (fmt) {
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case DRM_FORMAT_XRGB8888:
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case DRM_FORMAT_NV12:
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return true;
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default:
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DRM_DEBUG_KMS("not support format\n");
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return false;
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}
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}
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static inline bool rotator_check_drm_flip(enum drm_exynos_flip flip)
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{
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switch (flip) {
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case EXYNOS_DRM_FLIP_NONE:
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case EXYNOS_DRM_FLIP_VERTICAL:
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case EXYNOS_DRM_FLIP_HORIZONTAL:
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case EXYNOS_DRM_FLIP_BOTH:
|
|
return true;
|
|
default:
|
|
DRM_DEBUG_KMS("invalid flip\n");
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static int rotator_ippdrv_check_property(struct device *dev,
|
|
struct drm_exynos_ipp_property *property)
|
|
{
|
|
struct drm_exynos_ipp_config *src_config =
|
|
&property->config[EXYNOS_DRM_OPS_SRC];
|
|
struct drm_exynos_ipp_config *dst_config =
|
|
&property->config[EXYNOS_DRM_OPS_DST];
|
|
struct drm_exynos_pos *src_pos = &src_config->pos;
|
|
struct drm_exynos_pos *dst_pos = &dst_config->pos;
|
|
struct drm_exynos_sz *src_sz = &src_config->sz;
|
|
struct drm_exynos_sz *dst_sz = &dst_config->sz;
|
|
bool swap = false;
|
|
|
|
/* Check format configuration */
|
|
if (src_config->fmt != dst_config->fmt) {
|
|
DRM_DEBUG_KMS("not support csc feature\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (!rotator_check_drm_fmt(dst_config->fmt)) {
|
|
DRM_DEBUG_KMS("invalid format\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Check transform configuration */
|
|
if (src_config->degree != EXYNOS_DRM_DEGREE_0) {
|
|
DRM_DEBUG_KMS("not support source-side rotation\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
switch (dst_config->degree) {
|
|
case EXYNOS_DRM_DEGREE_90:
|
|
case EXYNOS_DRM_DEGREE_270:
|
|
swap = true;
|
|
case EXYNOS_DRM_DEGREE_0:
|
|
case EXYNOS_DRM_DEGREE_180:
|
|
/* No problem */
|
|
break;
|
|
default:
|
|
DRM_DEBUG_KMS("invalid degree\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (src_config->flip != EXYNOS_DRM_FLIP_NONE) {
|
|
DRM_DEBUG_KMS("not support source-side flip\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (!rotator_check_drm_flip(dst_config->flip)) {
|
|
DRM_DEBUG_KMS("invalid flip\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Check size configuration */
|
|
if ((src_pos->x + src_pos->w > src_sz->hsize) ||
|
|
(src_pos->y + src_pos->h > src_sz->vsize)) {
|
|
DRM_DEBUG_KMS("out of source buffer bound\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (swap) {
|
|
if ((dst_pos->x + dst_pos->h > dst_sz->vsize) ||
|
|
(dst_pos->y + dst_pos->w > dst_sz->hsize)) {
|
|
DRM_DEBUG_KMS("out of destination buffer bound\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if ((src_pos->w != dst_pos->h) || (src_pos->h != dst_pos->w)) {
|
|
DRM_DEBUG_KMS("not support scale feature\n");
|
|
return -EINVAL;
|
|
}
|
|
} else {
|
|
if ((dst_pos->x + dst_pos->w > dst_sz->hsize) ||
|
|
(dst_pos->y + dst_pos->h > dst_sz->vsize)) {
|
|
DRM_DEBUG_KMS("out of destination buffer bound\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if ((src_pos->w != dst_pos->w) || (src_pos->h != dst_pos->h)) {
|
|
DRM_DEBUG_KMS("not support scale feature\n");
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rotator_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
|
|
{
|
|
struct rot_context *rot = dev_get_drvdata(dev);
|
|
u32 val;
|
|
|
|
if (rot->suspended) {
|
|
DRM_ERROR("suspended state\n");
|
|
return -EPERM;
|
|
}
|
|
|
|
if (cmd != IPP_CMD_M2M) {
|
|
DRM_ERROR("not support cmd: %d\n", cmd);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Set interrupt enable */
|
|
rotator_reg_set_irq(rot, true);
|
|
|
|
val = rot_read(ROT_CONTROL);
|
|
val |= ROT_CONTROL_START;
|
|
|
|
rot_write(val, ROT_CONTROL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct rot_limit_table rot_limit_tbl_4210 = {
|
|
.ycbcr420_2p = {
|
|
.min_w = 32,
|
|
.min_h = 32,
|
|
.max_w = SZ_64K,
|
|
.max_h = SZ_64K,
|
|
.align = 3,
|
|
},
|
|
.rgb888 = {
|
|
.min_w = 8,
|
|
.min_h = 8,
|
|
.max_w = SZ_16K,
|
|
.max_h = SZ_16K,
|
|
.align = 2,
|
|
},
|
|
};
|
|
|
|
static struct rot_limit_table rot_limit_tbl_4x12 = {
|
|
.ycbcr420_2p = {
|
|
.min_w = 32,
|
|
.min_h = 32,
|
|
.max_w = SZ_32K,
|
|
.max_h = SZ_32K,
|
|
.align = 3,
|
|
},
|
|
.rgb888 = {
|
|
.min_w = 8,
|
|
.min_h = 8,
|
|
.max_w = SZ_8K,
|
|
.max_h = SZ_8K,
|
|
.align = 2,
|
|
},
|
|
};
|
|
|
|
static struct rot_limit_table rot_limit_tbl_5250 = {
|
|
.ycbcr420_2p = {
|
|
.min_w = 32,
|
|
.min_h = 32,
|
|
.max_w = SZ_32K,
|
|
.max_h = SZ_32K,
|
|
.align = 3,
|
|
},
|
|
.rgb888 = {
|
|
.min_w = 8,
|
|
.min_h = 8,
|
|
.max_w = SZ_8K,
|
|
.max_h = SZ_8K,
|
|
.align = 1,
|
|
},
|
|
};
|
|
|
|
static const struct of_device_id exynos_rotator_match[] = {
|
|
{
|
|
.compatible = "samsung,exynos4210-rotator",
|
|
.data = &rot_limit_tbl_4210,
|
|
},
|
|
{
|
|
.compatible = "samsung,exynos4212-rotator",
|
|
.data = &rot_limit_tbl_4x12,
|
|
},
|
|
{
|
|
.compatible = "samsung,exynos5250-rotator",
|
|
.data = &rot_limit_tbl_5250,
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, exynos_rotator_match);
|
|
|
|
static int rotator_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct rot_context *rot;
|
|
struct exynos_drm_ippdrv *ippdrv;
|
|
const struct of_device_id *match;
|
|
int ret;
|
|
|
|
if (!dev->of_node) {
|
|
dev_err(dev, "cannot find of_node.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
rot = devm_kzalloc(dev, sizeof(*rot), GFP_KERNEL);
|
|
if (!rot)
|
|
return -ENOMEM;
|
|
|
|
match = of_match_node(exynos_rotator_match, dev->of_node);
|
|
if (!match) {
|
|
dev_err(dev, "failed to match node\n");
|
|
return -ENODEV;
|
|
}
|
|
rot->limit_tbl = (struct rot_limit_table *)match->data;
|
|
|
|
rot->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
rot->regs = devm_ioremap_resource(dev, rot->regs_res);
|
|
if (IS_ERR(rot->regs))
|
|
return PTR_ERR(rot->regs);
|
|
|
|
rot->irq = platform_get_irq(pdev, 0);
|
|
if (rot->irq < 0) {
|
|
dev_err(dev, "failed to get irq\n");
|
|
return rot->irq;
|
|
}
|
|
|
|
ret = devm_request_threaded_irq(dev, rot->irq, NULL,
|
|
rotator_irq_handler, IRQF_ONESHOT, "drm_rotator", rot);
|
|
if (ret < 0) {
|
|
dev_err(dev, "failed to request irq\n");
|
|
return ret;
|
|
}
|
|
|
|
rot->clock = devm_clk_get(dev, "rotator");
|
|
if (IS_ERR(rot->clock)) {
|
|
dev_err(dev, "failed to get clock\n");
|
|
return PTR_ERR(rot->clock);
|
|
}
|
|
|
|
pm_runtime_enable(dev);
|
|
|
|
ippdrv = &rot->ippdrv;
|
|
ippdrv->dev = dev;
|
|
ippdrv->ops[EXYNOS_DRM_OPS_SRC] = &rot_src_ops;
|
|
ippdrv->ops[EXYNOS_DRM_OPS_DST] = &rot_dst_ops;
|
|
ippdrv->check_property = rotator_ippdrv_check_property;
|
|
ippdrv->start = rotator_ippdrv_start;
|
|
ret = rotator_init_prop_list(ippdrv);
|
|
if (ret < 0) {
|
|
dev_err(dev, "failed to init property list.\n");
|
|
goto err_ippdrv_register;
|
|
}
|
|
|
|
DRM_DEBUG_KMS("ippdrv[0x%x]\n", (int)ippdrv);
|
|
|
|
platform_set_drvdata(pdev, rot);
|
|
|
|
ret = exynos_drm_ippdrv_register(ippdrv);
|
|
if (ret < 0) {
|
|
dev_err(dev, "failed to register drm rotator device\n");
|
|
goto err_ippdrv_register;
|
|
}
|
|
|
|
dev_info(dev, "The exynos rotator is probed successfully\n");
|
|
|
|
return 0;
|
|
|
|
err_ippdrv_register:
|
|
pm_runtime_disable(dev);
|
|
return ret;
|
|
}
|
|
|
|
static int rotator_remove(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct rot_context *rot = dev_get_drvdata(dev);
|
|
struct exynos_drm_ippdrv *ippdrv = &rot->ippdrv;
|
|
|
|
exynos_drm_ippdrv_unregister(ippdrv);
|
|
|
|
pm_runtime_disable(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rotator_clk_crtl(struct rot_context *rot, bool enable)
|
|
{
|
|
if (enable) {
|
|
clk_enable(rot->clock);
|
|
rot->suspended = false;
|
|
} else {
|
|
clk_disable(rot->clock);
|
|
rot->suspended = true;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int rotator_suspend(struct device *dev)
|
|
{
|
|
struct rot_context *rot = dev_get_drvdata(dev);
|
|
|
|
if (pm_runtime_suspended(dev))
|
|
return 0;
|
|
|
|
return rotator_clk_crtl(rot, false);
|
|
}
|
|
|
|
static int rotator_resume(struct device *dev)
|
|
{
|
|
struct rot_context *rot = dev_get_drvdata(dev);
|
|
|
|
if (!pm_runtime_suspended(dev))
|
|
return rotator_clk_crtl(rot, true);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_PM_RUNTIME
|
|
static int rotator_runtime_suspend(struct device *dev)
|
|
{
|
|
struct rot_context *rot = dev_get_drvdata(dev);
|
|
|
|
return rotator_clk_crtl(rot, false);
|
|
}
|
|
|
|
static int rotator_runtime_resume(struct device *dev)
|
|
{
|
|
struct rot_context *rot = dev_get_drvdata(dev);
|
|
|
|
return rotator_clk_crtl(rot, true);
|
|
}
|
|
#endif
|
|
|
|
static const struct dev_pm_ops rotator_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(rotator_suspend, rotator_resume)
|
|
SET_RUNTIME_PM_OPS(rotator_runtime_suspend, rotator_runtime_resume,
|
|
NULL)
|
|
};
|
|
|
|
struct platform_driver rotator_driver = {
|
|
.probe = rotator_probe,
|
|
.remove = rotator_remove,
|
|
.driver = {
|
|
.name = "exynos-rot",
|
|
.owner = THIS_MODULE,
|
|
.pm = &rotator_pm_ops,
|
|
.of_match_table = exynos_rotator_match,
|
|
},
|
|
};
|