![Julia Lawall](/assets/img/avatar_default.png)
Use c99 initializers for structures. Drop 0 initializers in drivers/gpu/drm/sti/sti_vtac.c. A 0x0 initializer is left in vtac_mode_aux in drivers/gpu/drm/sti/sti_vtac.c to highlight the relation to vtac_mode_main. A simplified version of the semantic match that finds the first problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @decl@ identifier i1,fld; type T; field list[n] fs; @@ struct i1 { fs T fld; ...}; @bad@ identifier decl.i1,i2; expression e; initializer list[decl.n] is; @@ struct i1 i2 = { is, + .fld = e - e ,...}; // </smpl> v2: Drop 0 initializers and add trailing commas at the suggestions of Josh Triplett. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
224 lines
5.8 KiB
C
224 lines
5.8 KiB
C
/*
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* Copyright (C) STMicroelectronics SA 2014
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* Author: Benjamin Gaignard <benjamin.gaignard@st.com> for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <drm/drmP.h>
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/* registers offset */
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#define VTAC_CONFIG 0x00
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#define VTAC_RX_FIFO_CONFIG 0x04
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#define VTAC_FIFO_CONFIG_VAL 0x04
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#define VTAC_SYS_CFG8521 0x824
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#define VTAC_SYS_CFG8522 0x828
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/* Number of phyts per pixel */
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#define VTAC_2_5_PPP 0x0005
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#define VTAC_3_PPP 0x0006
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#define VTAC_4_PPP 0x0008
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#define VTAC_5_PPP 0x000A
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#define VTAC_6_PPP 0x000C
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#define VTAC_13_PPP 0x001A
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#define VTAC_14_PPP 0x001C
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#define VTAC_15_PPP 0x001E
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#define VTAC_16_PPP 0x0020
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#define VTAC_17_PPP 0x0022
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#define VTAC_18_PPP 0x0024
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/* enable bits */
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#define VTAC_ENABLE 0x3003
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#define VTAC_TX_PHY_ENABLE_CLK_PHY BIT(0)
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#define VTAC_TX_PHY_ENABLE_CLK_DLL BIT(1)
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#define VTAC_TX_PHY_PLL_NOT_OSC_MODE BIT(3)
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#define VTAC_TX_PHY_RST_N_DLL_SWITCH BIT(4)
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#define VTAC_TX_PHY_PROG_N3 BIT(9)
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/**
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* VTAC mode structure
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*
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* @vid_in_width: Video Data Resolution
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* @phyts_width: Width of phyt buses(phyt low and phyt high).
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* @phyts_per_pixel: Number of phyts sent per pixel
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*/
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struct sti_vtac_mode {
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u32 vid_in_width;
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u32 phyts_width;
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u32 phyts_per_pixel;
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};
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static const struct sti_vtac_mode vtac_mode_main = {
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.vid_in_width = 0x2,
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.phyts_width = 0x2,
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.phyts_per_pixel = VTAC_5_PPP,
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};
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static const struct sti_vtac_mode vtac_mode_aux = {
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.vid_in_width = 0x1,
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.phyts_width = 0x0,
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.phyts_per_pixel = VTAC_17_PPP,
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};
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/**
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* VTAC structure
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*
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* @dev: pointer to device structure
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* @regs: ioremapped registers for RX and TX devices
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* @phy_regs: phy registers for TX device
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* @clk: clock
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* @mode: main or auxillary configuration mode
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*/
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struct sti_vtac {
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struct device *dev;
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void __iomem *regs;
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void __iomem *phy_regs;
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struct clk *clk;
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const struct sti_vtac_mode *mode;
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};
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static void sti_vtac_rx_set_config(struct sti_vtac *vtac)
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{
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u32 config;
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/* Enable VTAC clock */
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if (clk_prepare_enable(vtac->clk))
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DRM_ERROR("Failed to prepare/enable vtac_rx clock.\n");
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writel(VTAC_FIFO_CONFIG_VAL, vtac->regs + VTAC_RX_FIFO_CONFIG);
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config = VTAC_ENABLE;
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config |= vtac->mode->vid_in_width << 4;
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config |= vtac->mode->phyts_width << 16;
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config |= vtac->mode->phyts_per_pixel << 23;
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writel(config, vtac->regs + VTAC_CONFIG);
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}
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static void sti_vtac_tx_set_config(struct sti_vtac *vtac)
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{
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u32 phy_config;
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u32 config;
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/* Enable VTAC clock */
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if (clk_prepare_enable(vtac->clk))
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DRM_ERROR("Failed to prepare/enable vtac_tx clock.\n");
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/* Configure vtac phy */
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phy_config = 0x00000000;
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writel(phy_config, vtac->phy_regs + VTAC_SYS_CFG8522);
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phy_config = VTAC_TX_PHY_ENABLE_CLK_PHY;
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writel(phy_config, vtac->phy_regs + VTAC_SYS_CFG8521);
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phy_config = readl(vtac->phy_regs + VTAC_SYS_CFG8521);
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phy_config |= VTAC_TX_PHY_PROG_N3;
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writel(phy_config, vtac->phy_regs + VTAC_SYS_CFG8521);
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phy_config = readl(vtac->phy_regs + VTAC_SYS_CFG8521);
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phy_config |= VTAC_TX_PHY_ENABLE_CLK_DLL;
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writel(phy_config, vtac->phy_regs + VTAC_SYS_CFG8521);
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phy_config = readl(vtac->phy_regs + VTAC_SYS_CFG8521);
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phy_config |= VTAC_TX_PHY_RST_N_DLL_SWITCH;
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writel(phy_config, vtac->phy_regs + VTAC_SYS_CFG8521);
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phy_config = readl(vtac->phy_regs + VTAC_SYS_CFG8521);
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phy_config |= VTAC_TX_PHY_PLL_NOT_OSC_MODE;
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writel(phy_config, vtac->phy_regs + VTAC_SYS_CFG8521);
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/* Configure vtac tx */
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config = VTAC_ENABLE;
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config |= vtac->mode->vid_in_width << 4;
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config |= vtac->mode->phyts_width << 16;
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config |= vtac->mode->phyts_per_pixel << 23;
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writel(config, vtac->regs + VTAC_CONFIG);
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}
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static const struct of_device_id vtac_of_match[] = {
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{
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.compatible = "st,vtac-main",
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.data = &vtac_mode_main,
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}, {
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.compatible = "st,vtac-aux",
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.data = &vtac_mode_aux,
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}, {
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/* end node */
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}
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};
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MODULE_DEVICE_TABLE(of, vtac_of_match);
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static int sti_vtac_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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const struct of_device_id *id;
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struct sti_vtac *vtac;
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struct resource *res;
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vtac = devm_kzalloc(dev, sizeof(*vtac), GFP_KERNEL);
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if (!vtac)
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return -ENOMEM;
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vtac->dev = dev;
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id = of_match_node(vtac_of_match, np);
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if (!id)
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return -ENOMEM;
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vtac->mode = id->data;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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DRM_ERROR("Invalid resource\n");
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return -ENOMEM;
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}
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vtac->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(vtac->regs))
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return PTR_ERR(vtac->regs);
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vtac->clk = devm_clk_get(dev, "vtac");
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if (IS_ERR(vtac->clk)) {
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DRM_ERROR("Cannot get vtac clock\n");
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return PTR_ERR(vtac->clk);
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (res) {
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vtac->phy_regs = devm_ioremap_nocache(dev, res->start,
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resource_size(res));
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sti_vtac_tx_set_config(vtac);
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} else {
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sti_vtac_rx_set_config(vtac);
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}
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platform_set_drvdata(pdev, vtac);
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DRM_INFO("%s %s\n", __func__, dev_name(vtac->dev));
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return 0;
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}
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static int sti_vtac_remove(struct platform_device *pdev)
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{
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return 0;
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}
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struct platform_driver sti_vtac_driver = {
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.driver = {
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.name = "sti-vtac",
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.owner = THIS_MODULE,
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.of_match_table = vtac_of_match,
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},
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.probe = sti_vtac_probe,
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.remove = sti_vtac_remove,
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};
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module_platform_driver(sti_vtac_driver);
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MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
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MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
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MODULE_LICENSE("GPL");
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