2d24b532f9
These changes based on work by Steven King <sfking@fdwdc.com> to support the i2c hardware modules on ColdFire SoC family devices. This is the per SoC hardware support. Contains a common platform device setup. Each of the SoC family members tends to have some minor local setup required to initialize the module. But all ColdFire family members use the same i2c hardware module. This i2c hardware module is the same as used in the Freescale iMX ARM based family of SoC devices. Steven's original patches were based on using a new and different i2c-coldfire.c driver. But this is not neccessary as we can use the existing Linux i2c-imx.c driver with no change required to it. And this patch is now based on using the existing i2c-imx driver. This patch only contains the ColdFire platform changes. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Tested-by: Angelo Dureghello <angelo@sysam.it>
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
/***************************************************************************/
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/*
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* m523x.c -- platform support for ColdFire 523x based boards
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*
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* Sub-architcture dependent initialization code for the Freescale
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* 523x CPUs.
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*
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* Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfclk.h>
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/***************************************************************************/
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DEFINE_CLK(pll, "pll.0", MCF_CLK);
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DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
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DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK);
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DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK);
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DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK);
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DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK);
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DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
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DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
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DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
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DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
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DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
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DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);
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struct clk *mcf_clks[] = {
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&clk_pll,
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&clk_sys,
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&clk_mcfpit0,
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&clk_mcfpit1,
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&clk_mcfpit2,
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&clk_mcfpit3,
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&clk_mcfuart0,
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&clk_mcfuart1,
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&clk_mcfuart2,
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&clk_mcfqspi0,
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&clk_fec0,
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&clk_mcfi2c0,
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NULL
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};
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/***************************************************************************/
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static void __init m523x_qspi_init(void)
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{
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#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
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u16 par;
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/* setup QSPS pins for QSPI with gpio CS control */
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writeb(0x1f, MCFGPIO_PAR_QSPI);
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/* and CS2 & CS3 as gpio */
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par = readw(MCFGPIO_PAR_TIMER);
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par &= 0x3f3f;
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writew(par, MCFGPIO_PAR_TIMER);
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#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
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}
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/***************************************************************************/
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static void __init m523x_i2c_init(void)
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{
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#if IS_ENABLED(CONFIG_I2C_IMX)
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u8 par;
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/* setup Port AS Pin Assignment Register for I2C */
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/* set PASPA0 to SCL and PASPA1 to SDA */
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par = readb(MCFGPIO_PAR_FECI2C);
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par |= 0x0f;
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writeb(par, MCFGPIO_PAR_FECI2C);
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#endif /* IS_ENABLED(CONFIG_I2C_IMX) */
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}
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/***************************************************************************/
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static void __init m523x_fec_init(void)
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{
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/* Set multi-function pins to ethernet use */
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writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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mach_sched_init = hw_timer_init;
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m523x_fec_init();
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m523x_qspi_init();
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m523x_i2c_init();
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}
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/***************************************************************************/
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