d839c60ac5
This commit removes two things: - The platform_device that corresponds to the RTC driver, since we now probe this driver from devicetree; - The platform power-off code, since all the jz4740-based platforms are now using the jz4740-rtc driver as the system power controller. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
/*
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* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/pm.h>
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#include <asm/reboot.h>
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#include <asm/mach-jz4740/base.h>
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#include <asm/mach-jz4740/timer.h>
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#include "reset.h"
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#include "clock.h"
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static void jz4740_halt(void)
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{
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while (1) {
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__asm__(".set push;\n"
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".set mips3;\n"
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"wait;\n"
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".set pop;\n"
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);
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}
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}
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#define JZ_REG_WDT_DATA 0x00
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#define JZ_REG_WDT_COUNTER_ENABLE 0x04
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#define JZ_REG_WDT_COUNTER 0x08
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#define JZ_REG_WDT_CTRL 0x0c
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static void jz4740_restart(char *command)
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{
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void __iomem *wdt_base = ioremap(JZ4740_WDT_BASE_ADDR, 0x0f);
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jz4740_timer_enable_watchdog();
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writeb(0, wdt_base + JZ_REG_WDT_COUNTER_ENABLE);
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writew(0, wdt_base + JZ_REG_WDT_COUNTER);
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writew(0, wdt_base + JZ_REG_WDT_DATA);
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writew(BIT(2), wdt_base + JZ_REG_WDT_CTRL);
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writeb(1, wdt_base + JZ_REG_WDT_COUNTER_ENABLE);
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jz4740_halt();
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}
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void jz4740_reset_init(void)
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{
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_machine_restart = jz4740_restart;
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_machine_halt = jz4740_halt;
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}
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