123e4b3bbc
GCC versions supporting MIPS R6 use the ZC constraint to enforce a 9-bit offset for MIPS R6. We will use that for all MIPS R6 LL/SC instructions. Cc: Matthew Fortune <Matthew.Fortune@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
/*
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* Copyright (C) 2004, 2007 Maciej W. Rozycki
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef _ASM_COMPILER_H
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#define _ASM_COMPILER_H
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#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
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#define GCC_IMM_ASM() "n"
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#define GCC_REG_ACCUM "$0"
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#else
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#define GCC_IMM_ASM() "rn"
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#define GCC_REG_ACCUM "accum"
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#endif
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#ifdef CONFIG_CPU_MIPSR6
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/* All MIPS R6 toolchains support the ZC constrain */
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#define GCC_OFF_SMALL_ASM() "ZC"
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#else
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#ifndef CONFIG_CPU_MICROMIPS
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#define GCC_OFF_SMALL_ASM() "R"
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#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
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#define GCC_OFF_SMALL_ASM() "ZC"
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#else
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#error "microMIPS compilation unsupported with GCC older than 4.9"
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#endif /* CONFIG_CPU_MICROMIPS */
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#endif /* CONFIG_CPU_MIPSR6 */
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#ifdef CONFIG_CPU_MIPSR6
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#define MIPS_ISA_LEVEL "mips64r6"
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#define MIPS_ISA_ARCH_LEVEL MIPS_ISA_LEVEL
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#define MIPS_ISA_LEVEL_RAW mips64r6
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#define MIPS_ISA_ARCH_LEVEL_RAW MIPS_ISA_LEVEL_RAW
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#else
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/* MIPS64 is a superset of MIPS32 */
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#define MIPS_ISA_LEVEL "mips64r2"
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#define MIPS_ISA_ARCH_LEVEL "arch=r4000"
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#define MIPS_ISA_LEVEL_RAW mips64r2
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#define MIPS_ISA_ARCH_LEVEL_RAW MIPS_ISA_LEVEL_RAW
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#endif /* CONFIG_CPU_MIPSR6 */
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#endif /* _ASM_COMPILER_H */
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