![Stephane Grosjean](/assets/img/avatar_default.png)
This patch adds the support of the PCAN-PCI Express FD boards made by PEAK-System, for computers using the PCI Express slot. The PCAN-PCI Express FD has one or two CAN FD channels, depending on the model. A galvanic isolation of the CAN ports protects the electronics of the card and the respective computer against disturbances of up to 500 Volts. The PCAN-PCI Express FD can be operated with ambient temperatures in a range of -40 to +85 °C. Such boards run an extented version of the CAN-FD IP running into USB CAN-FD interfaces from PEAK-System, so this patch adds several new commands and their corresponding data types to the PEAK CAN-FD common definitions header file too. Signed-off-by: Stephane Grosjean <s.grosjean@peak-system.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
309 lines
8 KiB
C
309 lines
8 KiB
C
/*
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* CAN driver for PEAK System micro-CAN based adapters
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*
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* Copyright (C) 2003-2011 PEAK System-Technik GmbH
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* Copyright (C) 2011-2013 Stephane Grosjean <s.grosjean@peak-system.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published
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* by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#ifndef PUCAN_H
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#define PUCAN_H
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/* uCAN commands opcodes list (low-order 10 bits) */
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#define PUCAN_CMD_NOP 0x000
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#define PUCAN_CMD_RESET_MODE 0x001
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#define PUCAN_CMD_NORMAL_MODE 0x002
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#define PUCAN_CMD_LISTEN_ONLY_MODE 0x003
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#define PUCAN_CMD_TIMING_SLOW 0x004
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#define PUCAN_CMD_TIMING_FAST 0x005
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#define PUCAN_CMD_SET_STD_FILTER 0x006
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#define PUCAN_CMD_RESERVED2 0x007
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#define PUCAN_CMD_FILTER_STD 0x008
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#define PUCAN_CMD_TX_ABORT 0x009
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#define PUCAN_CMD_WR_ERR_CNT 0x00a
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#define PUCAN_CMD_SET_EN_OPTION 0x00b
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#define PUCAN_CMD_CLR_DIS_OPTION 0x00c
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#define PUCAN_CMD_RX_BARRIER 0x010
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#define PUCAN_CMD_END_OF_COLLECTION 0x3ff
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/* uCAN received messages list */
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#define PUCAN_MSG_CAN_RX 0x0001
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#define PUCAN_MSG_ERROR 0x0002
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#define PUCAN_MSG_STATUS 0x0003
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#define PUCAN_MSG_BUSLOAD 0x0004
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#define PUCAN_MSG_CACHE_CRITICAL 0x0102
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/* uCAN transmitted messages */
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#define PUCAN_MSG_CAN_TX 0x1000
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/* uCAN command common header */
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struct __packed pucan_command {
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__le16 opcode_channel;
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u16 args[3];
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};
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/* return the opcode from the opcode_channel field of a command */
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static inline u16 pucan_cmd_get_opcode(struct pucan_command *c)
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{
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return le16_to_cpu(c->opcode_channel) & 0x3ff;
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}
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#define PUCAN_TSLOW_BRP_BITS 10
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#define PUCAN_TSLOW_TSGEG1_BITS 8
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#define PUCAN_TSLOW_TSGEG2_BITS 7
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#define PUCAN_TSLOW_SJW_BITS 7
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#define PUCAN_TSLOW_BRP_MASK ((1 << PUCAN_TSLOW_BRP_BITS) - 1)
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#define PUCAN_TSLOW_TSEG1_MASK ((1 << PUCAN_TSLOW_TSGEG1_BITS) - 1)
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#define PUCAN_TSLOW_TSEG2_MASK ((1 << PUCAN_TSLOW_TSGEG2_BITS) - 1)
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#define PUCAN_TSLOW_SJW_MASK ((1 << PUCAN_TSLOW_SJW_BITS) - 1)
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/* uCAN TIMING_SLOW command fields */
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#define PUCAN_TSLOW_SJW_T(s, t) (((s) & PUCAN_TSLOW_SJW_MASK) | \
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((!!(t)) << 7))
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#define PUCAN_TSLOW_TSEG2(t) ((t) & PUCAN_TSLOW_TSEG2_MASK)
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#define PUCAN_TSLOW_TSEG1(t) ((t) & PUCAN_TSLOW_TSEG1_MASK)
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#define PUCAN_TSLOW_BRP(b) ((b) & PUCAN_TSLOW_BRP_MASK)
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struct __packed pucan_timing_slow {
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__le16 opcode_channel;
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u8 ewl; /* Error Warning limit */
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u8 sjw_t; /* Sync Jump Width + Triple sampling */
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u8 tseg2; /* Timing SEGment 2 */
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u8 tseg1; /* Timing SEGment 1 */
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__le16 brp; /* BaudRate Prescaler */
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};
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#define PUCAN_TFAST_BRP_BITS 10
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#define PUCAN_TFAST_TSGEG1_BITS 5
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#define PUCAN_TFAST_TSGEG2_BITS 4
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#define PUCAN_TFAST_SJW_BITS 4
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#define PUCAN_TFAST_BRP_MASK ((1 << PUCAN_TFAST_BRP_BITS) - 1)
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#define PUCAN_TFAST_TSEG1_MASK ((1 << PUCAN_TFAST_TSGEG1_BITS) - 1)
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#define PUCAN_TFAST_TSEG2_MASK ((1 << PUCAN_TFAST_TSGEG2_BITS) - 1)
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#define PUCAN_TFAST_SJW_MASK ((1 << PUCAN_TFAST_SJW_BITS) - 1)
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/* uCAN TIMING_FAST command fields */
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#define PUCAN_TFAST_SJW(s) ((s) & PUCAN_TFAST_SJW_MASK)
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#define PUCAN_TFAST_TSEG2(t) ((t) & PUCAN_TFAST_TSEG2_MASK)
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#define PUCAN_TFAST_TSEG1(t) ((t) & PUCAN_TFAST_TSEG1_MASK)
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#define PUCAN_TFAST_BRP(b) ((b) & PUCAN_TFAST_BRP_MASK)
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struct __packed pucan_timing_fast {
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__le16 opcode_channel;
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u8 unused;
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u8 sjw; /* Sync Jump Width */
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u8 tseg2; /* Timing SEGment 2 */
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u8 tseg1; /* Timing SEGment 1 */
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__le16 brp; /* BaudRate Prescaler */
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};
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/* uCAN FILTER_STD command fields */
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#define PUCAN_FLTSTD_ROW_IDX_BITS 6
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struct __packed pucan_filter_std {
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__le16 opcode_channel;
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__le16 idx;
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__le32 mask; /* CAN-ID bitmask in idx range */
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};
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#define PUCAN_FLTSTD_ROW_IDX_MAX ((1 << PUCAN_FLTSTD_ROW_IDX_BITS) - 1)
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/* uCAN SET_STD_FILTER command fields */
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struct __packed pucan_std_filter {
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__le16 opcode_channel;
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u8 unused;
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u8 idx;
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__le32 mask; /* CAN-ID bitmask in idx range */
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};
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/* uCAN TX_ABORT commands fields */
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#define PUCAN_TX_ABORT_FLUSH 0x0001
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struct __packed pucan_tx_abort {
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__le16 opcode_channel;
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__le16 flags;
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u32 unused;
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};
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/* uCAN WR_ERR_CNT command fields */
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#define PUCAN_WRERRCNT_TE 0x4000 /* Tx error cntr write Enable */
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#define PUCAN_WRERRCNT_RE 0x8000 /* Rx error cntr write Enable */
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struct __packed pucan_wr_err_cnt {
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__le16 opcode_channel;
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__le16 sel_mask;
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u8 tx_counter; /* Tx error counter new value */
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u8 rx_counter; /* Rx error counter new value */
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u16 unused;
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};
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/* uCAN SET_EN/CLR_DIS _OPTION command fields */
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#define PUCAN_OPTION_ERROR 0x0001
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#define PUCAN_OPTION_BUSLOAD 0x0002
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#define PUCAN_OPTION_CANDFDISO 0x0004
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struct __packed pucan_options {
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__le16 opcode_channel;
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__le16 options;
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u32 unused;
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};
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/* uCAN received messages global format */
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struct __packed pucan_msg {
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__le16 size;
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__le16 type;
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__le32 ts_low;
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__le32 ts_high;
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};
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/* uCAN flags for CAN/CANFD messages */
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#define PUCAN_MSG_SELF_RECEIVE 0x80
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#define PUCAN_MSG_ERROR_STATE_IND 0x40 /* error state indicator */
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#define PUCAN_MSG_BITRATE_SWITCH 0x20 /* bitrate switch */
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#define PUCAN_MSG_EXT_DATA_LEN 0x10 /* extended data length */
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#define PUCAN_MSG_SINGLE_SHOT 0x08
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#define PUCAN_MSG_LOOPED_BACK 0x04
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#define PUCAN_MSG_EXT_ID 0x02
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#define PUCAN_MSG_RTR 0x01
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struct __packed pucan_rx_msg {
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__le16 size;
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__le16 type;
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__le32 ts_low;
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__le32 ts_high;
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__le32 tag_low;
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__le32 tag_high;
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u8 channel_dlc;
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u8 client;
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__le16 flags;
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__le32 can_id;
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u8 d[0];
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};
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/* uCAN error types */
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#define PUCAN_ERMSG_BIT_ERROR 0
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#define PUCAN_ERMSG_FORM_ERROR 1
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#define PUCAN_ERMSG_STUFF_ERROR 2
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#define PUCAN_ERMSG_OTHER_ERROR 3
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#define PUCAN_ERMSG_ERR_CNT_DEC 4
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struct __packed pucan_error_msg {
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__le16 size;
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__le16 type;
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__le32 ts_low;
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__le32 ts_high;
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u8 channel_type_d;
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u8 code_g;
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u8 tx_err_cnt;
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u8 rx_err_cnt;
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};
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static inline int pucan_error_get_channel(const struct pucan_error_msg *msg)
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{
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return msg->channel_type_d & 0x0f;
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}
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#define PUCAN_RX_BARRIER 0x10
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#define PUCAN_BUS_PASSIVE 0x20
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#define PUCAN_BUS_WARNING 0x40
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#define PUCAN_BUS_BUSOFF 0x80
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struct __packed pucan_status_msg {
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__le16 size;
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__le16 type;
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__le32 ts_low;
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__le32 ts_high;
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u8 channel_p_w_b;
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u8 unused[3];
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};
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static inline int pucan_status_get_channel(const struct pucan_status_msg *msg)
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{
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return msg->channel_p_w_b & 0x0f;
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}
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static inline int pucan_status_is_rx_barrier(const struct pucan_status_msg *msg)
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{
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return msg->channel_p_w_b & PUCAN_RX_BARRIER;
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}
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static inline int pucan_status_is_passive(const struct pucan_status_msg *msg)
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{
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return msg->channel_p_w_b & PUCAN_BUS_PASSIVE;
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}
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static inline int pucan_status_is_warning(const struct pucan_status_msg *msg)
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{
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return msg->channel_p_w_b & PUCAN_BUS_WARNING;
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}
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static inline int pucan_status_is_busoff(const struct pucan_status_msg *msg)
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{
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return msg->channel_p_w_b & PUCAN_BUS_BUSOFF;
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}
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/* uCAN transmitted message format */
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#define PUCAN_MSG_CHANNEL_DLC(c, d) (((c) & 0xf) | ((d) << 4))
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struct __packed pucan_tx_msg {
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__le16 size;
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__le16 type;
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__le32 tag_low;
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__le32 tag_high;
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u8 channel_dlc;
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u8 client;
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__le16 flags;
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__le32 can_id;
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u8 d[0];
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};
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/* build the cmd opcode_channel field with respect to the correct endianness */
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static inline __le16 pucan_cmd_opcode_channel(int index, int opcode)
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{
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return cpu_to_le16(((index) << 12) | ((opcode) & 0x3ff));
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}
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/* return the channel number part from any received message channel_dlc field */
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static inline int pucan_msg_get_channel(const struct pucan_rx_msg *msg)
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{
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return msg->channel_dlc & 0xf;
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}
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/* return the dlc value from any received message channel_dlc field */
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static inline int pucan_msg_get_dlc(const struct pucan_rx_msg *msg)
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{
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return msg->channel_dlc >> 4;
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}
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static inline int pucan_ermsg_get_channel(const struct pucan_error_msg *msg)
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{
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return msg->channel_type_d & 0x0f;
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}
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static inline int pucan_stmsg_get_channel(const struct pucan_status_msg *msg)
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{
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return msg->channel_p_w_b & 0x0f;
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}
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#endif
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