![Palmer Dabbelt](/assets/img/avatar_default.png)
It's a bit confusing exactly what this function does: it actually returns the hartid of an OF processor node, failing with -1 on invalid nodes. I've changed the name to _hartid() in order to make that a bit more clear, as well as adding a comment. Signed-off-by: Palmer Dabbelt <palmer@sifive.com> [Atish: code comment formatting update] Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
166 lines
4.1 KiB
C
166 lines
4.1 KiB
C
/*
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* Copyright (C) 2012 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <linux/seq_file.h>
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#include <linux/of.h>
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/*
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* Returns the hart ID of the given device tree node, or -1 if the device tree
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* node isn't a RISC-V hart.
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*/
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int riscv_of_processor_hartid(struct device_node *node)
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{
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const char *isa, *status;
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u32 hart;
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if (!of_device_is_compatible(node, "riscv")) {
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pr_warn("Found incompatible CPU\n");
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return -(ENODEV);
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}
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if (of_property_read_u32(node, "reg", &hart)) {
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pr_warn("Found CPU without hart ID\n");
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return -(ENODEV);
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}
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if (hart >= NR_CPUS) {
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pr_info("Found hart ID %d, which is above NR_CPUs. Disabling this hart\n", hart);
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return -(ENODEV);
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}
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if (of_property_read_string(node, "status", &status)) {
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pr_warn("CPU with hartid=%d has no \"status\" property\n", hart);
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return -(ENODEV);
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}
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if (strcmp(status, "okay")) {
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pr_info("CPU with hartid=%d has a non-okay status of \"%s\"\n", hart, status);
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return -(ENODEV);
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}
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if (of_property_read_string(node, "riscv,isa", &isa)) {
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pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
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return -(ENODEV);
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}
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if (isa[0] != 'r' || isa[1] != 'v') {
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pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
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return -(ENODEV);
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}
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return hart;
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}
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#ifdef CONFIG_PROC_FS
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static void print_isa(struct seq_file *f, const char *orig_isa)
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{
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static const char *ext = "mafdc";
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const char *isa = orig_isa;
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const char *e;
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/*
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* Linux doesn't support rv32e or rv128i, and we only support booting
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* kernels on harts with the same ISA that the kernel is compiled for.
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*/
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#if defined(CONFIG_32BIT)
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if (strncmp(isa, "rv32i", 5) != 0)
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return;
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#elif defined(CONFIG_64BIT)
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if (strncmp(isa, "rv64i", 5) != 0)
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return;
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#endif
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/* Print the base ISA, as we already know it's legal. */
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seq_puts(f, "isa\t: ");
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seq_write(f, isa, 5);
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isa += 5;
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/*
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* Check the rest of the ISA string for valid extensions, printing those
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* we find. RISC-V ISA strings define an order, so we only print the
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* extension bits when they're in order.
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*/
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for (e = ext; *e != '\0'; ++e) {
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if (isa[0] == e[0]) {
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seq_write(f, isa, 1);
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isa++;
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}
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}
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/*
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* If we were given an unsupported ISA in the device tree then print
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* a bit of info describing what went wrong.
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*/
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if (isa[0] != '\0')
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pr_info("unsupported ISA \"%s\" in device tree", orig_isa);
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}
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static void print_mmu(struct seq_file *f, const char *mmu_type)
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{
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#if defined(CONFIG_32BIT)
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if (strcmp(mmu_type, "riscv,sv32") != 0)
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return;
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#elif defined(CONFIG_64BIT)
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if (strcmp(mmu_type, "riscv,sv39") != 0 &&
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strcmp(mmu_type, "riscv,sv48") != 0)
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return;
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#endif
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seq_printf(f, "mmu\t: %s\n", mmu_type+6);
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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*pos = cpumask_next(*pos - 1, cpu_online_mask);
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if ((*pos) < nr_cpu_ids)
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return (void *)(uintptr_t)(1 + *pos);
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return NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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(*pos)++;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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static int c_show(struct seq_file *m, void *v)
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{
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unsigned long hart_id = (unsigned long)v - 1;
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struct device_node *node = of_get_cpu_node(hart_id, NULL);
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const char *compat, *isa, *mmu;
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seq_printf(m, "hart\t: %lu\n", hart_id);
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if (!of_property_read_string(node, "riscv,isa", &isa))
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print_isa(m, isa);
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if (!of_property_read_string(node, "mmu-type", &mmu))
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print_mmu(m, mmu);
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if (!of_property_read_string(node, "compatible", &compat)
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&& strcmp(compat, "riscv"))
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seq_printf(m, "uarch\t: %s\n", compat);
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seq_puts(m, "\n");
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return 0;
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = c_show
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};
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#endif /* CONFIG_PROC_FS */
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