![Linus Torvalds](/assets/img/avatar_default.png)
Highlights: - Restructure Linux PTE on Book3S/64 to Radix format from Paul Mackerras - Book3s 64 MMU cleanup in preparation for Radix MMU from Aneesh Kumar K.V - Add POWER9 cputable entry from Michael Neuling - FPU/Altivec/VSX save/restore optimisations from Cyril Bur - Add support for new ftrace ABI on ppc64le from Torsten Duwe Various cleanups & minor fixes from: - Adam Buchbinder, Andrew Donnellan, Balbir Singh, Christophe Leroy, Cyril Bur, Luis Henriques, Madhavan Srinivasan, Pan Xinhui, Russell Currey, Sukadev Bhattiprolu, Suraj Jitindar Singh. General: - atomics: Allow architectures to define their own __atomic_op_* helpers from Boqun Feng - Implement atomic{, 64}_*_return_* variants and acquire/release/relaxed variants for (cmp)xchg from Boqun Feng - Add powernv_defconfig from Jeremy Kerr - Fix BUG_ON() reporting in real mode from Balbir Singh - Add xmon command to dump OPAL msglog from Andrew Donnellan - Add xmon command to dump process/task similar to ps(1) from Douglas Miller - Clean up memory hotplug failure paths from David Gibson pci/eeh: - Redesign SR-IOV on PowerNV to give absolute isolation between VFs from Wei Yang. - EEH Support for SRIOV VFs from Wei Yang and Gavin Shan. - PCI/IOV: Rename and export virtfn_{add, remove} from Wei Yang - PCI: Add pcibios_bus_add_device() weak function from Wei Yang - MAINTAINERS: Update EEH details and maintainership from Russell Currey cxl: - Support added to the CXL driver for running on both bare-metal and hypervisor systems, from Christophe Lombard and Frederic Barrat. - Ignore probes for virtual afu pci devices from Vaibhav Jain perf: - Export Power8 generic and cache events to sysfs from Sukadev Bhattiprolu - hv-24x7: Fix usage with chip events, display change in counter values, display domain indices in sysfs, eliminate domain suffix in event names, from Sukadev Bhattiprolu Freescale: - Updates from Scott: "Highlights include 8xx optimizations, 32-bit checksum optimizations, 86xx consolidation, e5500/e6500 cpu hotplug, more fman and other dt bits, and minor fixes/cleanup." -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJW69OrAAoJEFHr6jzI4aWAe5EQAJw/hE6WBQc6a7Tj70AnXOqR qk/m5pZjuTwQxfBteIvHR1pE5eXdlvtAjcD254LVkFkAbIn19W/h2k0VX/nlee7P n/VRHRifjtGmukqHrPYJJ7ua9mNlY7pxh3leGSixBFASnSWqMxNNNziNQtSTcuCs TjHiw6NkZ/kzeunA4bAfE4yHVUZjmL74oiS9JbLyaVHqoW4fqWLlh26AKo2yYMZI qPicBBG4HBi3FGvoexnKxlJNdcV4HO7LzDjJmCSfUKYCJi+Pw19T5qmhso0q0qVz vHg/A8HNeG4Hn83pNVmLeQSAIQRZ3DvTtcLgbjPo+TVwm/hzrRRBWipTeOVbkLW8 2bcOXT4t7LWUq15EAJ1LYgYZGzcLrfRfUeOcuQ1TWd3+PcfY9pE7FmizsxAAfaVe E9j9mpz4XnIqBtWkFHneTIHkQ5OWptyKuZJEaYH0nut4VsP0k8NarkseafGqBPu7 5eG83gbiQbCVixfOgblV9eocJ29JcwpjPAY4CZSGJimShg909FV7WRgZgJkKWrbK dBRco8Jcp4VglGfo2qymv7Uj4KwQoypBREOhiKUvrAsVlDxPfx+bcskhjGu9xGDC xs/+nme0/lKa/wg5K4C3mQ1GAlkMWHI0ojhJjsyODbetup5UbkEu03wjAaTdO9dT Y6ptGm0rYAJluPNlziFj =qkAt -----END PGP SIGNATURE----- Merge tag 'powerpc-4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: "This was delayed a day or two by some build-breakage on old toolchains which we've now fixed. There's two PCI commits both acked by Bjorn. There's one commit to mm/hugepage.c which is (co)authored by Kirill. Highlights: - Restructure Linux PTE on Book3S/64 to Radix format from Paul Mackerras - Book3s 64 MMU cleanup in preparation for Radix MMU from Aneesh Kumar K.V - Add POWER9 cputable entry from Michael Neuling - FPU/Altivec/VSX save/restore optimisations from Cyril Bur - Add support for new ftrace ABI on ppc64le from Torsten Duwe Various cleanups & minor fixes from: - Adam Buchbinder, Andrew Donnellan, Balbir Singh, Christophe Leroy, Cyril Bur, Luis Henriques, Madhavan Srinivasan, Pan Xinhui, Russell Currey, Sukadev Bhattiprolu, Suraj Jitindar Singh. General: - atomics: Allow architectures to define their own __atomic_op_* helpers from Boqun Feng - Implement atomic{, 64}_*_return_* variants and acquire/release/ relaxed variants for (cmp)xchg from Boqun Feng - Add powernv_defconfig from Jeremy Kerr - Fix BUG_ON() reporting in real mode from Balbir Singh - Add xmon command to dump OPAL msglog from Andrew Donnellan - Add xmon command to dump process/task similar to ps(1) from Douglas Miller - Clean up memory hotplug failure paths from David Gibson pci/eeh: - Redesign SR-IOV on PowerNV to give absolute isolation between VFs from Wei Yang. - EEH Support for SRIOV VFs from Wei Yang and Gavin Shan. - PCI/IOV: Rename and export virtfn_{add, remove} from Wei Yang - PCI: Add pcibios_bus_add_device() weak function from Wei Yang - MAINTAINERS: Update EEH details and maintainership from Russell Currey cxl: - Support added to the CXL driver for running on both bare-metal and hypervisor systems, from Christophe Lombard and Frederic Barrat. - Ignore probes for virtual afu pci devices from Vaibhav Jain perf: - Export Power8 generic and cache events to sysfs from Sukadev Bhattiprolu - hv-24x7: Fix usage with chip events, display change in counter values, display domain indices in sysfs, eliminate domain suffix in event names, from Sukadev Bhattiprolu Freescale: - Updates from Scott: "Highlights include 8xx optimizations, 32-bit checksum optimizations, 86xx consolidation, e5500/e6500 cpu hotplug, more fman and other dt bits, and minor fixes/cleanup" * tag 'powerpc-4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (179 commits) powerpc: Fix unrecoverable SLB miss during restore_math() powerpc/8xx: Fix do_mtspr_cpu6() build on older compilers powerpc/rcpm: Fix build break when SMP=n powerpc/book3e-64: Use hardcoded mttmr opcode powerpc/fsl/dts: Add "jedec,spi-nor" flash compatible powerpc/T104xRDB: add tdm riser card node to device tree powerpc32: PAGE_EXEC required for inittext powerpc/mpc85xx: Add pcsphy nodes to FManV3 device tree powerpc/mpc85xx: Add MDIO bus muxing support to the board device tree(s) powerpc/86xx: Introduce and use common dtsi powerpc/86xx: Update device tree powerpc/86xx: Move dts files to fsl directory powerpc/86xx: Switch to kconfig fragments approach powerpc/86xx: Update defconfigs powerpc/86xx: Consolidate common platform code powerpc32: Remove one insn in mulhdu powerpc32: small optimisation in flush_icache_range() powerpc: Simplify test in __dma_sync() powerpc32: move xxxxx_dcache_range() functions inline powerpc32: Remove clear_pages() and define clear_page() inline ...
520 lines
14 KiB
C
520 lines
14 KiB
C
/*
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* Glue code for AES implementation for SPE instructions (PPC)
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*
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* Based on generic implementation. The assembler module takes care
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* about the SPE registers so it can run from interrupt context.
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*
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* Copyright (c) 2015 Markus Stockhausen <stockhausen@collogia.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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*/
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#include <crypto/aes.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/crypto.h>
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#include <asm/byteorder.h>
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#include <asm/switch_to.h>
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#include <crypto/algapi.h>
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#include <crypto/xts.h>
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/*
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* MAX_BYTES defines the number of bytes that are allowed to be processed
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* between preempt_disable() and preempt_enable(). e500 cores can issue two
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* instructions per clock cycle using one 32/64 bit unit (SU1) and one 32
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* bit unit (SU2). One of these can be a memory access that is executed via
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* a single load and store unit (LSU). XTS-AES-256 takes ~780 operations per
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* 16 byte block block or 25 cycles per byte. Thus 768 bytes of input data
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* will need an estimated maximum of 20,000 cycles. Headroom for cache misses
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* included. Even with the low end model clocked at 667 MHz this equals to a
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* critical time window of less than 30us. The value has been chosen to
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* process a 512 byte disk block in one or a large 1400 bytes IPsec network
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* packet in two runs.
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*
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*/
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#define MAX_BYTES 768
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struct ppc_aes_ctx {
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u32 key_enc[AES_MAX_KEYLENGTH_U32];
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u32 key_dec[AES_MAX_KEYLENGTH_U32];
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u32 rounds;
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};
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struct ppc_xts_ctx {
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u32 key_enc[AES_MAX_KEYLENGTH_U32];
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u32 key_dec[AES_MAX_KEYLENGTH_U32];
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u32 key_twk[AES_MAX_KEYLENGTH_U32];
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u32 rounds;
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};
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extern void ppc_encrypt_aes(u8 *out, const u8 *in, u32 *key_enc, u32 rounds);
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extern void ppc_decrypt_aes(u8 *out, const u8 *in, u32 *key_dec, u32 rounds);
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extern void ppc_encrypt_ecb(u8 *out, const u8 *in, u32 *key_enc, u32 rounds,
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u32 bytes);
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extern void ppc_decrypt_ecb(u8 *out, const u8 *in, u32 *key_dec, u32 rounds,
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u32 bytes);
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extern void ppc_encrypt_cbc(u8 *out, const u8 *in, u32 *key_enc, u32 rounds,
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u32 bytes, u8 *iv);
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extern void ppc_decrypt_cbc(u8 *out, const u8 *in, u32 *key_dec, u32 rounds,
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u32 bytes, u8 *iv);
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extern void ppc_crypt_ctr (u8 *out, const u8 *in, u32 *key_enc, u32 rounds,
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u32 bytes, u8 *iv);
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extern void ppc_encrypt_xts(u8 *out, const u8 *in, u32 *key_enc, u32 rounds,
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u32 bytes, u8 *iv, u32 *key_twk);
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extern void ppc_decrypt_xts(u8 *out, const u8 *in, u32 *key_dec, u32 rounds,
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u32 bytes, u8 *iv, u32 *key_twk);
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extern void ppc_expand_key_128(u32 *key_enc, const u8 *key);
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extern void ppc_expand_key_192(u32 *key_enc, const u8 *key);
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extern void ppc_expand_key_256(u32 *key_enc, const u8 *key);
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extern void ppc_generate_decrypt_key(u32 *key_dec,u32 *key_enc,
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unsigned int key_len);
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static void spe_begin(void)
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{
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/* disable preemption and save users SPE registers if required */
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preempt_disable();
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enable_kernel_spe();
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}
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static void spe_end(void)
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{
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disable_kernel_spe();
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/* reenable preemption */
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preempt_enable();
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}
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static int ppc_aes_setkey(struct crypto_tfm *tfm, const u8 *in_key,
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unsigned int key_len)
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{
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struct ppc_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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if (key_len != AES_KEYSIZE_128 &&
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key_len != AES_KEYSIZE_192 &&
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key_len != AES_KEYSIZE_256) {
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tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
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return -EINVAL;
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}
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switch (key_len) {
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case AES_KEYSIZE_128:
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ctx->rounds = 4;
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ppc_expand_key_128(ctx->key_enc, in_key);
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break;
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case AES_KEYSIZE_192:
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ctx->rounds = 5;
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ppc_expand_key_192(ctx->key_enc, in_key);
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break;
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case AES_KEYSIZE_256:
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ctx->rounds = 6;
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ppc_expand_key_256(ctx->key_enc, in_key);
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break;
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}
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ppc_generate_decrypt_key(ctx->key_dec, ctx->key_enc, key_len);
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return 0;
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}
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static int ppc_xts_setkey(struct crypto_tfm *tfm, const u8 *in_key,
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unsigned int key_len)
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{
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struct ppc_xts_ctx *ctx = crypto_tfm_ctx(tfm);
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int err;
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err = xts_check_key(tfm, in_key, key_len);
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if (err)
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return err;
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key_len >>= 1;
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if (key_len != AES_KEYSIZE_128 &&
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key_len != AES_KEYSIZE_192 &&
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key_len != AES_KEYSIZE_256) {
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tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
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return -EINVAL;
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}
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switch (key_len) {
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case AES_KEYSIZE_128:
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ctx->rounds = 4;
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ppc_expand_key_128(ctx->key_enc, in_key);
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ppc_expand_key_128(ctx->key_twk, in_key + AES_KEYSIZE_128);
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break;
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case AES_KEYSIZE_192:
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ctx->rounds = 5;
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ppc_expand_key_192(ctx->key_enc, in_key);
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ppc_expand_key_192(ctx->key_twk, in_key + AES_KEYSIZE_192);
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break;
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case AES_KEYSIZE_256:
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ctx->rounds = 6;
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ppc_expand_key_256(ctx->key_enc, in_key);
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ppc_expand_key_256(ctx->key_twk, in_key + AES_KEYSIZE_256);
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break;
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}
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ppc_generate_decrypt_key(ctx->key_dec, ctx->key_enc, key_len);
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return 0;
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}
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static void ppc_aes_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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{
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struct ppc_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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spe_begin();
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ppc_encrypt_aes(out, in, ctx->key_enc, ctx->rounds);
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spe_end();
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}
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static void ppc_aes_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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{
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struct ppc_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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spe_begin();
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ppc_decrypt_aes(out, in, ctx->key_dec, ctx->rounds);
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spe_end();
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}
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static int ppc_ecb_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct ppc_aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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unsigned int ubytes;
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int err;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while ((nbytes = walk.nbytes)) {
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ubytes = nbytes > MAX_BYTES ?
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nbytes - MAX_BYTES : nbytes & (AES_BLOCK_SIZE - 1);
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nbytes -= ubytes;
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spe_begin();
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ppc_encrypt_ecb(walk.dst.virt.addr, walk.src.virt.addr,
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ctx->key_enc, ctx->rounds, nbytes);
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spe_end();
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err = blkcipher_walk_done(desc, &walk, ubytes);
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}
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return err;
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}
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static int ppc_ecb_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct ppc_aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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unsigned int ubytes;
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int err;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while ((nbytes = walk.nbytes)) {
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ubytes = nbytes > MAX_BYTES ?
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nbytes - MAX_BYTES : nbytes & (AES_BLOCK_SIZE - 1);
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nbytes -= ubytes;
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spe_begin();
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ppc_decrypt_ecb(walk.dst.virt.addr, walk.src.virt.addr,
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ctx->key_dec, ctx->rounds, nbytes);
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spe_end();
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err = blkcipher_walk_done(desc, &walk, ubytes);
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}
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return err;
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}
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static int ppc_cbc_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct ppc_aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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unsigned int ubytes;
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int err;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while ((nbytes = walk.nbytes)) {
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ubytes = nbytes > MAX_BYTES ?
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nbytes - MAX_BYTES : nbytes & (AES_BLOCK_SIZE - 1);
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nbytes -= ubytes;
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spe_begin();
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ppc_encrypt_cbc(walk.dst.virt.addr, walk.src.virt.addr,
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ctx->key_enc, ctx->rounds, nbytes, walk.iv);
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spe_end();
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err = blkcipher_walk_done(desc, &walk, ubytes);
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}
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return err;
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}
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static int ppc_cbc_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct ppc_aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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unsigned int ubytes;
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int err;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while ((nbytes = walk.nbytes)) {
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ubytes = nbytes > MAX_BYTES ?
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nbytes - MAX_BYTES : nbytes & (AES_BLOCK_SIZE - 1);
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nbytes -= ubytes;
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spe_begin();
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ppc_decrypt_cbc(walk.dst.virt.addr, walk.src.virt.addr,
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ctx->key_dec, ctx->rounds, nbytes, walk.iv);
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spe_end();
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err = blkcipher_walk_done(desc, &walk, ubytes);
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}
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return err;
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}
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static int ppc_ctr_crypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct ppc_aes_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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unsigned int pbytes, ubytes;
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int err;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
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while ((pbytes = walk.nbytes)) {
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pbytes = pbytes > MAX_BYTES ? MAX_BYTES : pbytes;
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pbytes = pbytes == nbytes ?
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nbytes : pbytes & ~(AES_BLOCK_SIZE - 1);
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ubytes = walk.nbytes - pbytes;
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spe_begin();
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ppc_crypt_ctr(walk.dst.virt.addr, walk.src.virt.addr,
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ctx->key_enc, ctx->rounds, pbytes , walk.iv);
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spe_end();
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nbytes -= pbytes;
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err = blkcipher_walk_done(desc, &walk, ubytes);
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}
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return err;
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}
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static int ppc_xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct ppc_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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unsigned int ubytes;
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int err;
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u32 *twk;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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twk = ctx->key_twk;
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while ((nbytes = walk.nbytes)) {
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ubytes = nbytes > MAX_BYTES ?
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nbytes - MAX_BYTES : nbytes & (AES_BLOCK_SIZE - 1);
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nbytes -= ubytes;
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spe_begin();
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ppc_encrypt_xts(walk.dst.virt.addr, walk.src.virt.addr,
|
|
ctx->key_enc, ctx->rounds, nbytes, walk.iv, twk);
|
|
spe_end();
|
|
|
|
twk = NULL;
|
|
err = blkcipher_walk_done(desc, &walk, ubytes);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static int ppc_xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|
struct scatterlist *src, unsigned int nbytes)
|
|
{
|
|
struct ppc_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
|
|
struct blkcipher_walk walk;
|
|
unsigned int ubytes;
|
|
int err;
|
|
u32 *twk;
|
|
|
|
desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
|
|
blkcipher_walk_init(&walk, dst, src, nbytes);
|
|
err = blkcipher_walk_virt(desc, &walk);
|
|
twk = ctx->key_twk;
|
|
|
|
while ((nbytes = walk.nbytes)) {
|
|
ubytes = nbytes > MAX_BYTES ?
|
|
nbytes - MAX_BYTES : nbytes & (AES_BLOCK_SIZE - 1);
|
|
nbytes -= ubytes;
|
|
|
|
spe_begin();
|
|
ppc_decrypt_xts(walk.dst.virt.addr, walk.src.virt.addr,
|
|
ctx->key_dec, ctx->rounds, nbytes, walk.iv, twk);
|
|
spe_end();
|
|
|
|
twk = NULL;
|
|
err = blkcipher_walk_done(desc, &walk, ubytes);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* Algorithm definitions. Disabling alignment (cra_alignmask=0) was chosen
|
|
* because the e500 platform can handle unaligned reads/writes very efficently.
|
|
* This improves IPsec thoughput by another few percent. Additionally we assume
|
|
* that AES context is always aligned to at least 8 bytes because it is created
|
|
* with kmalloc() in the crypto infrastructure
|
|
*
|
|
*/
|
|
static struct crypto_alg aes_algs[] = { {
|
|
.cra_name = "aes",
|
|
.cra_driver_name = "aes-ppc-spe",
|
|
.cra_priority = 300,
|
|
.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct ppc_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_u = {
|
|
.cipher = {
|
|
.cia_min_keysize = AES_MIN_KEY_SIZE,
|
|
.cia_max_keysize = AES_MAX_KEY_SIZE,
|
|
.cia_setkey = ppc_aes_setkey,
|
|
.cia_encrypt = ppc_aes_encrypt,
|
|
.cia_decrypt = ppc_aes_decrypt
|
|
}
|
|
}
|
|
}, {
|
|
.cra_name = "ecb(aes)",
|
|
.cra_driver_name = "ecb-ppc-spe",
|
|
.cra_priority = 300,
|
|
.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct ppc_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ppc_aes_setkey,
|
|
.encrypt = ppc_ecb_encrypt,
|
|
.decrypt = ppc_ecb_decrypt,
|
|
}
|
|
}
|
|
}, {
|
|
.cra_name = "cbc(aes)",
|
|
.cra_driver_name = "cbc-ppc-spe",
|
|
.cra_priority = 300,
|
|
.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct ppc_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ppc_aes_setkey,
|
|
.encrypt = ppc_cbc_encrypt,
|
|
.decrypt = ppc_cbc_decrypt,
|
|
}
|
|
}
|
|
}, {
|
|
.cra_name = "ctr(aes)",
|
|
.cra_driver_name = "ctr-ppc-spe",
|
|
.cra_priority = 300,
|
|
.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
|
|
.cra_blocksize = 1,
|
|
.cra_ctxsize = sizeof(struct ppc_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ppc_aes_setkey,
|
|
.encrypt = ppc_ctr_crypt,
|
|
.decrypt = ppc_ctr_crypt,
|
|
}
|
|
}
|
|
}, {
|
|
.cra_name = "xts(aes)",
|
|
.cra_driver_name = "xts-ppc-spe",
|
|
.cra_priority = 300,
|
|
.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct ppc_xts_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE * 2,
|
|
.max_keysize = AES_MAX_KEY_SIZE * 2,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ppc_xts_setkey,
|
|
.encrypt = ppc_xts_encrypt,
|
|
.decrypt = ppc_xts_decrypt,
|
|
}
|
|
}
|
|
} };
|
|
|
|
static int __init ppc_aes_mod_init(void)
|
|
{
|
|
return crypto_register_algs(aes_algs, ARRAY_SIZE(aes_algs));
|
|
}
|
|
|
|
static void __exit ppc_aes_mod_fini(void)
|
|
{
|
|
crypto_unregister_algs(aes_algs, ARRAY_SIZE(aes_algs));
|
|
}
|
|
|
|
module_init(ppc_aes_mod_init);
|
|
module_exit(ppc_aes_mod_fini);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("AES-ECB/CBC/CTR/XTS, SPE optimized");
|
|
|
|
MODULE_ALIAS_CRYPTO("aes");
|
|
MODULE_ALIAS_CRYPTO("ecb(aes)");
|
|
MODULE_ALIAS_CRYPTO("cbc(aes)");
|
|
MODULE_ALIAS_CRYPTO("ctr(aes)");
|
|
MODULE_ALIAS_CRYPTO("xts(aes)");
|
|
MODULE_ALIAS_CRYPTO("aes-ppc-spe");
|