![Michael Ellerman](/assets/img/avatar_default.png)
CONFIG_PPC_STD_MMU_64 indicates support for the "standard" powerpc MMU on 64-bit CPUs. The "standard" MMU refers to the hash page table MMU found in "server" processors, from IBM mainly. Currently CONFIG_PPC_STD_MMU_64 is == CONFIG_PPC_BOOK3S_64. While it's annoying to have two symbols that always have the same value, it's not quite annoying enough to bother removing one. However with the arrival of Power9, we now have the situation where CONFIG_PPC_STD_MMU_64 is enabled, but the kernel is running using the Radix MMU - *not* the "standard" MMU. So it is now actively confusing to use it, because it implies that code is disabled or inactive when the Radix MMU is in use, however that is not necessarily true. So s/CONFIG_PPC_STD_MMU_64/CONFIG_PPC_BOOK3S_64/, and do some minor formatting updates of some of the affected lines. This will be a pain for backports, but c'est la vie. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
552 lines
13 KiB
C
552 lines
13 KiB
C
/*
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* Copyright 2016, Rashmica Gupta, IBM Corp.
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*
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* This traverses the kernel virtual memory and dumps the pages that are in
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* the hash pagetable, along with their flags to
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* /sys/kernel/debug/kernel_hash_pagetable.
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*
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* If radix is enabled then there is no hash page table and so no debugfs file
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* is generated.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#include <linux/debugfs.h>
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#include <linux/fs.h>
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#include <linux/io.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <asm/fixmap.h>
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#include <asm/pgtable.h>
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#include <linux/const.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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#include <asm/plpar_wrappers.h>
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#include <linux/memblock.h>
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#include <asm/firmware.h>
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struct pg_state {
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struct seq_file *seq;
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const struct addr_marker *marker;
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unsigned long start_address;
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unsigned int level;
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u64 current_flags;
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};
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struct addr_marker {
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unsigned long start_address;
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const char *name;
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};
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static struct addr_marker address_markers[] = {
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{ 0, "Start of kernel VM" },
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{ 0, "vmalloc() Area" },
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{ 0, "vmalloc() End" },
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{ 0, "isa I/O start" },
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{ 0, "isa I/O end" },
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{ 0, "phb I/O start" },
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{ 0, "phb I/O end" },
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{ 0, "I/O remap start" },
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{ 0, "I/O remap end" },
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{ 0, "vmemmap start" },
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{ -1, NULL },
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};
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struct flag_info {
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u64 mask;
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u64 val;
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const char *set;
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const char *clear;
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bool is_val;
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int shift;
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};
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static const struct flag_info v_flag_array[] = {
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{
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.mask = SLB_VSID_B,
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.val = SLB_VSID_B_256M,
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.set = "ssize: 256M",
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.clear = "ssize: 1T ",
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}, {
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.mask = HPTE_V_SECONDARY,
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.val = HPTE_V_SECONDARY,
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.set = "secondary",
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.clear = "primary ",
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}, {
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.mask = HPTE_V_VALID,
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.val = HPTE_V_VALID,
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.set = "valid ",
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.clear = "invalid",
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}, {
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.mask = HPTE_V_BOLTED,
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.val = HPTE_V_BOLTED,
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.set = "bolted",
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.clear = "",
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}
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};
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static const struct flag_info r_flag_array[] = {
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{
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.mask = HPTE_R_PP0 | HPTE_R_PP,
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.val = PP_RWXX,
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.set = "prot:RW--",
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}, {
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.mask = HPTE_R_PP0 | HPTE_R_PP,
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.val = PP_RWRX,
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.set = "prot:RWR-",
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}, {
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.mask = HPTE_R_PP0 | HPTE_R_PP,
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.val = PP_RWRW,
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.set = "prot:RWRW",
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}, {
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.mask = HPTE_R_PP0 | HPTE_R_PP,
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.val = PP_RXRX,
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.set = "prot:R-R-",
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}, {
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.mask = HPTE_R_PP0 | HPTE_R_PP,
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.val = PP_RXXX,
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.set = "prot:R---",
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}, {
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.mask = HPTE_R_KEY_HI | HPTE_R_KEY_LO,
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.val = HPTE_R_KEY_HI | HPTE_R_KEY_LO,
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.set = "key",
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.clear = "",
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.is_val = true,
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}, {
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.mask = HPTE_R_R,
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.val = HPTE_R_R,
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.set = "ref",
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.clear = " ",
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}, {
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.mask = HPTE_R_C,
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.val = HPTE_R_C,
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.set = "changed",
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.clear = " ",
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}, {
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.mask = HPTE_R_N,
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.val = HPTE_R_N,
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.set = "no execute",
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}, {
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.mask = HPTE_R_WIMG,
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.val = HPTE_R_W,
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.set = "writethru",
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}, {
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.mask = HPTE_R_WIMG,
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.val = HPTE_R_I,
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.set = "no cache",
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}, {
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.mask = HPTE_R_WIMG,
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.val = HPTE_R_G,
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.set = "guarded",
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}
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};
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static int calculate_pagesize(struct pg_state *st, int ps, char s[])
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{
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static const char units[] = "BKMGTPE";
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const char *unit = units;
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while (ps > 9 && unit[1]) {
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ps -= 10;
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unit++;
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}
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seq_printf(st->seq, " %s_ps: %i%c\t", s, 1<<ps, *unit);
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return ps;
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}
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static void dump_flag_info(struct pg_state *st, const struct flag_info
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*flag, u64 pte, int num)
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{
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unsigned int i;
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for (i = 0; i < num; i++, flag++) {
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const char *s = NULL;
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u64 val;
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/* flag not defined so don't check it */
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if (flag->mask == 0)
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continue;
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/* Some 'flags' are actually values */
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if (flag->is_val) {
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val = pte & flag->val;
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if (flag->shift)
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val = val >> flag->shift;
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seq_printf(st->seq, " %s:%llx", flag->set, val);
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} else {
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if ((pte & flag->mask) == flag->val)
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s = flag->set;
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else
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s = flag->clear;
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if (s)
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seq_printf(st->seq, " %s", s);
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}
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}
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}
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static void dump_hpte_info(struct pg_state *st, unsigned long ea, u64 v, u64 r,
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unsigned long rpn, int bps, int aps, unsigned long lp)
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{
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int aps_index;
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while (ea >= st->marker[1].start_address) {
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st->marker++;
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seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
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}
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seq_printf(st->seq, "0x%lx:\t", ea);
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seq_printf(st->seq, "AVPN:%llx\t", HPTE_V_AVPN_VAL(v));
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dump_flag_info(st, v_flag_array, v, ARRAY_SIZE(v_flag_array));
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seq_printf(st->seq, " rpn: %lx\t", rpn);
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dump_flag_info(st, r_flag_array, r, ARRAY_SIZE(r_flag_array));
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calculate_pagesize(st, bps, "base");
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aps_index = calculate_pagesize(st, aps, "actual");
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if (aps_index != 2)
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seq_printf(st->seq, "LP enc: %lx", lp);
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seq_putc(st->seq, '\n');
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}
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static int native_find(unsigned long ea, int psize, bool primary, u64 *v, u64
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*r)
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{
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struct hash_pte *hptep;
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unsigned long hash, vsid, vpn, hpte_group, want_v, hpte_v;
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int i, ssize = mmu_kernel_ssize;
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unsigned long shift = mmu_psize_defs[psize].shift;
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/* calculate hash */
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vsid = get_kernel_vsid(ea, ssize);
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vpn = hpt_vpn(ea, vsid, ssize);
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hash = hpt_hash(vpn, shift, ssize);
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want_v = hpte_encode_avpn(vpn, psize, ssize);
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/* to check in the secondary hash table, we invert the hash */
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if (!primary)
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hash = ~hash;
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hpte_group = (hash & htab_hash_mask) * HPTES_PER_GROUP;
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for (i = 0; i < HPTES_PER_GROUP; i++) {
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hptep = htab_address + hpte_group;
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hpte_v = be64_to_cpu(hptep->v);
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if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID)) {
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/* HPTE matches */
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*v = be64_to_cpu(hptep->v);
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*r = be64_to_cpu(hptep->r);
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return 0;
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}
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++hpte_group;
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}
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return -1;
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}
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#ifdef CONFIG_PPC_PSERIES
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static int pseries_find(unsigned long ea, int psize, bool primary, u64 *v, u64 *r)
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{
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struct hash_pte ptes[4];
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unsigned long vsid, vpn, hash, hpte_group, want_v;
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int i, j, ssize = mmu_kernel_ssize;
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long lpar_rc = 0;
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unsigned long shift = mmu_psize_defs[psize].shift;
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/* calculate hash */
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vsid = get_kernel_vsid(ea, ssize);
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vpn = hpt_vpn(ea, vsid, ssize);
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hash = hpt_hash(vpn, shift, ssize);
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want_v = hpte_encode_avpn(vpn, psize, ssize);
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/* to check in the secondary hash table, we invert the hash */
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if (!primary)
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hash = ~hash;
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hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL;
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/* see if we can find an entry in the hpte with this hash */
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for (i = 0; i < HPTES_PER_GROUP; i += 4, hpte_group += 4) {
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lpar_rc = plpar_pte_read_4(0, hpte_group, (void *)ptes);
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if (lpar_rc != H_SUCCESS)
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continue;
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for (j = 0; j < 4; j++) {
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if (HPTE_V_COMPARE(ptes[j].v, want_v) &&
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(ptes[j].v & HPTE_V_VALID)) {
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/* HPTE matches */
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*v = ptes[j].v;
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*r = ptes[j].r;
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return 0;
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}
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}
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}
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return -1;
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}
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#endif
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static void decode_r(int bps, unsigned long r, unsigned long *rpn, int *aps,
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unsigned long *lp_bits)
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{
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struct mmu_psize_def entry;
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unsigned long arpn, mask, lp;
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int penc = -2, idx = 0, shift;
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/*.
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* The LP field has 8 bits. Depending on the actual page size, some of
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* these bits are concatenated with the APRN to get the RPN. The rest
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* of the bits in the LP field is the LP value and is an encoding for
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* the base page size and the actual page size.
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*
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* - find the mmu entry for our base page size
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* - go through all page encodings and use the associated mask to
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* find an encoding that matches our encoding in the LP field.
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*/
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arpn = (r & HPTE_R_RPN) >> HPTE_R_RPN_SHIFT;
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lp = arpn & 0xff;
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entry = mmu_psize_defs[bps];
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while (idx < MMU_PAGE_COUNT) {
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penc = entry.penc[idx];
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if ((penc != -1) && (mmu_psize_defs[idx].shift)) {
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shift = mmu_psize_defs[idx].shift - HPTE_R_RPN_SHIFT;
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mask = (0x1 << (shift)) - 1;
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if ((lp & mask) == penc) {
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*aps = mmu_psize_to_shift(idx);
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*lp_bits = lp & mask;
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*rpn = arpn >> shift;
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return;
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}
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}
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idx++;
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}
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}
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static int base_hpte_find(unsigned long ea, int psize, bool primary, u64 *v,
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u64 *r)
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{
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#ifdef CONFIG_PPC_PSERIES
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if (firmware_has_feature(FW_FEATURE_LPAR))
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return pseries_find(ea, psize, primary, v, r);
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#endif
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return native_find(ea, psize, primary, v, r);
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}
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static unsigned long hpte_find(struct pg_state *st, unsigned long ea, int psize)
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{
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unsigned long slot;
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u64 v = 0, r = 0;
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unsigned long rpn, lp_bits;
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int base_psize = 0, actual_psize = 0;
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if (ea < PAGE_OFFSET)
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return -1;
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/* Look in primary table */
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slot = base_hpte_find(ea, psize, true, &v, &r);
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/* Look in secondary table */
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if (slot == -1)
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slot = base_hpte_find(ea, psize, true, &v, &r);
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/* No entry found */
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if (slot == -1)
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return -1;
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/*
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* We found an entry in the hash page table:
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* - check that this has the same base page
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* - find the actual page size
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* - find the RPN
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*/
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base_psize = mmu_psize_to_shift(psize);
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if ((v & HPTE_V_LARGE) == HPTE_V_LARGE) {
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decode_r(psize, r, &rpn, &actual_psize, &lp_bits);
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} else {
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/* 4K actual page size */
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actual_psize = 12;
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rpn = (r & HPTE_R_RPN) >> HPTE_R_RPN_SHIFT;
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/* In this case there are no LP bits */
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lp_bits = -1;
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}
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/*
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* We didn't find a matching encoding, so the PTE we found isn't for
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* this address.
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*/
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if (actual_psize == -1)
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return -1;
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dump_hpte_info(st, ea, v, r, rpn, base_psize, actual_psize, lp_bits);
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return 0;
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}
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static void walk_pte(struct pg_state *st, pmd_t *pmd, unsigned long start)
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{
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pte_t *pte = pte_offset_kernel(pmd, 0);
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unsigned long addr, pteval, psize;
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int i, status;
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for (i = 0; i < PTRS_PER_PTE; i++, pte++) {
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addr = start + i * PAGE_SIZE;
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pteval = pte_val(*pte);
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if (addr < VMALLOC_END)
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psize = mmu_vmalloc_psize;
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else
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psize = mmu_io_psize;
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#ifdef CONFIG_PPC_64K_PAGES
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/* check for secret 4K mappings */
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if (((pteval & H_PAGE_COMBO) == H_PAGE_COMBO) ||
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((pteval & H_PAGE_4K_PFN) == H_PAGE_4K_PFN))
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psize = mmu_io_psize;
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#endif
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/* check for hashpte */
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status = hpte_find(st, addr, psize);
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if (((pteval & H_PAGE_HASHPTE) != H_PAGE_HASHPTE)
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&& (status != -1)) {
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/* found a hpte that is not in the linux page tables */
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seq_printf(st->seq, "page probably bolted before linux"
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" pagetables were set: addr:%lx, pteval:%lx\n",
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addr, pteval);
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}
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}
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}
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static void walk_pmd(struct pg_state *st, pud_t *pud, unsigned long start)
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{
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pmd_t *pmd = pmd_offset(pud, 0);
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unsigned long addr;
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unsigned int i;
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for (i = 0; i < PTRS_PER_PMD; i++, pmd++) {
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addr = start + i * PMD_SIZE;
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if (!pmd_none(*pmd))
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/* pmd exists */
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walk_pte(st, pmd, addr);
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}
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}
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static void walk_pud(struct pg_state *st, pgd_t *pgd, unsigned long start)
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{
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pud_t *pud = pud_offset(pgd, 0);
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unsigned long addr;
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unsigned int i;
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for (i = 0; i < PTRS_PER_PUD; i++, pud++) {
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addr = start + i * PUD_SIZE;
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if (!pud_none(*pud))
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/* pud exists */
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walk_pmd(st, pud, addr);
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}
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}
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static void walk_pagetables(struct pg_state *st)
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{
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pgd_t *pgd = pgd_offset_k(0UL);
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unsigned int i;
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unsigned long addr;
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/*
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* Traverse the linux pagetable structure and dump pages that are in
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* the hash pagetable.
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*/
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for (i = 0; i < PTRS_PER_PGD; i++, pgd++) {
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addr = KERN_VIRT_START + i * PGDIR_SIZE;
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if (!pgd_none(*pgd))
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/* pgd exists */
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walk_pud(st, pgd, addr);
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}
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}
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static void walk_linearmapping(struct pg_state *st)
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{
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unsigned long addr;
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/*
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* Traverse the linear mapping section of virtual memory and dump pages
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* that are in the hash pagetable.
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*/
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unsigned long psize = 1 << mmu_psize_defs[mmu_linear_psize].shift;
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for (addr = PAGE_OFFSET; addr < PAGE_OFFSET +
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memblock_end_of_DRAM(); addr += psize)
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hpte_find(st, addr, mmu_linear_psize);
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}
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static void walk_vmemmap(struct pg_state *st)
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{
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#ifdef CONFIG_SPARSEMEM_VMEMMAP
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struct vmemmap_backing *ptr = vmemmap_list;
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/*
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* Traverse the vmemmaped memory and dump pages that are in the hash
|
|
* pagetable.
|
|
*/
|
|
while (ptr->list) {
|
|
hpte_find(st, ptr->virt_addr, mmu_vmemmap_psize);
|
|
ptr = ptr->list;
|
|
}
|
|
seq_puts(st->seq, "---[ vmemmap end ]---\n");
|
|
#endif
|
|
}
|
|
|
|
static void populate_markers(void)
|
|
{
|
|
address_markers[0].start_address = PAGE_OFFSET;
|
|
address_markers[1].start_address = VMALLOC_START;
|
|
address_markers[2].start_address = VMALLOC_END;
|
|
address_markers[3].start_address = ISA_IO_BASE;
|
|
address_markers[4].start_address = ISA_IO_END;
|
|
address_markers[5].start_address = PHB_IO_BASE;
|
|
address_markers[6].start_address = PHB_IO_END;
|
|
address_markers[7].start_address = IOREMAP_BASE;
|
|
address_markers[8].start_address = IOREMAP_END;
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
address_markers[9].start_address = H_VMEMMAP_BASE;
|
|
#else
|
|
address_markers[9].start_address = VMEMMAP_BASE;
|
|
#endif
|
|
}
|
|
|
|
static int ptdump_show(struct seq_file *m, void *v)
|
|
{
|
|
struct pg_state st = {
|
|
.seq = m,
|
|
.start_address = PAGE_OFFSET,
|
|
.marker = address_markers,
|
|
};
|
|
/*
|
|
* Traverse the 0xc, 0xd and 0xf areas of the kernel virtual memory and
|
|
* dump pages that are in the hash pagetable.
|
|
*/
|
|
walk_linearmapping(&st);
|
|
walk_pagetables(&st);
|
|
walk_vmemmap(&st);
|
|
return 0;
|
|
}
|
|
|
|
static int ptdump_open(struct inode *inode, struct file *file)
|
|
{
|
|
return single_open(file, ptdump_show, NULL);
|
|
}
|
|
|
|
static const struct file_operations ptdump_fops = {
|
|
.open = ptdump_open,
|
|
.read = seq_read,
|
|
.llseek = seq_lseek,
|
|
.release = single_release,
|
|
};
|
|
|
|
static int ptdump_init(void)
|
|
{
|
|
struct dentry *debugfs_file;
|
|
|
|
if (!radix_enabled()) {
|
|
populate_markers();
|
|
debugfs_file = debugfs_create_file("kernel_hash_pagetable",
|
|
0400, NULL, NULL, &ptdump_fops);
|
|
return debugfs_file ? 0 : -ENOMEM;
|
|
}
|
|
return 0;
|
|
}
|
|
device_initcall(ptdump_init);
|