![Christoph Hellwig](/assets/img/avatar_default.png)
This was used by the ide, scsi and networking code in the past to determine if they should bounce payloads. Now that the dma mapping always have to support dma to all physical memory (thanks to swiotlb for non-iommu systems) there is no need to this crude hack any more. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Palmer Dabbelt <palmer@sifive.com> (for riscv) Reviewed-by: Jens Axboe <axboe@kernel.dk>
220 lines
5.5 KiB
C
220 lines
5.5 KiB
C
/*
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* DMA implementation for Hexagon
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*
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* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/dma-direct.h>
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#include <linux/bootmem.h>
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#include <linux/genalloc.h>
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#include <asm/dma-mapping.h>
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#include <linux/module.h>
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#include <asm/page.h>
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#define HEXAGON_MAPPING_ERROR 0
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const struct dma_map_ops *dma_ops;
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EXPORT_SYMBOL(dma_ops);
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static inline void *dma_addr_to_virt(dma_addr_t dma_addr)
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{
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return phys_to_virt((unsigned long) dma_addr);
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}
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static struct gen_pool *coherent_pool;
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/* Allocates from a pool of uncached memory that was reserved at boot time */
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static void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_addr, gfp_t flag,
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unsigned long attrs)
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{
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void *ret;
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/*
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* Our max_low_pfn should have been backed off by 16MB in
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* mm/init.c to create DMA coherent space. Use that as the VA
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* for the pool.
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*/
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if (coherent_pool == NULL) {
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coherent_pool = gen_pool_create(PAGE_SHIFT, -1);
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if (coherent_pool == NULL)
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panic("Can't create %s() memory pool!", __func__);
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else
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gen_pool_add(coherent_pool,
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pfn_to_virt(max_low_pfn),
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hexagon_coherent_pool_size, -1);
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}
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ret = (void *) gen_pool_alloc(coherent_pool, size);
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if (ret) {
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memset(ret, 0, size);
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*dma_addr = (dma_addr_t) virt_to_phys(ret);
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} else
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*dma_addr = ~0;
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return ret;
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}
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static void hexagon_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_addr, unsigned long attrs)
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{
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gen_pool_free(coherent_pool, (unsigned long) vaddr, size);
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}
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static int check_addr(const char *name, struct device *hwdev,
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dma_addr_t bus, size_t size)
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{
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if (hwdev && hwdev->dma_mask && !dma_capable(hwdev, bus, size)) {
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if (*hwdev->dma_mask >= DMA_BIT_MASK(32))
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printk(KERN_ERR
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"%s: overflow %Lx+%zu of device mask %Lx\n",
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name, (long long)bus, size,
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(long long)*hwdev->dma_mask);
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return 0;
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}
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return 1;
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}
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static int hexagon_map_sg(struct device *hwdev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *s;
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int i;
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WARN_ON(nents == 0 || sg[0].length == 0);
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for_each_sg(sg, s, nents, i) {
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s->dma_address = sg_phys(s);
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if (!check_addr("map_sg", hwdev, s->dma_address, s->length))
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return 0;
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s->dma_length = s->length;
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if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
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continue;
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flush_dcache_range(dma_addr_to_virt(s->dma_address),
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dma_addr_to_virt(s->dma_address + s->length));
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}
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return nents;
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}
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/*
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* address is virtual
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*/
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static inline void dma_sync(void *addr, size_t size,
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enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_TO_DEVICE:
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hexagon_clean_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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case DMA_FROM_DEVICE:
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hexagon_inv_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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case DMA_BIDIRECTIONAL:
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flush_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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default:
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BUG();
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}
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}
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/**
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* hexagon_map_page() - maps an address for device DMA
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* @dev: pointer to DMA device
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* @page: pointer to page struct of DMA memory
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* @offset: offset within page
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* @size: size of memory to map
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* @dir: transfer direction
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* @attrs: pointer to DMA attrs (not used)
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*
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* Called to map a memory address to a DMA address prior
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* to accesses to/from device.
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*
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* We don't particularly have many hoops to jump through
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* so far. Straight translation between phys and virtual.
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*
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* DMA is not cache coherent so sync is necessary; this
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* seems to be a convenient place to do it.
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*
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*/
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static dma_addr_t hexagon_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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dma_addr_t bus = page_to_phys(page) + offset;
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WARN_ON(size == 0);
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if (!check_addr("map_single", dev, bus, size))
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return HEXAGON_MAPPING_ERROR;
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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dma_sync(dma_addr_to_virt(bus), size, dir);
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return bus;
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}
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static void hexagon_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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dma_sync(dma_addr_to_virt(dma_handle), size, dir);
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}
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static void hexagon_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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dma_sync(dma_addr_to_virt(dma_handle), size, dir);
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}
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static int hexagon_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return dma_addr == HEXAGON_MAPPING_ERROR;
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}
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const struct dma_map_ops hexagon_dma_ops = {
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.alloc = hexagon_dma_alloc_coherent,
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.free = hexagon_free_coherent,
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.map_sg = hexagon_map_sg,
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.map_page = hexagon_map_page,
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.sync_single_for_cpu = hexagon_sync_single_for_cpu,
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.sync_single_for_device = hexagon_sync_single_for_device,
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.mapping_error = hexagon_mapping_error,
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};
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void __init hexagon_dma_init(void)
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{
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if (dma_ops)
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return;
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dma_ops = &hexagon_dma_ops;
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}
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