![Jiri Kosina](/assets/img/avatar_default.png)
Remove all code which is dead for in-kernel driver due to being ifdefed by LINUX_VERSION_CODE. While at it, also remove surrounding code which is commented out, or '#if 1' nops. Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
558 lines
17 KiB
C
558 lines
17 KiB
C
/* pmc93x6_eeprom.c - PMC's 93LC46 EEPROM Device
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*
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* The 93LC46 is a low-power, serial Electrically Erasable and
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* Programmable Read Only Memory organized as 128 8-bit bytes.
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*
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* Accesses to the 93LC46 are done in a bit serial stream, organized
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* in a 3 wire format. Writes are internally timed by the device
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* (the In data bit is pulled low until the write is complete and
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* then is pulled high) and take about 6 milliseconds.
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*
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* Copyright (C) 2003-2005 SBE, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/types.h>
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#include "pmcc4_sysdep.h"
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#include "sbecom_inline_linux.h"
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#include "pmcc4.h"
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#include "sbe_promformat.h"
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#ifndef TRUE
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#define TRUE 1
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#define FALSE 0
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#endif
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#ifdef SBE_INCLUDE_SYMBOLS
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#define STATIC
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#else
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#define STATIC static
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#endif
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/*------------------------------------------------------------------------
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* EEPROM address definitions
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*------------------------------------------------------------------------
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*
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* The offset in the definitions below allows the test to skip over
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* areas of the EEPROM that other programs (such a VxWorks) are
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* using.
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*/
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#define EE_MFG (long)0 /* Index to manufacturing record */
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#define EE_FIRST 0x28 /* Index to start testing at */
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#define EE_LIMIT 128 /* Index to end testing at */
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/* Bit Ordering for Instructions
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**
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** A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB (lsb, or 1st bit out)
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**
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*/
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#define EPROM_EWEN 0x0019 /* Erase/Write enable (reversed) */
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#define EPROM_EWDS 0x0001 /* Erase/Write disable (reversed) */
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#define EPROM_READ 0x0003 /* Read (reversed) */
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#define EPROM_WRITE 0x0005 /* Write (reversed) */
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#define EPROM_ERASE 0x0007 /* Erase (reversed) */
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#define EPROM_ERAL 0x0009 /* Erase All (reversed) */
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#define EPROM_WRAL 0x0011 /* Write All (reversed) */
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#define EPROM_ADR_SZ 7 /* Number of bits in offset address */
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#define EPROM_OP_SZ 3 /* Number of bits in command */
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#define SIZE_ADDR_OP (EPROM_ADR_SZ + EPROM_OP_SZ)
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#define LC46A_MAX_OPS 10 /* Number of bits in Instruction */
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#define NUM_OF_BITS 8 /* Number of bits in data */
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/* EEPROM signal bits */
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#define EPROM_ACTIVE_OUT_BIT 0x0001 /* Out data bit */
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#define EPROM_ACTIVE_IN_BIT 0x0002 /* In data bit */
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#define ACTIVE_IN_BIT_SHIFT 0x0001 /* Shift In data bit to LSB */
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#define EPROM_ENCS 0x0004 /* Set EEPROM CS during operation */
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/*------------------------------------------------------------------------
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* The ByteReverse table is used to reverses the 8 bits within a byte
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*------------------------------------------------------------------------
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*/
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static unsigned char ByteReverse[256];
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static int ByteReverseBuilt = FALSE;
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/*------------------------------------------------------------------------
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* mfg_template - initial serial EEPROM data structure
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*------------------------------------------------------------------------
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*/
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short mfg_template[sizeof (FLD_TYPE2)] =
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{
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PROM_FORMAT_TYPE2, /* type; */
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0x00, 0x1A, /* length[2]; */
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0x00, 0x00, 0x00, 0x00, /* Crc32[4]; */
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0x11, 0x76, /* Id[2]; */
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0x07, 0x05, /* SubId[2] E1; */
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0x00, 0xA0, 0xD6, 0x00, 0x00, 0x00, /* Serial[6]; */
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0x00, 0x00, 0x00, 0x00, /* CreateTime[4]; */
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0x00, 0x00, 0x00, 0x00, /* HeatRunTime[4]; */
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0x00, 0x00, 0x00, 0x00, /* HeatRunIterations[4]; */
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0x00, 0x00, 0x00, 0x00, /* HeatRunErrors[4]; */
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};
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/*------------------------------------------------------------------------
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* BuildByteReverse - build the 8-bit reverse table
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*------------------------------------------------------------------------
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*
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* The 'ByteReverse' table reverses the 8 bits within a byte
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* (the MSB becomes the LSB etc.).
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*/
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STATIC void
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BuildByteReverse (void)
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{
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long half; /* Used to build by powers to 2 */
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int i;
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ByteReverse[0] = 0;
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for (half = 1; half < sizeof (ByteReverse); half <<= 1)
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for (i = 0; i < half; i++)
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ByteReverse[half + i] = (char) (ByteReverse[i] | (0x80 / half));
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ByteReverseBuilt = TRUE;
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}
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/*------------------------------------------------------------------------
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* eeprom_delay - small delay for EEPROM timing
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*------------------------------------------------------------------------
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*/
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STATIC void
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eeprom_delay (void)
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{
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int timeout;
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for (timeout = 20; timeout; --timeout)
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{
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OS_uwait_dummy ();
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}
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}
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/*------------------------------------------------------------------------
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* eeprom_put_byte - Send a byte to the EEPROM serially
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*------------------------------------------------------------------------
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*
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* Given the PCI address and the data, this routine serially sends
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* the data to the EEPROM.
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*/
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void
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eeprom_put_byte (long addr, long data, int count)
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{
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u_int32_t output;
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while (--count >= 0)
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{
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output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0; /* Get next data bit */
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output |= EPROM_ENCS; /* Add Chip Select */
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data >>= 1;
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eeprom_delay ();
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pci_write_32 ((u_int32_t *) addr, output); /* Output it */
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}
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}
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/*------------------------------------------------------------------------
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* eeprom_get_byte - Receive a byte from the EEPROM serially
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*------------------------------------------------------------------------
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*
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* Given the PCI address, this routine serially fetches the data
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* from the EEPROM.
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*/
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u_int32_t
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eeprom_get_byte (long addr)
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{
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u_int32_t input;
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u_int32_t data;
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int count;
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/* Start the Reading of DATA
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**
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** The first read is a dummy as the data is latched in the
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** EPLD and read on the next read access to the EEPROM.
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*/
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input = pci_read_32 ((u_int32_t *) addr);
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data = 0;
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count = NUM_OF_BITS;
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while (--count >= 0)
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{
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eeprom_delay ();
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input = pci_read_32 ((u_int32_t *) addr);
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data <<= 1; /* Shift data over */
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data |= (input & EPROM_ACTIVE_IN_BIT) ? 1 : 0;
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}
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return data;
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}
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/*------------------------------------------------------------------------
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* disable_pmc_eeprom - Disable writes to the EEPROM
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*------------------------------------------------------------------------
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*
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* Issue the EEPROM command to disable writes.
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*/
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STATIC void
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disable_pmc_eeprom (long addr)
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{
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eeprom_put_byte (addr, EPROM_EWDS, SIZE_ADDR_OP);
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pci_write_32 ((u_int32_t *) addr, 0); /* this removes Chip Select
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* from EEPROM */
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}
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/*------------------------------------------------------------------------
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* enable_pmc_eeprom - Enable writes to the EEPROM
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*------------------------------------------------------------------------
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*
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* Issue the EEPROM command to enable writes.
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*/
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STATIC void
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enable_pmc_eeprom (long addr)
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{
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eeprom_put_byte (addr, EPROM_EWEN, SIZE_ADDR_OP);
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pci_write_32 ((u_int32_t *) addr, 0); /* this removes Chip Select
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* from EEPROM */
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}
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/*------------------------------------------------------------------------
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* pmc_eeprom_read - EEPROM location read
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*------------------------------------------------------------------------
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*
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* Given a EEPROM PCI address and location offset, this routine returns
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* the contents of the specified location to the calling routine.
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*/
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u_int32_t
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pmc_eeprom_read (long addr, long mem_offset)
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{
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u_int32_t data; /* Data from chip */
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if (!ByteReverseBuilt)
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BuildByteReverse ();
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mem_offset = ByteReverse[0x7F & mem_offset]; /* Reverse address */
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/*
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* NOTE: The max offset address is 128 or half the reversal table. So the
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* LSB is always zero and counts as a built in shift of one bit. So even
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* though we need to shift 3 bits to make room for the command, we only
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* need to shift twice more because of the built in shift.
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*/
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mem_offset <<= 2; /* Shift for command */
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mem_offset |= EPROM_READ; /* Add command */
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eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP); /* Output chip address */
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data = eeprom_get_byte (addr); /* Read chip data */
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pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select from
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* EEPROM */
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return (data & 0x000000FF);
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}
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/*------------------------------------------------------------------------
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* pmc_eeprom_write - EEPROM location write
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*------------------------------------------------------------------------
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*
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* Given a EEPROM PCI address, location offset and value, this
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* routine writes the value to the specified location.
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*
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* Note: it is up to the caller to determine if the write
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* operation succeeded.
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*/
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int
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pmc_eeprom_write (long addr, long mem_offset, u_int32_t data)
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{
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volatile u_int32_t temp;
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int count;
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if (!ByteReverseBuilt)
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BuildByteReverse ();
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mem_offset = ByteReverse[0x7F & mem_offset]; /* Reverse address */
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/*
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* NOTE: The max offset address is 128 or half the reversal table. So the
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* LSB is always zero and counts as a built in shift of one bit. So even
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* though we need to shift 3 bits to make room for the command, we only
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* need to shift twice more because of the built in shift.
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*/
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mem_offset <<= 2; /* Shift for command */
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mem_offset |= EPROM_WRITE; /* Add command */
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eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP); /* Output chip address */
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data = ByteReverse[0xFF & data];/* Reverse data */
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eeprom_put_byte (addr, data, NUM_OF_BITS); /* Output chip data */
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pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select from
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* EEPROM */
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/*
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** Must see Data In at a low state before completing this transaction.
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**
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** Afterwards, the data bit will return to a high state, ~6 ms, terminating
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** the operation.
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*/
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pci_write_32 ((u_int32_t *) addr, EPROM_ENCS); /* Re-enable Chip Select */
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temp = pci_read_32 ((u_int32_t *) addr); /* discard first read */
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temp = pci_read_32 ((u_int32_t *) addr);
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if (temp & EPROM_ACTIVE_IN_BIT)
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{
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temp = pci_read_32 ((u_int32_t *) addr);
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if (temp & EPROM_ACTIVE_IN_BIT)
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{
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pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select
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* from EEPROM */
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return (1);
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}
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}
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count = 1000;
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while (count--)
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{
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for (temp = 0; temp < 0x10; temp++)
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OS_uwait_dummy ();
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if (pci_read_32 ((u_int32_t *) addr) & EPROM_ACTIVE_IN_BIT)
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break;
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}
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if (count == -1)
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return (2);
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return (0);
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}
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/*------------------------------------------------------------------------
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* pmcGetBuffValue - read the specified value from buffer
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*------------------------------------------------------------------------
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*/
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long
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pmcGetBuffValue (char *ptr, int size)
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{
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long value = 0;
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int index;
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for (index = 0; index < size; ++index)
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{
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value <<= 8;
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value |= ptr[index] & 0xFF;
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}
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return value;
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}
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/*------------------------------------------------------------------------
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* pmcSetBuffValue - save the specified value to buffer
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*------------------------------------------------------------------------
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*/
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void
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pmcSetBuffValue (char *ptr, long value, int size)
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{
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int index = size;
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while (--index >= 0)
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{
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ptr[index] = (char) (value & 0xFF);
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value >>= 8;
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}
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}
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/*------------------------------------------------------------------------
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* pmc_eeprom_read_buffer - read EEPROM data into specified buffer
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*------------------------------------------------------------------------
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*/
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void
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pmc_eeprom_read_buffer (long addr, long mem_offset, char *dest_ptr, int size)
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{
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while (--size >= 0)
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*dest_ptr++ = (char) pmc_eeprom_read (addr, mem_offset++);
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}
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/*------------------------------------------------------------------------
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* pmc_eeprom_write_buffer - write EEPROM data from specified buffer
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*------------------------------------------------------------------------
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*/
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void
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pmc_eeprom_write_buffer (long addr, long mem_offset, char *dest_ptr, int size)
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{
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enable_pmc_eeprom (addr);
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while (--size >= 0)
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pmc_eeprom_write (addr, mem_offset++, *dest_ptr++);
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disable_pmc_eeprom (addr);
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}
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/*------------------------------------------------------------------------
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* pmcCalcCrc - calculate the CRC for the serial EEPROM structure
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*------------------------------------------------------------------------
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*/
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u_int32_t
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pmcCalcCrc_T01 (void *bufp)
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{
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FLD_TYPE2 *buf = bufp;
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u_int32_t crc; /* CRC of the structure */
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/* Calc CRC for type and length fields */
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sbeCrc (
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(u_int8_t *) &buf->type,
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(u_int32_t) STRUCT_OFFSET (FLD_TYPE1, Crc32),
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(u_int32_t) 0,
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(u_int32_t *) &crc);
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#ifdef EEPROM_TYPE_DEBUG
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pr_info("sbeCrc: crc 1 calculated as %08x\n", crc); /* RLD DEBUG */
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#endif
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return ~crc;
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}
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u_int32_t
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pmcCalcCrc_T02 (void *bufp)
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{
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FLD_TYPE2 *buf = bufp;
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u_int32_t crc; /* CRC of the structure */
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/* Calc CRC for type and length fields */
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sbeCrc (
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(u_int8_t *) &buf->type,
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(u_int32_t) STRUCT_OFFSET (FLD_TYPE2, Crc32),
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(u_int32_t) 0,
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(u_int32_t *) &crc);
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/* Calc CRC for remaining fields */
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sbeCrc (
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(u_int8_t *) &buf->Id[0],
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(u_int32_t) (sizeof (FLD_TYPE2) - STRUCT_OFFSET (FLD_TYPE2, Id)),
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(u_int32_t) crc,
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(u_int32_t *) &crc);
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#ifdef EEPROM_TYPE_DEBUG
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pr_info("sbeCrc: crc 2 calculated as %08x\n", crc); /* RLD DEBUG */
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#endif
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return crc;
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}
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/*------------------------------------------------------------------------
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* pmc_init_seeprom - initialize the serial EEPROM structure
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*------------------------------------------------------------------------
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*
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* At the front of the serial EEPROM there is a record that contains
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* manufacturing information. If the info does not already exist, it
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* is created. The only field modifiable by the operator is the
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* serial number field.
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*/
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void
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pmc_init_seeprom (u_int32_t addr, u_int32_t serialNum)
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{
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PROMFORMAT buffer; /* Memory image of structure */
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u_int32_t crc; /* CRC of structure */
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time_t createTime;
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int i;
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createTime = get_seconds ();
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/* use template data */
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for (i = 0; i < sizeof (FLD_TYPE2); ++i)
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buffer.bytes[i] = mfg_template[i];
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/* Update serial number field in buffer */
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pmcSetBuffValue (&buffer.fldType2.Serial[3], serialNum, 3);
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/* Update create time field in buffer */
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pmcSetBuffValue (&buffer.fldType2.CreateTime[0], createTime, 4);
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/* Update CRC field in buffer */
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crc = pmcCalcCrc_T02 (&buffer);
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pmcSetBuffValue (&buffer.fldType2.Crc32[0], crc, 4);
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#ifdef DEBUG
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for (i = 0; i < sizeof (FLD_TYPE2); ++i)
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pr_info("[%02X] = %02X\n", i, buffer.bytes[i] & 0xFF);
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#endif
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/* Write structure to serial EEPROM */
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pmc_eeprom_write_buffer (addr, EE_MFG, (char *) &buffer, sizeof (FLD_TYPE2));
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}
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char
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pmc_verify_cksum (void *bufp)
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{
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FLD_TYPE1 *buf1 = bufp;
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FLD_TYPE2 *buf2 = bufp;
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u_int32_t crc1, crc2; /* CRC read from EEPROM */
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/* Retrieve contents of CRC field */
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crc1 = pmcGetBuffValue (&buf1->Crc32[0], sizeof (buf1->Crc32));
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#ifdef EEPROM_TYPE_DEBUG
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pr_info("EEPROM: chksum 1 reads as %08x\n", crc1); /* RLD DEBUG */
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#endif
|
|
if ((buf1->type == PROM_FORMAT_TYPE1) &&
|
|
(pmcCalcCrc_T01 ((void *) buf1) == crc1))
|
|
return PROM_FORMAT_TYPE1; /* checksum type 1 verified */
|
|
|
|
crc2 = pmcGetBuffValue (&buf2->Crc32[0], sizeof (buf2->Crc32));
|
|
#ifdef EEPROM_TYPE_DEBUG
|
|
pr_info("EEPROM: chksum 2 reads as %08x\n", crc2); /* RLD DEBUG */
|
|
#endif
|
|
if ((buf2->type == PROM_FORMAT_TYPE2) &&
|
|
(pmcCalcCrc_T02 ((void *) buf2) == crc2))
|
|
return PROM_FORMAT_TYPE2; /* checksum type 2 verified */
|
|
|
|
return PROM_FORMAT_Unk; /* failed to validate */
|
|
}
|
|
|
|
|
|
/*** End-of-File ***/
|