![Alan Cox](/assets/img/avatar_default.png)
Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
668 lines
18 KiB
C
668 lines
18 KiB
C
/*
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* pata_ali.c - ALI 15x3 PATA for new ATA layer
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* (C) 2005 Red Hat Inc
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* Alan Cox <alan@redhat.com>
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*
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* based in part upon
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* linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
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*
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* Copyright (C) 1998-2000 Michel Aubry, Maintainer
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* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
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* Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
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*
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* Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
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* May be copied or modified under the terms of the GNU General Public License
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* Copyright (C) 2002 Alan Cox <alan@redhat.com>
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* ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
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*
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* Documentation
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* Chipset documentation available under NDA only
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*
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* TODO/CHECK
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* Cannot have ATAPI on both master & slave for rev < c2 (???) but
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* otherwise should do atapi DMA.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/dmi.h>
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#define DRV_NAME "pata_ali"
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#define DRV_VERSION "0.7.4"
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/*
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* Cable special cases
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*/
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static struct dmi_system_id cable_dmi_table[] = {
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{
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.ident = "HP Pavilion N5430",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
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},
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},
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{ }
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};
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static int ali_cable_override(struct pci_dev *pdev)
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{
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/* Fujitsu P2000 */
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if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
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return 1;
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/* Systems by DMI */
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if (dmi_check_system(cable_dmi_table))
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return 1;
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return 0;
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}
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/**
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* ali_c2_cable_detect - cable detection
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* @ap: ATA port
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*
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* Perform cable detection for C2 and later revisions
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*/
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static int ali_c2_cable_detect(struct ata_port *ap)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u8 ata66;
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/* Certain laptops use short but suitable cables and don't
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implement the detect logic */
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if (ali_cable_override(pdev))
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return ATA_CBL_PATA40_SHORT;
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/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
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Bit set for 40 pin */
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pci_read_config_byte(pdev, 0x4A, &ata66);
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if (ata66 & (1 << ap->port_no))
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return ATA_CBL_PATA40;
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else
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return ATA_CBL_PATA80;
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}
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/**
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* ali_20_filter - filter for earlier ALI DMA
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* @ap: ALi ATA port
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* @adev: attached device
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*
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* Ensure that we do not do DMA on CD devices. We may be able to
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* fix that later on. Also ensure we do not do UDMA on WDC drives
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*/
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static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
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{
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char model_num[ATA_ID_PROD_LEN + 1];
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/* No DMA on anything but a disk for now */
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if (adev->class != ATA_DEV_ATA)
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mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
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ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
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if (strstr(model_num, "WDC"))
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return mask &= ~ATA_MASK_UDMA;
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return ata_pci_default_filter(adev, mask);
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}
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/**
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* ali_fifo_control - FIFO manager
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* @ap: ALi channel to control
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* @adev: device for FIFO control
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* @on: 0 for off 1 for on
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*
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* Enable or disable the FIFO on a given device. Because of the way the
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* ALi FIFO works it provides a boost on ATA disk but can be confused by
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* ATAPI and we must therefore manage it.
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*/
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static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int pio_fifo = 0x54 + ap->port_no;
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u8 fifo;
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int shift = 4 * adev->devno;
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/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
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0x00. Not all the docs agree but the behaviour we now use is the
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one stated in the BIOS Programming Guide */
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pci_read_config_byte(pdev, pio_fifo, &fifo);
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fifo &= ~(0x0F << shift);
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if (on)
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fifo |= (on << shift);
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pci_write_config_byte(pdev, pio_fifo, fifo);
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}
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/**
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* ali_program_modes - load mode registers
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* @ap: ALi channel to load
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* @adev: Device the timing is for
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* @cmd: Command timing
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* @data: Data timing
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* @ultra: UDMA timing or zero for off
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*
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* Loads the timing registers for cmd/data and disable UDMA if
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* ultra is zero. If ultra is set then load and enable the UDMA
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* timing but do not touch the command/data timing.
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*/
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static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int cas = 0x58 + 4 * ap->port_no; /* Command timing */
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int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
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int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
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int udmat = 0x56 + ap->port_no; /* UDMA timing */
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int shift = 4 * adev->devno;
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u8 udma;
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if (t != NULL) {
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t->setup = FIT(t->setup, 1, 8) & 7;
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t->act8b = FIT(t->act8b, 1, 8) & 7;
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t->rec8b = FIT(t->rec8b, 1, 16) & 15;
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t->active = FIT(t->active, 1, 8) & 7;
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t->recover = FIT(t->recover, 1, 16) & 15;
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pci_write_config_byte(pdev, cas, t->setup);
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pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
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pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
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}
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/* Set up the UDMA enable */
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pci_read_config_byte(pdev, udmat, &udma);
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udma &= ~(0x0F << shift);
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udma |= ultra << shift;
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pci_write_config_byte(pdev, udmat, udma);
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}
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/**
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* ali_set_piomode - set initial PIO mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Program the ALi registers for PIO mode. FIXME: add timings for
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* PIO5.
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*/
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static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct ata_device *pair = ata_dev_pair(adev);
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struct ata_timing t;
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unsigned long T = 1000000000 / 33333; /* PCI clock based */
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ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
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if (pair) {
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struct ata_timing p;
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ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
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if (pair->dma_mode) {
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ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
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}
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}
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/* PIO FIFO is only permitted on ATA disk */
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if (adev->class != ATA_DEV_ATA)
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ali_fifo_control(ap, adev, 0x00);
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ali_program_modes(ap, adev, &t, 0);
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if (adev->class == ATA_DEV_ATA)
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ali_fifo_control(ap, adev, 0x05);
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}
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/**
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* ali_set_dmamode - set initial DMA mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* FIXME: MWDMA timings
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*/
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static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
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struct ata_device *pair = ata_dev_pair(adev);
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struct ata_timing t;
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unsigned long T = 1000000000 / 33333; /* PCI clock based */
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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if (adev->class == ATA_DEV_ATA)
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ali_fifo_control(ap, adev, 0x08);
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if (adev->dma_mode >= XFER_UDMA_0) {
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ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
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if (adev->dma_mode >= XFER_UDMA_3) {
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u8 reg4b;
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pci_read_config_byte(pdev, 0x4B, ®4b);
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reg4b |= 1;
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pci_write_config_byte(pdev, 0x4B, reg4b);
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}
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} else {
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ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
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if (pair) {
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struct ata_timing p;
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ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
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if (pair->dma_mode) {
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ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
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}
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}
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ali_program_modes(ap, adev, &t, 0);
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}
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}
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/**
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* ali_lock_sectors - Keep older devices to 255 sector mode
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* @adev: Device
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*
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* Called during the bus probe for each device that is found. We use
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* this call to lock the sector count of the device to 255 or less on
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* older ALi controllers. If we didn't do this then large I/O's would
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* require LBA48 commands which the older ALi requires are issued by
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* slower PIO methods
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*/
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static void ali_lock_sectors(struct ata_device *adev)
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{
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adev->max_sectors = 255;
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}
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static struct scsi_host_template ali_sht = {
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.module = THIS_MODULE,
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.name = DRV_NAME,
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.ioctl = ata_scsi_ioctl,
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.queuecommand = ata_scsi_queuecmd,
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.can_queue = ATA_DEF_QUEUE,
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.this_id = ATA_SHT_THIS_ID,
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.sg_tablesize = LIBATA_MAX_PRD,
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.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
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.emulated = ATA_SHT_EMULATED,
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.use_clustering = ATA_SHT_USE_CLUSTERING,
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.proc_name = DRV_NAME,
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.dma_boundary = ATA_DMA_BOUNDARY,
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.slave_configure = ata_scsi_slave_config,
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.slave_destroy = ata_scsi_slave_destroy,
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.bios_param = ata_std_bios_param,
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#ifdef CONFIG_PM
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.resume = ata_scsi_device_resume,
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.suspend = ata_scsi_device_suspend,
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#endif
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};
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/*
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* Port operations for PIO only ALi
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*/
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static struct ata_port_operations ali_early_port_ops = {
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.port_disable = ata_port_disable,
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.set_piomode = ali_set_piomode,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.cable_detect = ata_cable_40wire,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.data_xfer = ata_data_xfer,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.irq_on = ata_irq_on,
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.irq_ack = ata_irq_ack,
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.port_start = ata_port_start,
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};
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/*
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* Port operations for DMA capable ALi without cable
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* detect
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*/
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static struct ata_port_operations ali_20_port_ops = {
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.port_disable = ata_port_disable,
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.set_piomode = ali_set_piomode,
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.set_dmamode = ali_set_dmamode,
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.mode_filter = ali_20_filter,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.dev_config = ali_lock_sectors,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.cable_detect = ata_cable_40wire,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.data_xfer = ata_data_xfer,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.irq_on = ata_irq_on,
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.irq_ack = ata_irq_ack,
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.port_start = ata_port_start,
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};
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/*
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* Port operations for DMA capable ALi with cable detect
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*/
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static struct ata_port_operations ali_c2_port_ops = {
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.port_disable = ata_port_disable,
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.set_piomode = ali_set_piomode,
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.set_dmamode = ali_set_dmamode,
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.mode_filter = ata_pci_default_filter,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.dev_config = ali_lock_sectors,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.cable_detect = ali_c2_cable_detect,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.data_xfer = ata_data_xfer,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.irq_on = ata_irq_on,
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.irq_ack = ata_irq_ack,
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.port_start = ata_port_start,
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};
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/*
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* Port operations for DMA capable ALi with cable detect and LBA48
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*/
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static struct ata_port_operations ali_c5_port_ops = {
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.port_disable = ata_port_disable,
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.set_piomode = ali_set_piomode,
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.set_dmamode = ali_set_dmamode,
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.mode_filter = ata_pci_default_filter,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.cable_detect = ali_c2_cable_detect,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.data_xfer = ata_data_xfer,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.irq_on = ata_irq_on,
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.irq_ack = ata_irq_ack,
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.port_start = ata_port_start,
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};
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/**
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* ali_init_chipset - chip setup function
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* @pdev: PCI device of ATA controller
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*
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* Perform the setup on the device that must be done both at boot
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* and at resume time.
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*/
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static void ali_init_chipset(struct pci_dev *pdev)
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{
|
|
u8 rev, tmp;
|
|
struct pci_dev *north, *isa_bridge;
|
|
|
|
pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
|
|
|
|
/*
|
|
* The chipset revision selects the driver operations and
|
|
* mode data.
|
|
*/
|
|
|
|
if (rev >= 0x20 && rev < 0xC2) {
|
|
/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
|
|
pci_read_config_byte(pdev, 0x4B, &tmp);
|
|
/* Clear CD-ROM DMA write bit */
|
|
tmp &= 0x7F;
|
|
pci_write_config_byte(pdev, 0x4B, tmp);
|
|
} else if (rev >= 0xC2) {
|
|
/* Enable cable detection logic */
|
|
pci_read_config_byte(pdev, 0x4B, &tmp);
|
|
pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
|
|
}
|
|
north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
|
|
isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
|
|
|
|
if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
|
|
/* Configure the ALi bridge logic. For non ALi rely on BIOS.
|
|
Set the south bridge enable bit */
|
|
pci_read_config_byte(isa_bridge, 0x79, &tmp);
|
|
if (rev == 0xC2)
|
|
pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
|
|
else if (rev > 0xC2 && rev < 0xC5)
|
|
pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
|
|
}
|
|
if (rev >= 0x20) {
|
|
/*
|
|
* CD_ROM DMA on (0x53 bit 0). Enable this even if we want
|
|
* to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
|
|
* via 0x54/55.
|
|
*/
|
|
pci_read_config_byte(pdev, 0x53, &tmp);
|
|
if (rev <= 0x20)
|
|
tmp &= ~0x02;
|
|
if (rev >= 0xc7)
|
|
tmp |= 0x03;
|
|
else
|
|
tmp |= 0x01; /* CD_ROM enable for DMA */
|
|
pci_write_config_byte(pdev, 0x53, tmp);
|
|
}
|
|
pci_dev_put(isa_bridge);
|
|
pci_dev_put(north);
|
|
ata_pci_clear_simplex(pdev);
|
|
}
|
|
/**
|
|
* ali_init_one - discovery callback
|
|
* @pdev: PCI device ID
|
|
* @id: PCI table info
|
|
*
|
|
* An ALi IDE interface has been discovered. Figure out what revision
|
|
* and perform configuration work before handing it to the ATA layer
|
|
*/
|
|
|
|
static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
{
|
|
static struct ata_port_info info_early = {
|
|
.sht = &ali_sht,
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
|
|
.pio_mask = 0x1f,
|
|
.port_ops = &ali_early_port_ops
|
|
};
|
|
/* Revision 0x20 added DMA */
|
|
static struct ata_port_info info_20 = {
|
|
.sht = &ali_sht,
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
|
|
.pio_mask = 0x1f,
|
|
.mwdma_mask = 0x07,
|
|
.port_ops = &ali_20_port_ops
|
|
};
|
|
/* Revision 0x20 with support logic added UDMA */
|
|
static struct ata_port_info info_20_udma = {
|
|
.sht = &ali_sht,
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
|
|
.pio_mask = 0x1f,
|
|
.mwdma_mask = 0x07,
|
|
.udma_mask = 0x07, /* UDMA33 */
|
|
.port_ops = &ali_20_port_ops
|
|
};
|
|
/* Revision 0xC2 adds UDMA66 */
|
|
static struct ata_port_info info_c2 = {
|
|
.sht = &ali_sht,
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
|
|
.pio_mask = 0x1f,
|
|
.mwdma_mask = 0x07,
|
|
.udma_mask = 0x1f,
|
|
.port_ops = &ali_c2_port_ops
|
|
};
|
|
/* Revision 0xC3 is UDMA100 */
|
|
static struct ata_port_info info_c3 = {
|
|
.sht = &ali_sht,
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
|
|
.pio_mask = 0x1f,
|
|
.mwdma_mask = 0x07,
|
|
.udma_mask = 0x3f,
|
|
.port_ops = &ali_c2_port_ops
|
|
};
|
|
/* Revision 0xC4 is UDMA133 */
|
|
static struct ata_port_info info_c4 = {
|
|
.sht = &ali_sht,
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
|
|
.pio_mask = 0x1f,
|
|
.mwdma_mask = 0x07,
|
|
.udma_mask = 0x7f,
|
|
.port_ops = &ali_c2_port_ops
|
|
};
|
|
/* Revision 0xC5 is UDMA133 with LBA48 DMA */
|
|
static struct ata_port_info info_c5 = {
|
|
.sht = &ali_sht,
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
|
|
.pio_mask = 0x1f,
|
|
.mwdma_mask = 0x07,
|
|
.udma_mask = 0x7f,
|
|
.port_ops = &ali_c5_port_ops
|
|
};
|
|
|
|
static struct ata_port_info *port_info[2];
|
|
u8 rev, tmp;
|
|
struct pci_dev *isa_bridge;
|
|
|
|
pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
|
|
|
|
/*
|
|
* The chipset revision selects the driver operations and
|
|
* mode data.
|
|
*/
|
|
|
|
if (rev < 0x20) {
|
|
port_info[0] = port_info[1] = &info_early;
|
|
} else if (rev < 0xC2) {
|
|
port_info[0] = port_info[1] = &info_20;
|
|
} else if (rev == 0xC2) {
|
|
port_info[0] = port_info[1] = &info_c2;
|
|
} else if (rev == 0xC3) {
|
|
port_info[0] = port_info[1] = &info_c3;
|
|
} else if (rev == 0xC4) {
|
|
port_info[0] = port_info[1] = &info_c4;
|
|
} else
|
|
port_info[0] = port_info[1] = &info_c5;
|
|
|
|
ali_init_chipset(pdev);
|
|
|
|
isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
|
|
if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
|
|
/* Are we paired with a UDMA capable chip */
|
|
pci_read_config_byte(isa_bridge, 0x5E, &tmp);
|
|
if ((tmp & 0x1E) == 0x12)
|
|
port_info[0] = port_info[1] = &info_20_udma;
|
|
pci_dev_put(isa_bridge);
|
|
}
|
|
return ata_pci_init_one(pdev, port_info, 2);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int ali_reinit_one(struct pci_dev *pdev)
|
|
{
|
|
ali_init_chipset(pdev);
|
|
return ata_pci_device_resume(pdev);
|
|
}
|
|
#endif
|
|
|
|
static const struct pci_device_id ali[] = {
|
|
{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
|
|
{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
|
|
|
|
{ },
|
|
};
|
|
|
|
static struct pci_driver ali_pci_driver = {
|
|
.name = DRV_NAME,
|
|
.id_table = ali,
|
|
.probe = ali_init_one,
|
|
.remove = ata_pci_remove_one,
|
|
#ifdef CONFIG_PM
|
|
.suspend = ata_pci_device_suspend,
|
|
.resume = ali_reinit_one,
|
|
#endif
|
|
};
|
|
|
|
static int __init ali_init(void)
|
|
{
|
|
return pci_register_driver(&ali_pci_driver);
|
|
}
|
|
|
|
|
|
static void __exit ali_exit(void)
|
|
{
|
|
pci_unregister_driver(&ali_pci_driver);
|
|
}
|
|
|
|
|
|
MODULE_AUTHOR("Alan Cox");
|
|
MODULE_DESCRIPTION("low-level driver for ALi PATA");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DEVICE_TABLE(pci, ali);
|
|
MODULE_VERSION(DRV_VERSION);
|
|
|
|
module_init(ali_init);
|
|
module_exit(ali_exit);
|