![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
866 lines
20 KiB
C
866 lines
20 KiB
C
/*
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* linux/drivers/mmc/host/pxa.c - PXA MMCI driver
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*
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* Copyright (C) 2003 Russell King, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This hardware is really sick:
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* - No way to clear interrupts.
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* - Have to turn off the clock whenever we touch the device.
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* - Doesn't tell you how many data blocks were transferred.
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* Yuck!
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*
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* 1 and 3 byte data transfers not supported
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* max block length up to 1023
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/mmc/host.h>
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#include <linux/io.h>
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#include <linux/regulator/consumer.h>
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#include <linux/gpio.h>
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#include <linux/gfp.h>
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#include <asm/sizes.h>
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#include <mach/hardware.h>
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#include <mach/dma.h>
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#include <mach/mmc.h>
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#include "pxamci.h"
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#define DRIVER_NAME "pxa2xx-mci"
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#define NR_SG 1
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#define CLKRT_OFF (~0)
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#define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \
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|| cpu_is_pxa935())
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struct pxamci_host {
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struct mmc_host *mmc;
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spinlock_t lock;
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struct resource *res;
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void __iomem *base;
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struct clk *clk;
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unsigned long clkrate;
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int irq;
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int dma;
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unsigned int clkrt;
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unsigned int cmdat;
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unsigned int imask;
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unsigned int power_mode;
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struct pxamci_platform_data *pdata;
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struct mmc_request *mrq;
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struct mmc_command *cmd;
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struct mmc_data *data;
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dma_addr_t sg_dma;
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struct pxa_dma_desc *sg_cpu;
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unsigned int dma_len;
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unsigned int dma_dir;
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unsigned int dma_drcmrrx;
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unsigned int dma_drcmrtx;
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struct regulator *vcc;
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};
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static inline void pxamci_init_ocr(struct pxamci_host *host)
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{
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#ifdef CONFIG_REGULATOR
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host->vcc = regulator_get(mmc_dev(host->mmc), "vmmc");
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if (IS_ERR(host->vcc))
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host->vcc = NULL;
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else {
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host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc);
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if (host->pdata && host->pdata->ocr_mask)
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dev_warn(mmc_dev(host->mmc),
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"ocr_mask/setpower will not be used\n");
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}
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#endif
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if (host->vcc == NULL) {
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/* fall-back to platform data */
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host->mmc->ocr_avail = host->pdata ?
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host->pdata->ocr_mask :
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MMC_VDD_32_33 | MMC_VDD_33_34;
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}
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}
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static inline void pxamci_set_power(struct pxamci_host *host, unsigned int vdd)
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{
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int on;
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#ifdef CONFIG_REGULATOR
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if (host->vcc)
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mmc_regulator_set_ocr(host->vcc, vdd);
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#endif
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if (!host->vcc && host->pdata &&
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gpio_is_valid(host->pdata->gpio_power)) {
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on = ((1 << vdd) & host->pdata->ocr_mask);
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gpio_set_value(host->pdata->gpio_power,
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!!on ^ host->pdata->gpio_power_invert);
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}
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if (!host->vcc && host->pdata && host->pdata->setpower)
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host->pdata->setpower(mmc_dev(host->mmc), vdd);
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}
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static void pxamci_stop_clock(struct pxamci_host *host)
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{
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if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
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unsigned long timeout = 10000;
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unsigned int v;
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writel(STOP_CLOCK, host->base + MMC_STRPCL);
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do {
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v = readl(host->base + MMC_STAT);
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if (!(v & STAT_CLK_EN))
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break;
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udelay(1);
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} while (timeout--);
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if (v & STAT_CLK_EN)
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dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
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}
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}
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static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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host->imask &= ~mask;
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writel(host->imask, host->base + MMC_I_MASK);
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spin_unlock_irqrestore(&host->lock, flags);
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}
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static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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host->imask |= mask;
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writel(host->imask, host->base + MMC_I_MASK);
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spin_unlock_irqrestore(&host->lock, flags);
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}
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static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
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{
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unsigned int nob = data->blocks;
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unsigned long long clks;
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unsigned int timeout;
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bool dalgn = 0;
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u32 dcmd;
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int i;
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host->data = data;
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if (data->flags & MMC_DATA_STREAM)
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nob = 0xffff;
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writel(nob, host->base + MMC_NOB);
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writel(data->blksz, host->base + MMC_BLKLEN);
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clks = (unsigned long long)data->timeout_ns * host->clkrate;
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do_div(clks, 1000000000UL);
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timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
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writel((timeout + 255) / 256, host->base + MMC_RDTO);
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if (data->flags & MMC_DATA_READ) {
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host->dma_dir = DMA_FROM_DEVICE;
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dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC;
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DRCMR(host->dma_drcmrtx) = 0;
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DRCMR(host->dma_drcmrrx) = host->dma | DRCMR_MAPVLD;
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} else {
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host->dma_dir = DMA_TO_DEVICE;
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dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG;
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DRCMR(host->dma_drcmrrx) = 0;
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DRCMR(host->dma_drcmrtx) = host->dma | DRCMR_MAPVLD;
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}
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dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
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host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
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host->dma_dir);
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for (i = 0; i < host->dma_len; i++) {
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unsigned int length = sg_dma_len(&data->sg[i]);
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host->sg_cpu[i].dcmd = dcmd | length;
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if (length & 31 && !(data->flags & MMC_DATA_READ))
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host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
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/* Not aligned to 8-byte boundary? */
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if (sg_dma_address(&data->sg[i]) & 0x7)
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dalgn = 1;
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if (data->flags & MMC_DATA_READ) {
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host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
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host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
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} else {
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host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
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host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
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}
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host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
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sizeof(struct pxa_dma_desc);
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}
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host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
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wmb();
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/*
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* The PXA27x DMA controller encounters overhead when working with
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* unaligned (to 8-byte boundaries) data, so switch on byte alignment
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* mode only if we have unaligned data.
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*/
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if (dalgn)
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DALGN |= (1 << host->dma);
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else
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DALGN &= ~(1 << host->dma);
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DDADR(host->dma) = host->sg_dma;
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/*
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* workaround for erratum #91:
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* only start DMA now if we are doing a read,
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* otherwise we wait until CMD/RESP has finished
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* before starting DMA.
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*/
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if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ)
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DCSR(host->dma) = DCSR_RUN;
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}
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static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
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{
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WARN_ON(host->cmd != NULL);
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host->cmd = cmd;
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if (cmd->flags & MMC_RSP_BUSY)
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cmdat |= CMDAT_BUSY;
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#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
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switch (RSP_TYPE(mmc_resp_type(cmd))) {
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case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
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cmdat |= CMDAT_RESP_SHORT;
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break;
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case RSP_TYPE(MMC_RSP_R3):
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cmdat |= CMDAT_RESP_R3;
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break;
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case RSP_TYPE(MMC_RSP_R2):
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cmdat |= CMDAT_RESP_R2;
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break;
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default:
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break;
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}
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writel(cmd->opcode, host->base + MMC_CMD);
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writel(cmd->arg >> 16, host->base + MMC_ARGH);
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writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
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writel(cmdat, host->base + MMC_CMDAT);
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writel(host->clkrt, host->base + MMC_CLKRT);
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writel(START_CLOCK, host->base + MMC_STRPCL);
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pxamci_enable_irq(host, END_CMD_RES);
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}
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static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
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{
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host->mrq = NULL;
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host->cmd = NULL;
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host->data = NULL;
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mmc_request_done(host->mmc, mrq);
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}
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static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
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{
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struct mmc_command *cmd = host->cmd;
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int i;
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u32 v;
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if (!cmd)
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return 0;
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host->cmd = NULL;
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/*
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* Did I mention this is Sick. We always need to
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* discard the upper 8 bits of the first 16-bit word.
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*/
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v = readl(host->base + MMC_RES) & 0xffff;
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for (i = 0; i < 4; i++) {
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u32 w1 = readl(host->base + MMC_RES) & 0xffff;
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u32 w2 = readl(host->base + MMC_RES) & 0xffff;
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cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
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v = w2;
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}
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if (stat & STAT_TIME_OUT_RESPONSE) {
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cmd->error = -ETIMEDOUT;
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} else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
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/*
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* workaround for erratum #42:
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* Intel PXA27x Family Processor Specification Update Rev 001
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* A bogus CRC error can appear if the msb of a 136 bit
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* response is a one.
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*/
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if (cpu_is_pxa27x() &&
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(cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000))
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pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
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else
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cmd->error = -EILSEQ;
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}
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pxamci_disable_irq(host, END_CMD_RES);
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if (host->data && !cmd->error) {
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pxamci_enable_irq(host, DATA_TRAN_DONE);
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/*
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* workaround for erratum #91, if doing write
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* enable DMA late
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*/
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if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
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DCSR(host->dma) = DCSR_RUN;
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} else {
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pxamci_finish_request(host, host->mrq);
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}
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return 1;
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}
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static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
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{
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struct mmc_data *data = host->data;
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if (!data)
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return 0;
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DCSR(host->dma) = 0;
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dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
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host->dma_dir);
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if (stat & STAT_READ_TIME_OUT)
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data->error = -ETIMEDOUT;
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else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
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data->error = -EILSEQ;
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/*
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* There appears to be a hardware design bug here. There seems to
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* be no way to find out how much data was transferred to the card.
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* This means that if there was an error on any block, we mark all
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* data blocks as being in error.
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*/
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if (!data->error)
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data->bytes_xfered = data->blocks * data->blksz;
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else
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data->bytes_xfered = 0;
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pxamci_disable_irq(host, DATA_TRAN_DONE);
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host->data = NULL;
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if (host->mrq->stop) {
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pxamci_stop_clock(host);
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pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
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} else {
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pxamci_finish_request(host, host->mrq);
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}
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return 1;
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}
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static irqreturn_t pxamci_irq(int irq, void *devid)
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{
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struct pxamci_host *host = devid;
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unsigned int ireg;
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int handled = 0;
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ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
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if (ireg) {
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unsigned stat = readl(host->base + MMC_STAT);
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pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
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if (ireg & END_CMD_RES)
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handled |= pxamci_cmd_done(host, stat);
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if (ireg & DATA_TRAN_DONE)
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handled |= pxamci_data_done(host, stat);
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if (ireg & SDIO_INT) {
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mmc_signal_sdio_irq(host->mmc);
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handled = 1;
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}
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}
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return IRQ_RETVAL(handled);
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}
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static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
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{
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struct pxamci_host *host = mmc_priv(mmc);
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unsigned int cmdat;
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WARN_ON(host->mrq != NULL);
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host->mrq = mrq;
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pxamci_stop_clock(host);
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cmdat = host->cmdat;
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host->cmdat &= ~CMDAT_INIT;
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if (mrq->data) {
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pxamci_setup_data(host, mrq->data);
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cmdat &= ~CMDAT_BUSY;
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cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
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if (mrq->data->flags & MMC_DATA_WRITE)
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cmdat |= CMDAT_WRITE;
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if (mrq->data->flags & MMC_DATA_STREAM)
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cmdat |= CMDAT_STREAM;
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}
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pxamci_start_cmd(host, mrq->cmd, cmdat);
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}
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static int pxamci_get_ro(struct mmc_host *mmc)
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{
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struct pxamci_host *host = mmc_priv(mmc);
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if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro)) {
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if (host->pdata->gpio_card_ro_invert)
|
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return !gpio_get_value(host->pdata->gpio_card_ro);
|
|
else
|
|
return gpio_get_value(host->pdata->gpio_card_ro);
|
|
}
|
|
if (host->pdata && host->pdata->get_ro)
|
|
return !!host->pdata->get_ro(mmc_dev(mmc));
|
|
/*
|
|
* Board doesn't support read only detection; let the mmc core
|
|
* decide what to do.
|
|
*/
|
|
return -ENOSYS;
|
|
}
|
|
|
|
static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|
{
|
|
struct pxamci_host *host = mmc_priv(mmc);
|
|
|
|
if (ios->clock) {
|
|
unsigned long rate = host->clkrate;
|
|
unsigned int clk = rate / ios->clock;
|
|
|
|
if (host->clkrt == CLKRT_OFF)
|
|
clk_enable(host->clk);
|
|
|
|
if (ios->clock == 26000000) {
|
|
/* to support 26MHz */
|
|
host->clkrt = 7;
|
|
} else {
|
|
/* to handle (19.5MHz, 26MHz) */
|
|
if (!clk)
|
|
clk = 1;
|
|
|
|
/*
|
|
* clk might result in a lower divisor than we
|
|
* desire. check for that condition and adjust
|
|
* as appropriate.
|
|
*/
|
|
if (rate / clk > ios->clock)
|
|
clk <<= 1;
|
|
host->clkrt = fls(clk) - 1;
|
|
}
|
|
|
|
/*
|
|
* we write clkrt on the next command
|
|
*/
|
|
} else {
|
|
pxamci_stop_clock(host);
|
|
if (host->clkrt != CLKRT_OFF) {
|
|
host->clkrt = CLKRT_OFF;
|
|
clk_disable(host->clk);
|
|
}
|
|
}
|
|
|
|
if (host->power_mode != ios->power_mode) {
|
|
host->power_mode = ios->power_mode;
|
|
|
|
pxamci_set_power(host, ios->vdd);
|
|
|
|
if (ios->power_mode == MMC_POWER_ON)
|
|
host->cmdat |= CMDAT_INIT;
|
|
}
|
|
|
|
if (ios->bus_width == MMC_BUS_WIDTH_4)
|
|
host->cmdat |= CMDAT_SD_4DAT;
|
|
else
|
|
host->cmdat &= ~CMDAT_SD_4DAT;
|
|
|
|
pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
|
|
host->clkrt, host->cmdat);
|
|
}
|
|
|
|
static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
|
|
{
|
|
struct pxamci_host *pxa_host = mmc_priv(host);
|
|
|
|
if (enable)
|
|
pxamci_enable_irq(pxa_host, SDIO_INT);
|
|
else
|
|
pxamci_disable_irq(pxa_host, SDIO_INT);
|
|
}
|
|
|
|
static const struct mmc_host_ops pxamci_ops = {
|
|
.request = pxamci_request,
|
|
.get_ro = pxamci_get_ro,
|
|
.set_ios = pxamci_set_ios,
|
|
.enable_sdio_irq = pxamci_enable_sdio_irq,
|
|
};
|
|
|
|
static void pxamci_dma_irq(int dma, void *devid)
|
|
{
|
|
struct pxamci_host *host = devid;
|
|
int dcsr = DCSR(dma);
|
|
DCSR(dma) = dcsr & ~DCSR_STOPIRQEN;
|
|
|
|
if (dcsr & DCSR_ENDINTR) {
|
|
writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
|
|
} else {
|
|
printk(KERN_ERR "%s: DMA error on channel %d (DCSR=%#x)\n",
|
|
mmc_hostname(host->mmc), dma, dcsr);
|
|
host->data->error = -EIO;
|
|
pxamci_data_done(host, 0);
|
|
}
|
|
}
|
|
|
|
static irqreturn_t pxamci_detect_irq(int irq, void *devid)
|
|
{
|
|
struct pxamci_host *host = mmc_priv(devid);
|
|
|
|
mmc_detect_change(devid, host->pdata->detect_delay);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int pxamci_probe(struct platform_device *pdev)
|
|
{
|
|
struct mmc_host *mmc;
|
|
struct pxamci_host *host = NULL;
|
|
struct resource *r, *dmarx, *dmatx;
|
|
int ret, irq, gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
|
|
|
|
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (!r || irq < 0)
|
|
return -ENXIO;
|
|
|
|
r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
|
|
if (!r)
|
|
return -EBUSY;
|
|
|
|
mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
|
|
if (!mmc) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
mmc->ops = &pxamci_ops;
|
|
|
|
/*
|
|
* We can do SG-DMA, but we don't because we never know how much
|
|
* data we successfully wrote to the card.
|
|
*/
|
|
mmc->max_phys_segs = NR_SG;
|
|
|
|
/*
|
|
* Our hardware DMA can handle a maximum of one page per SG entry.
|
|
*/
|
|
mmc->max_seg_size = PAGE_SIZE;
|
|
|
|
/*
|
|
* Block length register is only 10 bits before PXA27x.
|
|
*/
|
|
mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048;
|
|
|
|
/*
|
|
* Block count register is 16 bits.
|
|
*/
|
|
mmc->max_blk_count = 65535;
|
|
|
|
host = mmc_priv(mmc);
|
|
host->mmc = mmc;
|
|
host->dma = -1;
|
|
host->pdata = pdev->dev.platform_data;
|
|
host->clkrt = CLKRT_OFF;
|
|
|
|
host->clk = clk_get(&pdev->dev, NULL);
|
|
if (IS_ERR(host->clk)) {
|
|
ret = PTR_ERR(host->clk);
|
|
host->clk = NULL;
|
|
goto out;
|
|
}
|
|
|
|
host->clkrate = clk_get_rate(host->clk);
|
|
|
|
/*
|
|
* Calculate minimum clock rate, rounding up.
|
|
*/
|
|
mmc->f_min = (host->clkrate + 63) / 64;
|
|
mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate;
|
|
|
|
pxamci_init_ocr(host);
|
|
|
|
mmc->caps = 0;
|
|
host->cmdat = 0;
|
|
if (!cpu_is_pxa25x()) {
|
|
mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
|
|
host->cmdat |= CMDAT_SDIO_INT_EN;
|
|
if (mmc_has_26MHz())
|
|
mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
|
|
MMC_CAP_SD_HIGHSPEED;
|
|
}
|
|
|
|
host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
|
|
if (!host->sg_cpu) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
spin_lock_init(&host->lock);
|
|
host->res = r;
|
|
host->irq = irq;
|
|
host->imask = MMC_I_MASK_ALL;
|
|
|
|
host->base = ioremap(r->start, SZ_4K);
|
|
if (!host->base) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
/*
|
|
* Ensure that the host controller is shut down, and setup
|
|
* with our defaults.
|
|
*/
|
|
pxamci_stop_clock(host);
|
|
writel(0, host->base + MMC_SPI);
|
|
writel(64, host->base + MMC_RESTO);
|
|
writel(host->imask, host->base + MMC_I_MASK);
|
|
|
|
host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
|
|
pxamci_dma_irq, host);
|
|
if (host->dma < 0) {
|
|
ret = -EBUSY;
|
|
goto out;
|
|
}
|
|
|
|
ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
|
|
if (ret)
|
|
goto out;
|
|
|
|
platform_set_drvdata(pdev, mmc);
|
|
|
|
dmarx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
|
|
if (!dmarx) {
|
|
ret = -ENXIO;
|
|
goto out;
|
|
}
|
|
host->dma_drcmrrx = dmarx->start;
|
|
|
|
dmatx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
|
|
if (!dmatx) {
|
|
ret = -ENXIO;
|
|
goto out;
|
|
}
|
|
host->dma_drcmrtx = dmatx->start;
|
|
|
|
if (host->pdata) {
|
|
gpio_cd = host->pdata->gpio_card_detect;
|
|
gpio_ro = host->pdata->gpio_card_ro;
|
|
gpio_power = host->pdata->gpio_power;
|
|
}
|
|
if (gpio_is_valid(gpio_power)) {
|
|
ret = gpio_request(gpio_power, "mmc card power");
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed requesting gpio_power %d\n", gpio_power);
|
|
goto out;
|
|
}
|
|
gpio_direction_output(gpio_power,
|
|
host->pdata->gpio_power_invert);
|
|
}
|
|
if (gpio_is_valid(gpio_ro)) {
|
|
ret = gpio_request(gpio_ro, "mmc card read only");
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro);
|
|
goto err_gpio_ro;
|
|
}
|
|
gpio_direction_input(gpio_ro);
|
|
}
|
|
if (gpio_is_valid(gpio_cd)) {
|
|
ret = gpio_request(gpio_cd, "mmc card detect");
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_cd);
|
|
goto err_gpio_cd;
|
|
}
|
|
gpio_direction_input(gpio_cd);
|
|
|
|
ret = request_irq(gpio_to_irq(gpio_cd), pxamci_detect_irq,
|
|
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
|
|
"mmc card detect", mmc);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to request card detect IRQ\n");
|
|
goto err_request_irq;
|
|
}
|
|
}
|
|
|
|
if (host->pdata && host->pdata->init)
|
|
host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
|
|
|
|
if (gpio_is_valid(gpio_power) && host->pdata->setpower)
|
|
dev_warn(&pdev->dev, "gpio_power and setpower() both defined\n");
|
|
if (gpio_is_valid(gpio_ro) && host->pdata->get_ro)
|
|
dev_warn(&pdev->dev, "gpio_ro and get_ro() both defined\n");
|
|
|
|
mmc_add_host(mmc);
|
|
|
|
return 0;
|
|
|
|
err_request_irq:
|
|
gpio_free(gpio_cd);
|
|
err_gpio_cd:
|
|
gpio_free(gpio_ro);
|
|
err_gpio_ro:
|
|
gpio_free(gpio_power);
|
|
out:
|
|
if (host) {
|
|
if (host->dma >= 0)
|
|
pxa_free_dma(host->dma);
|
|
if (host->base)
|
|
iounmap(host->base);
|
|
if (host->sg_cpu)
|
|
dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
|
|
if (host->clk)
|
|
clk_put(host->clk);
|
|
}
|
|
if (mmc)
|
|
mmc_free_host(mmc);
|
|
release_resource(r);
|
|
return ret;
|
|
}
|
|
|
|
static int pxamci_remove(struct platform_device *pdev)
|
|
{
|
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
|
int gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
if (mmc) {
|
|
struct pxamci_host *host = mmc_priv(mmc);
|
|
|
|
mmc_remove_host(mmc);
|
|
|
|
if (host->pdata) {
|
|
gpio_cd = host->pdata->gpio_card_detect;
|
|
gpio_ro = host->pdata->gpio_card_ro;
|
|
gpio_power = host->pdata->gpio_power;
|
|
}
|
|
if (gpio_is_valid(gpio_cd)) {
|
|
free_irq(gpio_to_irq(gpio_cd), mmc);
|
|
gpio_free(gpio_cd);
|
|
}
|
|
if (gpio_is_valid(gpio_ro))
|
|
gpio_free(gpio_ro);
|
|
if (gpio_is_valid(gpio_power))
|
|
gpio_free(gpio_power);
|
|
if (host->vcc)
|
|
regulator_put(host->vcc);
|
|
|
|
if (host->pdata && host->pdata->exit)
|
|
host->pdata->exit(&pdev->dev, mmc);
|
|
|
|
pxamci_stop_clock(host);
|
|
writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
|
|
END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
|
|
host->base + MMC_I_MASK);
|
|
|
|
DRCMR(host->dma_drcmrrx) = 0;
|
|
DRCMR(host->dma_drcmrtx) = 0;
|
|
|
|
free_irq(host->irq, host);
|
|
pxa_free_dma(host->dma);
|
|
iounmap(host->base);
|
|
dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
|
|
|
|
clk_put(host->clk);
|
|
|
|
release_resource(host->res);
|
|
|
|
mmc_free_host(mmc);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int pxamci_suspend(struct device *dev)
|
|
{
|
|
struct mmc_host *mmc = dev_get_drvdata(dev);
|
|
int ret = 0;
|
|
|
|
if (mmc)
|
|
ret = mmc_suspend_host(mmc, PMSG_SUSPEND);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int pxamci_resume(struct device *dev)
|
|
{
|
|
struct mmc_host *mmc = dev_get_drvdata(dev);
|
|
int ret = 0;
|
|
|
|
if (mmc)
|
|
ret = mmc_resume_host(mmc);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct dev_pm_ops pxamci_pm_ops = {
|
|
.suspend = pxamci_suspend,
|
|
.resume = pxamci_resume,
|
|
};
|
|
#endif
|
|
|
|
static struct platform_driver pxamci_driver = {
|
|
.probe = pxamci_probe,
|
|
.remove = pxamci_remove,
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.owner = THIS_MODULE,
|
|
#ifdef CONFIG_PM
|
|
.pm = &pxamci_pm_ops,
|
|
#endif
|
|
},
|
|
};
|
|
|
|
static int __init pxamci_init(void)
|
|
{
|
|
return platform_driver_register(&pxamci_driver);
|
|
}
|
|
|
|
static void __exit pxamci_exit(void)
|
|
{
|
|
platform_driver_unregister(&pxamci_driver);
|
|
}
|
|
|
|
module_init(pxamci_init);
|
|
module_exit(pxamci_exit);
|
|
|
|
MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:pxa2xx-mci");
|