![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
844 lines
20 KiB
C
844 lines
20 KiB
C
/* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
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*
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* Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* Thanks to the following companies for their support:
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*
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* - JMicron (hardware and technical support)
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*/
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#include <linux/delay.h>
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#include <linux/highmem.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <linux/mmc/host.h>
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#include <asm/scatterlist.h>
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#include <asm/io.h>
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#include "sdhci.h"
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/*
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* PCI registers
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*/
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#define PCI_SDHCI_IFPIO 0x00
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#define PCI_SDHCI_IFDMA 0x01
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#define PCI_SDHCI_IFVENDOR 0x02
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#define PCI_SLOT_INFO 0x40 /* 8 bits */
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#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
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#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
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#define MAX_SLOTS 8
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struct sdhci_pci_chip;
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struct sdhci_pci_slot;
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struct sdhci_pci_fixes {
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unsigned int quirks;
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int (*probe)(struct sdhci_pci_chip*);
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int (*probe_slot)(struct sdhci_pci_slot*);
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void (*remove_slot)(struct sdhci_pci_slot*, int);
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int (*suspend)(struct sdhci_pci_chip*,
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pm_message_t);
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int (*resume)(struct sdhci_pci_chip*);
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};
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struct sdhci_pci_slot {
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struct sdhci_pci_chip *chip;
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struct sdhci_host *host;
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int pci_bar;
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};
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struct sdhci_pci_chip {
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struct pci_dev *pdev;
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unsigned int quirks;
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const struct sdhci_pci_fixes *fixes;
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int num_slots; /* Slots on controller */
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struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
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};
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/*****************************************************************************\
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* *
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* Hardware specific quirk handling *
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* *
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\*****************************************************************************/
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static int ricoh_probe(struct sdhci_pci_chip *chip)
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{
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if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
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chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
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chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
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return 0;
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}
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static const struct sdhci_pci_fixes sdhci_ricoh = {
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.probe = ricoh_probe,
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.quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
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SDHCI_QUIRK_FORCE_DMA |
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SDHCI_QUIRK_CLOCK_BEFORE_RESET,
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};
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static const struct sdhci_pci_fixes sdhci_ene_712 = {
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.quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
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SDHCI_QUIRK_BROKEN_DMA,
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};
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static const struct sdhci_pci_fixes sdhci_ene_714 = {
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.quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
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SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
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SDHCI_QUIRK_BROKEN_DMA,
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};
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static const struct sdhci_pci_fixes sdhci_cafe = {
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.quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
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SDHCI_QUIRK_NO_BUSY_IRQ |
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SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
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};
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static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
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{
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u8 scratch;
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int ret;
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ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
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if (ret)
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return ret;
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/*
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* Turn PMOS on [bit 0], set over current detection to 2.4 V
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* [bit 1:2] and enable over current debouncing [bit 6].
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*/
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if (on)
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scratch |= 0x47;
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else
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scratch &= ~0x47;
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ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
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if (ret)
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return ret;
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return 0;
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}
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static int jmicron_probe(struct sdhci_pci_chip *chip)
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{
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int ret;
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if (chip->pdev->revision == 0) {
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chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
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SDHCI_QUIRK_32BIT_DMA_SIZE |
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SDHCI_QUIRK_32BIT_ADMA_SIZE |
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SDHCI_QUIRK_RESET_AFTER_REQUEST |
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SDHCI_QUIRK_BROKEN_SMALL_PIO;
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}
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/*
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* JMicron chips can have two interfaces to the same hardware
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* in order to work around limitations in Microsoft's driver.
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* We need to make sure we only bind to one of them.
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*
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* This code assumes two things:
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*
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* 1. The PCI code adds subfunctions in order.
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*
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* 2. The MMC interface has a lower subfunction number
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* than the SD interface.
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*/
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if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
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struct pci_dev *sd_dev;
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sd_dev = NULL;
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while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
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PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
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if ((PCI_SLOT(chip->pdev->devfn) ==
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PCI_SLOT(sd_dev->devfn)) &&
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(chip->pdev->bus == sd_dev->bus))
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break;
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}
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if (sd_dev) {
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pci_dev_put(sd_dev);
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dev_info(&chip->pdev->dev, "Refusing to bind to "
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"secondary interface.\n");
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return -ENODEV;
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}
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}
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/*
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* JMicron chips need a bit of a nudge to enable the power
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* output pins.
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*/
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ret = jmicron_pmos(chip, 1);
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if (ret) {
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dev_err(&chip->pdev->dev, "Failure enabling card power\n");
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return ret;
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}
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return 0;
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}
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static void jmicron_enable_mmc(struct sdhci_host *host, int on)
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{
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u8 scratch;
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scratch = readb(host->ioaddr + 0xC0);
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if (on)
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scratch |= 0x01;
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else
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scratch &= ~0x01;
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writeb(scratch, host->ioaddr + 0xC0);
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}
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static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
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{
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if (slot->chip->pdev->revision == 0) {
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u16 version;
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version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
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version = (version & SDHCI_VENDOR_VER_MASK) >>
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SDHCI_VENDOR_VER_SHIFT;
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/*
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* Older versions of the chip have lots of nasty glitches
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* in the ADMA engine. It's best just to avoid it
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* completely.
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*/
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if (version < 0xAC)
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slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
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}
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/*
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* The secondary interface requires a bit set to get the
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* interrupts.
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*/
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if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
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jmicron_enable_mmc(slot->host, 1);
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return 0;
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}
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static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
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{
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if (dead)
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return;
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if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
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jmicron_enable_mmc(slot->host, 0);
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}
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static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
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{
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int i;
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if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
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for (i = 0;i < chip->num_slots;i++)
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jmicron_enable_mmc(chip->slots[i]->host, 0);
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}
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return 0;
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}
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static int jmicron_resume(struct sdhci_pci_chip *chip)
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{
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int ret, i;
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if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
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for (i = 0;i < chip->num_slots;i++)
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jmicron_enable_mmc(chip->slots[i]->host, 1);
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}
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ret = jmicron_pmos(chip, 1);
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if (ret) {
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dev_err(&chip->pdev->dev, "Failure enabling card power\n");
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return ret;
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}
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return 0;
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}
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static const struct sdhci_pci_fixes sdhci_jmicron = {
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.probe = jmicron_probe,
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.probe_slot = jmicron_probe_slot,
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.remove_slot = jmicron_remove_slot,
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.suspend = jmicron_suspend,
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.resume = jmicron_resume,
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};
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/* SysKonnect CardBus2SDIO extra registers */
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#define SYSKT_CTRL 0x200
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#define SYSKT_RDFIFO_STAT 0x204
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#define SYSKT_WRFIFO_STAT 0x208
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#define SYSKT_POWER_DATA 0x20c
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#define SYSKT_POWER_330 0xef
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#define SYSKT_POWER_300 0xf8
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#define SYSKT_POWER_184 0xcc
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#define SYSKT_POWER_CMD 0x20d
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#define SYSKT_POWER_START (1 << 7)
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#define SYSKT_POWER_STATUS 0x20e
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#define SYSKT_POWER_STATUS_OK (1 << 0)
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#define SYSKT_BOARD_REV 0x210
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#define SYSKT_CHIP_REV 0x211
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#define SYSKT_CONF_DATA 0x212
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#define SYSKT_CONF_DATA_1V8 (1 << 2)
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#define SYSKT_CONF_DATA_2V5 (1 << 1)
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#define SYSKT_CONF_DATA_3V3 (1 << 0)
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static int syskt_probe(struct sdhci_pci_chip *chip)
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{
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if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
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chip->pdev->class &= ~0x0000FF;
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chip->pdev->class |= PCI_SDHCI_IFDMA;
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}
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return 0;
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}
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static int syskt_probe_slot(struct sdhci_pci_slot *slot)
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{
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int tm, ps;
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u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
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u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
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dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
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"board rev %d.%d, chip rev %d.%d\n",
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board_rev >> 4, board_rev & 0xf,
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chip_rev >> 4, chip_rev & 0xf);
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if (chip_rev >= 0x20)
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slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
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writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
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writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
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udelay(50);
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tm = 10; /* Wait max 1 ms */
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do {
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ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
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if (ps & SYSKT_POWER_STATUS_OK)
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break;
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udelay(100);
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} while (--tm);
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if (!tm) {
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dev_err(&slot->chip->pdev->dev,
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"power regulator never stabilized");
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writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
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return -ENODEV;
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}
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return 0;
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}
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static const struct sdhci_pci_fixes sdhci_syskt = {
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.quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
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.probe = syskt_probe,
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.probe_slot = syskt_probe_slot,
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};
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static int via_probe(struct sdhci_pci_chip *chip)
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{
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if (chip->pdev->revision == 0x10)
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chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
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return 0;
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}
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static const struct sdhci_pci_fixes sdhci_via = {
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.probe = via_probe,
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};
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static const struct pci_device_id pci_ids[] __devinitdata = {
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{
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.vendor = PCI_VENDOR_ID_RICOH,
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.device = PCI_DEVICE_ID_RICOH_R5C822,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_ricoh,
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},
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{
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.vendor = PCI_VENDOR_ID_ENE,
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.device = PCI_DEVICE_ID_ENE_CB712_SD,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_ene_712,
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},
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{
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.vendor = PCI_VENDOR_ID_ENE,
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.device = PCI_DEVICE_ID_ENE_CB712_SD_2,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_ene_712,
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},
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{
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.vendor = PCI_VENDOR_ID_ENE,
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.device = PCI_DEVICE_ID_ENE_CB714_SD,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_ene_714,
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},
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{
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.vendor = PCI_VENDOR_ID_ENE,
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.device = PCI_DEVICE_ID_ENE_CB714_SD_2,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_ene_714,
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},
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{
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.vendor = PCI_VENDOR_ID_MARVELL,
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.device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_cafe,
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},
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{
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.vendor = PCI_VENDOR_ID_JMICRON,
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.device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_jmicron,
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},
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{
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.vendor = PCI_VENDOR_ID_JMICRON,
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.device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_jmicron,
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},
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{
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.vendor = PCI_VENDOR_ID_SYSKONNECT,
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.device = 0x8000,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_syskt,
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},
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{
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.vendor = PCI_VENDOR_ID_VIA,
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.device = 0x95d0,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_via,
|
|
},
|
|
|
|
{ /* Generic SD host controller */
|
|
PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
|
|
},
|
|
|
|
{ /* end: all zeroes */ },
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, pci_ids);
|
|
|
|
/*****************************************************************************\
|
|
* *
|
|
* SDHCI core callbacks *
|
|
* *
|
|
\*****************************************************************************/
|
|
|
|
static int sdhci_pci_enable_dma(struct sdhci_host *host)
|
|
{
|
|
struct sdhci_pci_slot *slot;
|
|
struct pci_dev *pdev;
|
|
int ret;
|
|
|
|
slot = sdhci_priv(host);
|
|
pdev = slot->chip->pdev;
|
|
|
|
if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
|
|
((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
|
|
(host->flags & SDHCI_USE_SDMA)) {
|
|
dev_warn(&pdev->dev, "Will use DMA mode even though HW "
|
|
"doesn't fully claim to support it.\n");
|
|
}
|
|
|
|
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
|
if (ret)
|
|
return ret;
|
|
|
|
pci_set_master(pdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct sdhci_ops sdhci_pci_ops = {
|
|
.enable_dma = sdhci_pci_enable_dma,
|
|
};
|
|
|
|
/*****************************************************************************\
|
|
* *
|
|
* Suspend/resume *
|
|
* *
|
|
\*****************************************************************************/
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
|
|
{
|
|
struct sdhci_pci_chip *chip;
|
|
struct sdhci_pci_slot *slot;
|
|
mmc_pm_flag_t pm_flags = 0;
|
|
int i, ret;
|
|
|
|
chip = pci_get_drvdata(pdev);
|
|
if (!chip)
|
|
return 0;
|
|
|
|
for (i = 0;i < chip->num_slots;i++) {
|
|
slot = chip->slots[i];
|
|
if (!slot)
|
|
continue;
|
|
|
|
ret = sdhci_suspend_host(slot->host, state);
|
|
|
|
if (ret) {
|
|
for (i--;i >= 0;i--)
|
|
sdhci_resume_host(chip->slots[i]->host);
|
|
return ret;
|
|
}
|
|
|
|
pm_flags |= slot->host->mmc->pm_flags;
|
|
}
|
|
|
|
if (chip->fixes && chip->fixes->suspend) {
|
|
ret = chip->fixes->suspend(chip, state);
|
|
if (ret) {
|
|
for (i = chip->num_slots - 1;i >= 0;i--)
|
|
sdhci_resume_host(chip->slots[i]->host);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
pci_save_state(pdev);
|
|
if (pm_flags & MMC_PM_KEEP_POWER) {
|
|
if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
|
|
pci_enable_wake(pdev, PCI_D3hot, 1);
|
|
pci_set_power_state(pdev, PCI_D3hot);
|
|
} else {
|
|
pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
|
|
pci_disable_device(pdev);
|
|
pci_set_power_state(pdev, pci_choose_state(pdev, state));
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sdhci_pci_resume (struct pci_dev *pdev)
|
|
{
|
|
struct sdhci_pci_chip *chip;
|
|
struct sdhci_pci_slot *slot;
|
|
int i, ret;
|
|
|
|
chip = pci_get_drvdata(pdev);
|
|
if (!chip)
|
|
return 0;
|
|
|
|
pci_set_power_state(pdev, PCI_D0);
|
|
pci_restore_state(pdev);
|
|
ret = pci_enable_device(pdev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (chip->fixes && chip->fixes->resume) {
|
|
ret = chip->fixes->resume(chip);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
for (i = 0;i < chip->num_slots;i++) {
|
|
slot = chip->slots[i];
|
|
if (!slot)
|
|
continue;
|
|
|
|
ret = sdhci_resume_host(slot->host);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#else /* CONFIG_PM */
|
|
|
|
#define sdhci_pci_suspend NULL
|
|
#define sdhci_pci_resume NULL
|
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
/*****************************************************************************\
|
|
* *
|
|
* Device probing/removal *
|
|
* *
|
|
\*****************************************************************************/
|
|
|
|
static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
|
|
struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
|
|
{
|
|
struct sdhci_pci_slot *slot;
|
|
struct sdhci_host *host;
|
|
|
|
resource_size_t addr;
|
|
|
|
int ret;
|
|
|
|
if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
|
|
dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
|
|
return ERR_PTR(-ENODEV);
|
|
}
|
|
|
|
if (pci_resource_len(pdev, bar) != 0x100) {
|
|
dev_err(&pdev->dev, "Invalid iomem size. You may "
|
|
"experience problems.\n");
|
|
}
|
|
|
|
if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
|
|
dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
|
|
return ERR_PTR(-ENODEV);
|
|
}
|
|
|
|
if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
|
|
dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
|
|
return ERR_PTR(-ENODEV);
|
|
}
|
|
|
|
host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
|
|
if (IS_ERR(host)) {
|
|
dev_err(&pdev->dev, "cannot allocate host\n");
|
|
return ERR_PTR(PTR_ERR(host));
|
|
}
|
|
|
|
slot = sdhci_priv(host);
|
|
|
|
slot->chip = chip;
|
|
slot->host = host;
|
|
slot->pci_bar = bar;
|
|
|
|
host->hw_name = "PCI";
|
|
host->ops = &sdhci_pci_ops;
|
|
host->quirks = chip->quirks;
|
|
|
|
host->irq = pdev->irq;
|
|
|
|
ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "cannot request region\n");
|
|
goto free;
|
|
}
|
|
|
|
addr = pci_resource_start(pdev, bar);
|
|
host->ioaddr = pci_ioremap_bar(pdev, bar);
|
|
if (!host->ioaddr) {
|
|
dev_err(&pdev->dev, "failed to remap registers\n");
|
|
goto release;
|
|
}
|
|
|
|
if (chip->fixes && chip->fixes->probe_slot) {
|
|
ret = chip->fixes->probe_slot(slot);
|
|
if (ret)
|
|
goto unmap;
|
|
}
|
|
|
|
host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
|
|
|
|
ret = sdhci_add_host(host);
|
|
if (ret)
|
|
goto remove;
|
|
|
|
return slot;
|
|
|
|
remove:
|
|
if (chip->fixes && chip->fixes->remove_slot)
|
|
chip->fixes->remove_slot(slot, 0);
|
|
|
|
unmap:
|
|
iounmap(host->ioaddr);
|
|
|
|
release:
|
|
pci_release_region(pdev, bar);
|
|
|
|
free:
|
|
sdhci_free_host(host);
|
|
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
|
|
{
|
|
int dead;
|
|
u32 scratch;
|
|
|
|
dead = 0;
|
|
scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
|
|
if (scratch == (u32)-1)
|
|
dead = 1;
|
|
|
|
sdhci_remove_host(slot->host, dead);
|
|
|
|
if (slot->chip->fixes && slot->chip->fixes->remove_slot)
|
|
slot->chip->fixes->remove_slot(slot, dead);
|
|
|
|
pci_release_region(slot->chip->pdev, slot->pci_bar);
|
|
|
|
sdhci_free_host(slot->host);
|
|
}
|
|
|
|
static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
|
|
const struct pci_device_id *ent)
|
|
{
|
|
struct sdhci_pci_chip *chip;
|
|
struct sdhci_pci_slot *slot;
|
|
|
|
u8 slots, rev, first_bar;
|
|
int ret, i;
|
|
|
|
BUG_ON(pdev == NULL);
|
|
BUG_ON(ent == NULL);
|
|
|
|
pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
|
|
|
|
dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
|
|
(int)pdev->vendor, (int)pdev->device, (int)rev);
|
|
|
|
ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
|
|
if (ret)
|
|
return ret;
|
|
|
|
slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
|
|
dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
|
|
if (slots == 0)
|
|
return -ENODEV;
|
|
|
|
BUG_ON(slots > MAX_SLOTS);
|
|
|
|
ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
|
|
if (ret)
|
|
return ret;
|
|
|
|
first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
|
|
|
|
if (first_bar > 5) {
|
|
dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
ret = pci_enable_device(pdev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
|
|
if (!chip) {
|
|
ret = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
chip->pdev = pdev;
|
|
chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
|
|
if (chip->fixes)
|
|
chip->quirks = chip->fixes->quirks;
|
|
chip->num_slots = slots;
|
|
|
|
pci_set_drvdata(pdev, chip);
|
|
|
|
if (chip->fixes && chip->fixes->probe) {
|
|
ret = chip->fixes->probe(chip);
|
|
if (ret)
|
|
goto free;
|
|
}
|
|
|
|
for (i = 0;i < slots;i++) {
|
|
slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
|
|
if (IS_ERR(slot)) {
|
|
for (i--;i >= 0;i--)
|
|
sdhci_pci_remove_slot(chip->slots[i]);
|
|
ret = PTR_ERR(slot);
|
|
goto free;
|
|
}
|
|
|
|
chip->slots[i] = slot;
|
|
}
|
|
|
|
return 0;
|
|
|
|
free:
|
|
pci_set_drvdata(pdev, NULL);
|
|
kfree(chip);
|
|
|
|
err:
|
|
pci_disable_device(pdev);
|
|
return ret;
|
|
}
|
|
|
|
static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
|
|
{
|
|
int i;
|
|
struct sdhci_pci_chip *chip;
|
|
|
|
chip = pci_get_drvdata(pdev);
|
|
|
|
if (chip) {
|
|
for (i = 0;i < chip->num_slots; i++)
|
|
sdhci_pci_remove_slot(chip->slots[i]);
|
|
|
|
pci_set_drvdata(pdev, NULL);
|
|
kfree(chip);
|
|
}
|
|
|
|
pci_disable_device(pdev);
|
|
}
|
|
|
|
static struct pci_driver sdhci_driver = {
|
|
.name = "sdhci-pci",
|
|
.id_table = pci_ids,
|
|
.probe = sdhci_pci_probe,
|
|
.remove = __devexit_p(sdhci_pci_remove),
|
|
.suspend = sdhci_pci_suspend,
|
|
.resume = sdhci_pci_resume,
|
|
};
|
|
|
|
/*****************************************************************************\
|
|
* *
|
|
* Driver init/exit *
|
|
* *
|
|
\*****************************************************************************/
|
|
|
|
static int __init sdhci_drv_init(void)
|
|
{
|
|
return pci_register_driver(&sdhci_driver);
|
|
}
|
|
|
|
static void __exit sdhci_drv_exit(void)
|
|
{
|
|
pci_unregister_driver(&sdhci_driver);
|
|
}
|
|
|
|
module_init(sdhci_drv_init);
|
|
module_exit(sdhci_drv_exit);
|
|
|
|
MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
|
|
MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
|
|
MODULE_LICENSE("GPL");
|