![Magnus Damm](/assets/img/avatar_default.png)
This patch adds cell->disable() calls to the tmio-mmc probe() error handling and the remove() function. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
653 lines
16 KiB
C
653 lines
16 KiB
C
/*
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* linux/drivers/mmc/tmio_mmc.c
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*
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* Copyright (C) 2004 Ian Molton
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* Copyright (C) 2007 Ian Molton
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Driver for the MMC / SD / SDIO cell found in:
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*
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* TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
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*
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* This driver draws mainly on scattered spec sheets, Reverse engineering
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* of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
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* support). (Further 4 bit support from a later datasheet).
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*
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* TODO:
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* Investigate using a workqueue for PIO transfers
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* Eliminate FIXMEs
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* SDIO support
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* Better Power management
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* Handle MMC errors better
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* double buffer support
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*
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*/
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/mmc/host.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/tmio.h>
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#include "tmio_mmc.h"
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static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
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{
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u32 clk = 0, clock;
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if (new_clock) {
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for (clock = host->mmc->f_min, clk = 0x80000080;
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new_clock >= (clock<<1); clk >>= 1)
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clock <<= 1;
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clk |= 0x100;
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}
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if (host->set_clk_div)
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host->set_clk_div(host->pdev, (clk>>22) & 1);
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sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
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}
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static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
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{
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sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
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msleep(10);
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sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
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sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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msleep(10);
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}
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static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
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{
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sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
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sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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msleep(10);
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sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
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msleep(10);
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}
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static void reset(struct tmio_mmc_host *host)
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{
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/* FIXME - should we set stop clock reg here */
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sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
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sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
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msleep(10);
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sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
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sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
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msleep(10);
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}
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static void
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tmio_mmc_finish_request(struct tmio_mmc_host *host)
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{
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struct mmc_request *mrq = host->mrq;
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host->mrq = NULL;
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host->cmd = NULL;
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host->data = NULL;
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mmc_request_done(host->mmc, mrq);
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}
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/* These are the bitmasks the tmio chip requires to implement the MMC response
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* types. Note that R1 and R6 are the same in this scheme. */
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#define APP_CMD 0x0040
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#define RESP_NONE 0x0300
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#define RESP_R1 0x0400
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#define RESP_R1B 0x0500
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#define RESP_R2 0x0600
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#define RESP_R3 0x0700
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#define DATA_PRESENT 0x0800
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#define TRANSFER_READ 0x1000
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#define TRANSFER_MULTI 0x2000
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#define SECURITY_CMD 0x4000
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static int
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tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
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{
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struct mmc_data *data = host->data;
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int c = cmd->opcode;
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/* Command 12 is handled by hardware */
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if (cmd->opcode == 12 && !cmd->arg) {
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sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
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return 0;
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}
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switch (mmc_resp_type(cmd)) {
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case MMC_RSP_NONE: c |= RESP_NONE; break;
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case MMC_RSP_R1: c |= RESP_R1; break;
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case MMC_RSP_R1B: c |= RESP_R1B; break;
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case MMC_RSP_R2: c |= RESP_R2; break;
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case MMC_RSP_R3: c |= RESP_R3; break;
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default:
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pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
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return -EINVAL;
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}
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host->cmd = cmd;
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/* FIXME - this seems to be ok comented out but the spec suggest this bit should
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* be set when issuing app commands.
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* if(cmd->flags & MMC_FLAG_ACMD)
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* c |= APP_CMD;
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*/
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if (data) {
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c |= DATA_PRESENT;
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if (data->blocks > 1) {
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sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
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c |= TRANSFER_MULTI;
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}
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if (data->flags & MMC_DATA_READ)
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c |= TRANSFER_READ;
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}
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enable_mmc_irqs(host, TMIO_MASK_CMD);
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/* Fire off the command */
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sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
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sd_ctrl_write16(host, CTL_SD_CMD, c);
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return 0;
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}
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/* This chip always returns (at least?) as much data as you ask for.
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* I'm unsure what happens if you ask for less than a block. This should be
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* looked into to ensure that a funny length read doesnt hose the controller.
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*
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*/
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static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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{
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struct mmc_data *data = host->data;
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unsigned short *buf;
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unsigned int count;
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unsigned long flags;
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if (!data) {
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pr_debug("Spurious PIO IRQ\n");
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return;
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}
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buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
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host->sg_off);
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count = host->sg_ptr->length - host->sg_off;
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if (count > data->blksz)
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count = data->blksz;
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pr_debug("count: %08x offset: %08x flags %08x\n",
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count, host->sg_off, data->flags);
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/* Transfer the data */
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if (data->flags & MMC_DATA_READ)
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sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
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else
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sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
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host->sg_off += count;
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tmio_mmc_kunmap_atomic(host, &flags);
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if (host->sg_off == host->sg_ptr->length)
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tmio_mmc_next_sg(host);
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return;
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}
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static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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{
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struct mmc_data *data = host->data;
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struct mmc_command *stop;
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host->data = NULL;
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if (!data) {
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pr_debug("Spurious data end IRQ\n");
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return;
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}
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stop = data->stop;
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/* FIXME - return correct transfer count on errors */
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if (!data->error)
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data->bytes_xfered = data->blocks * data->blksz;
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else
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data->bytes_xfered = 0;
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pr_debug("Completed data request\n");
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/*FIXME - other drivers allow an optional stop command of any given type
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* which we dont do, as the chip can auto generate them.
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* Perhaps we can be smarter about when to use auto CMD12 and
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* only issue the auto request when we know this is the desired
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* stop command, allowing fallback to the stop command the
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* upper layers expect. For now, we do what works.
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*/
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if (data->flags & MMC_DATA_READ)
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disable_mmc_irqs(host, TMIO_MASK_READOP);
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else
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disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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if (stop) {
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if (stop->opcode == 12 && !stop->arg)
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sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
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else
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BUG();
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}
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tmio_mmc_finish_request(host);
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}
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static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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unsigned int stat)
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{
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struct mmc_command *cmd = host->cmd;
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int i, addr;
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if (!host->cmd) {
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pr_debug("Spurious CMD irq\n");
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return;
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}
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host->cmd = NULL;
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/* This controller is sicker than the PXA one. Not only do we need to
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* drop the top 8 bits of the first response word, we also need to
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* modify the order of the response for short response command types.
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*/
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for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
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cmd->resp[i] = sd_ctrl_read32(host, addr);
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if (cmd->flags & MMC_RSP_136) {
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cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
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cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
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cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
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cmd->resp[3] <<= 8;
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} else if (cmd->flags & MMC_RSP_R3) {
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cmd->resp[0] = cmd->resp[3];
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}
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if (stat & TMIO_STAT_CMDTIMEOUT)
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cmd->error = -ETIMEDOUT;
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else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
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cmd->error = -EILSEQ;
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/* If there is data to handle we enable data IRQs here, and
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* we will ultimatley finish the request in the data_end handler.
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* If theres no data or we encountered an error, finish now.
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*/
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if (host->data && !cmd->error) {
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if (host->data->flags & MMC_DATA_READ)
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enable_mmc_irqs(host, TMIO_MASK_READOP);
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else
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enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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} else {
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tmio_mmc_finish_request(host);
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}
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return;
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}
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static irqreturn_t tmio_mmc_irq(int irq, void *devid)
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{
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struct tmio_mmc_host *host = devid;
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unsigned int ireg, irq_mask, status;
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pr_debug("MMC IRQ begin\n");
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status = sd_ctrl_read32(host, CTL_STATUS);
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irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
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ireg = status & TMIO_MASK_IRQ & ~irq_mask;
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pr_debug_status(status);
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pr_debug_status(ireg);
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if (!ireg) {
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disable_mmc_irqs(host, status & ~irq_mask);
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pr_debug("tmio_mmc: Spurious irq, disabling! "
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"0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
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pr_debug_status(status);
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goto out;
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}
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while (ireg) {
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/* Card insert / remove attempts */
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if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
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ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
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TMIO_STAT_CARD_REMOVE);
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mmc_detect_change(host->mmc, msecs_to_jiffies(100));
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}
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/* CRC and other errors */
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/* if (ireg & TMIO_STAT_ERR_IRQ)
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* handled |= tmio_error_irq(host, irq, stat);
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*/
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/* Command completion */
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if (ireg & TMIO_MASK_CMD) {
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ack_mmc_irqs(host, TMIO_MASK_CMD);
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tmio_mmc_cmd_irq(host, status);
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}
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/* Data transfer */
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if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
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ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
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tmio_mmc_pio_irq(host);
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}
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/* Data transfer completion */
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if (ireg & TMIO_STAT_DATAEND) {
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ack_mmc_irqs(host, TMIO_STAT_DATAEND);
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tmio_mmc_data_irq(host);
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}
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/* Check status - keep going until we've handled it all */
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status = sd_ctrl_read32(host, CTL_STATUS);
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irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
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ireg = status & TMIO_MASK_IRQ & ~irq_mask;
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pr_debug("Status at end of loop: %08x\n", status);
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pr_debug_status(status);
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}
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pr_debug("MMC IRQ end\n");
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out:
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return IRQ_HANDLED;
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}
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static int tmio_mmc_start_data(struct tmio_mmc_host *host,
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struct mmc_data *data)
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{
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pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
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data->blksz, data->blocks);
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/* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
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if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
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printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
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mmc_hostname(host->mmc), data->blksz);
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return -EINVAL;
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}
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tmio_mmc_init_sg(host, data);
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host->data = data;
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/* Set transfer length / blocksize */
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sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
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sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
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return 0;
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}
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/* Process requests from the MMC layer */
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static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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int ret;
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if (host->mrq)
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pr_debug("request not null\n");
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host->mrq = mrq;
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if (mrq->data) {
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ret = tmio_mmc_start_data(host, mrq->data);
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if (ret)
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goto fail;
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}
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ret = tmio_mmc_start_command(host, mrq->cmd);
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if (!ret)
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return;
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fail:
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mrq->cmd->error = ret;
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mmc_request_done(mmc, mrq);
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}
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/* Set MMC clock / power.
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* Note: This controller uses a simple divider scheme therefore it cannot
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* run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
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* MMC wont run that fast, it has to be clocked at 12MHz which is the next
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* slowest setting.
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*/
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static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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if (ios->clock)
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tmio_mmc_set_clock(host, ios->clock);
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/* Power sequence - OFF -> ON -> UP */
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switch (ios->power_mode) {
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case MMC_POWER_OFF: /* power down SD bus */
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if (host->set_pwr)
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host->set_pwr(host->pdev, 0);
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tmio_mmc_clk_stop(host);
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break;
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case MMC_POWER_ON: /* power up SD bus */
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if (host->set_pwr)
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host->set_pwr(host->pdev, 1);
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break;
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case MMC_POWER_UP: /* start bus clock */
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tmio_mmc_clk_start(host);
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break;
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}
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switch (ios->bus_width) {
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case MMC_BUS_WIDTH_1:
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sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
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break;
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case MMC_BUS_WIDTH_4:
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sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
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break;
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}
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/* Let things settle. delay taken from winCE driver */
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udelay(140);
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}
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static int tmio_mmc_get_ro(struct mmc_host *mmc)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
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}
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static struct mmc_host_ops tmio_mmc_ops = {
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.request = tmio_mmc_request,
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.set_ios = tmio_mmc_set_ios,
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.get_ro = tmio_mmc_get_ro,
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};
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#ifdef CONFIG_PM
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static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
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{
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struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
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struct mmc_host *mmc = platform_get_drvdata(dev);
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int ret;
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ret = mmc_suspend_host(mmc, state);
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/* Tell MFD core it can disable us now.*/
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if (!ret && cell->disable)
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cell->disable(dev);
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return ret;
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}
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static int tmio_mmc_resume(struct platform_device *dev)
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{
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struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
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struct mmc_host *mmc = platform_get_drvdata(dev);
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int ret = 0;
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/* Tell the MFD core we are ready to be enabled */
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if (cell->resume) {
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ret = cell->resume(dev);
|
|
if (ret)
|
|
goto out;
|
|
}
|
|
|
|
mmc_resume_host(mmc);
|
|
|
|
out:
|
|
return ret;
|
|
}
|
|
#else
|
|
#define tmio_mmc_suspend NULL
|
|
#define tmio_mmc_resume NULL
|
|
#endif
|
|
|
|
static int __devinit tmio_mmc_probe(struct platform_device *dev)
|
|
{
|
|
struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
|
|
struct tmio_mmc_data *pdata;
|
|
struct resource *res_ctl;
|
|
struct tmio_mmc_host *host;
|
|
struct mmc_host *mmc;
|
|
int ret = -EINVAL;
|
|
|
|
if (dev->num_resources != 2)
|
|
goto out;
|
|
|
|
res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
if (!res_ctl)
|
|
goto out;
|
|
|
|
pdata = cell->driver_data;
|
|
if (!pdata || !pdata->hclk)
|
|
goto out;
|
|
|
|
ret = -ENOMEM;
|
|
|
|
mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
|
|
if (!mmc)
|
|
goto out;
|
|
|
|
host = mmc_priv(mmc);
|
|
host->mmc = mmc;
|
|
host->pdev = dev;
|
|
platform_set_drvdata(dev, mmc);
|
|
|
|
host->set_pwr = pdata->set_pwr;
|
|
host->set_clk_div = pdata->set_clk_div;
|
|
|
|
/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
|
|
host->bus_shift = resource_size(res_ctl) >> 10;
|
|
|
|
host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
|
|
if (!host->ctl)
|
|
goto host_free;
|
|
|
|
mmc->ops = &tmio_mmc_ops;
|
|
mmc->caps = MMC_CAP_4_BIT_DATA;
|
|
mmc->caps |= pdata->capabilities;
|
|
mmc->f_max = pdata->hclk;
|
|
mmc->f_min = mmc->f_max / 512;
|
|
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
|
|
|
|
/* Tell the MFD core we are ready to be enabled */
|
|
if (cell->enable) {
|
|
ret = cell->enable(dev);
|
|
if (ret)
|
|
goto unmap_ctl;
|
|
}
|
|
|
|
tmio_mmc_clk_stop(host);
|
|
reset(host);
|
|
|
|
ret = platform_get_irq(dev, 0);
|
|
if (ret >= 0)
|
|
host->irq = ret;
|
|
else
|
|
goto cell_disable;
|
|
|
|
disable_mmc_irqs(host, TMIO_MASK_ALL);
|
|
|
|
ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
|
|
IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host);
|
|
if (ret)
|
|
goto cell_disable;
|
|
|
|
mmc_add_host(mmc);
|
|
|
|
printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
|
|
(unsigned long)host->ctl, host->irq);
|
|
|
|
/* Unmask the IRQs we want to know about */
|
|
enable_mmc_irqs(host, TMIO_MASK_IRQ);
|
|
|
|
return 0;
|
|
|
|
cell_disable:
|
|
if (cell->disable)
|
|
cell->disable(dev);
|
|
unmap_ctl:
|
|
iounmap(host->ctl);
|
|
host_free:
|
|
mmc_free_host(mmc);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static int __devexit tmio_mmc_remove(struct platform_device *dev)
|
|
{
|
|
struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
|
|
struct mmc_host *mmc = platform_get_drvdata(dev);
|
|
|
|
platform_set_drvdata(dev, NULL);
|
|
|
|
if (mmc) {
|
|
struct tmio_mmc_host *host = mmc_priv(mmc);
|
|
mmc_remove_host(mmc);
|
|
free_irq(host->irq, host);
|
|
if (cell->disable)
|
|
cell->disable(dev);
|
|
iounmap(host->ctl);
|
|
mmc_free_host(mmc);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* ------------------- device registration ----------------------- */
|
|
|
|
static struct platform_driver tmio_mmc_driver = {
|
|
.driver = {
|
|
.name = "tmio-mmc",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
.probe = tmio_mmc_probe,
|
|
.remove = __devexit_p(tmio_mmc_remove),
|
|
.suspend = tmio_mmc_suspend,
|
|
.resume = tmio_mmc_resume,
|
|
};
|
|
|
|
|
|
static int __init tmio_mmc_init(void)
|
|
{
|
|
return platform_driver_register(&tmio_mmc_driver);
|
|
}
|
|
|
|
static void __exit tmio_mmc_exit(void)
|
|
{
|
|
platform_driver_unregister(&tmio_mmc_driver);
|
|
}
|
|
|
|
module_init(tmio_mmc_init);
|
|
module_exit(tmio_mmc_exit);
|
|
|
|
MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
|
|
MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:tmio-mmc");
|