bd7d95cafb
When we emulate a guest instruction, we don't advance the hardware singlestep state machine, and thus the guest will receive a software step exception after a next instruction which is not emulated by the host. We bodge around this in an ad-hoc fashion. Sometimes we explicitly check whether userspace requested a single step, and fake a debug exception from within the kernel. Other times, we advance the HW singlestep state rely on the HW to generate the exception for us. Thus, the observed step behaviour differs for host and guest. Let's make this simpler and consistent by always advancing the HW singlestep state machine when we skip an instruction. Thus we can rely on the hardware to generate the singlestep exception for us, and never need to explicitly check for an active-pending step, nor do we need to fake a debug exception from the guest. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
239 lines
7.1 KiB
C
239 lines
7.1 KiB
C
/*
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* Debug and Guest Debug support
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*
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* Copyright (C) 2015 - Linaro Ltd
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* Author: Alex Bennée <alex.bennee@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kvm_host.h>
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#include <linux/hw_breakpoint.h>
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#include <asm/debug-monitors.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_emulate.h>
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#include "trace.h"
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/* These are the bits of MDSCR_EL1 we may manipulate */
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#define MDSCR_EL1_DEBUG_MASK (DBG_MDSCR_SS | \
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DBG_MDSCR_KDE | \
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DBG_MDSCR_MDE)
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static DEFINE_PER_CPU(u32, mdcr_el2);
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/**
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* save/restore_guest_debug_regs
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*
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* For some debug operations we need to tweak some guest registers. As
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* a result we need to save the state of those registers before we
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* make those modifications.
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*
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* Guest access to MDSCR_EL1 is trapped by the hypervisor and handled
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* after we have restored the preserved value to the main context.
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*/
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static void save_guest_debug_regs(struct kvm_vcpu *vcpu)
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{
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u64 val = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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vcpu->arch.guest_debug_preserved.mdscr_el1 = val;
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trace_kvm_arm_set_dreg32("Saved MDSCR_EL1",
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vcpu->arch.guest_debug_preserved.mdscr_el1);
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}
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static void restore_guest_debug_regs(struct kvm_vcpu *vcpu)
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{
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u64 val = vcpu->arch.guest_debug_preserved.mdscr_el1;
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vcpu_write_sys_reg(vcpu, val, MDSCR_EL1);
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trace_kvm_arm_set_dreg32("Restored MDSCR_EL1",
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vcpu_read_sys_reg(vcpu, MDSCR_EL1));
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}
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/**
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* kvm_arm_init_debug - grab what we need for debug
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*
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* Currently the sole task of this function is to retrieve the initial
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* value of mdcr_el2 so we can preserve MDCR_EL2.HPMN which has
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* presumably been set-up by some knowledgeable bootcode.
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*
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* It is called once per-cpu during CPU hyp initialisation.
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*/
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void kvm_arm_init_debug(void)
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{
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__this_cpu_write(mdcr_el2, kvm_call_hyp(__kvm_get_mdcr_el2));
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}
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/**
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* kvm_arm_reset_debug_ptr - reset the debug ptr to point to the vcpu state
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*/
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void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.debug_ptr = &vcpu->arch.vcpu_debug_state;
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}
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/**
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* kvm_arm_setup_debug - set up debug related stuff
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*
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* @vcpu: the vcpu pointer
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*
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* This is called before each entry into the hypervisor to setup any
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* debug related registers. Currently this just ensures we will trap
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* access to:
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* - Performance monitors (MDCR_EL2_TPM/MDCR_EL2_TPMCR)
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* - Debug ROM Address (MDCR_EL2_TDRA)
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* - OS related registers (MDCR_EL2_TDOSA)
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* - Statistical profiler (MDCR_EL2_TPMS/MDCR_EL2_E2PB)
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*
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* Additionally, KVM only traps guest accesses to the debug registers if
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* the guest is not actively using them (see the KVM_ARM64_DEBUG_DIRTY
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* flag on vcpu->arch.flags). Since the guest must not interfere
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* with the hardware state when debugging the guest, we must ensure that
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* trapping is enabled whenever we are debugging the guest using the
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* debug registers.
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*/
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void kvm_arm_setup_debug(struct kvm_vcpu *vcpu)
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{
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bool trap_debug = !(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY);
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unsigned long mdscr;
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trace_kvm_arm_setup_debug(vcpu, vcpu->guest_debug);
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/*
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* This also clears MDCR_EL2_E2PB_MASK to disable guest access
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* to the profiling buffer.
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*/
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vcpu->arch.mdcr_el2 = __this_cpu_read(mdcr_el2) & MDCR_EL2_HPMN_MASK;
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vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM |
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MDCR_EL2_TPMS |
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MDCR_EL2_TPMCR |
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MDCR_EL2_TDRA |
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MDCR_EL2_TDOSA);
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/* Is Guest debugging in effect? */
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if (vcpu->guest_debug) {
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/* Route all software debug exceptions to EL2 */
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vcpu->arch.mdcr_el2 |= MDCR_EL2_TDE;
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/* Save guest debug state */
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save_guest_debug_regs(vcpu);
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/*
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* Single Step (ARM ARM D2.12.3 The software step state
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* machine)
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*
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* If we are doing Single Step we need to manipulate
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* the guest's MDSCR_EL1.SS and PSTATE.SS. Once the
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* step has occurred the hypervisor will trap the
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* debug exception and we return to userspace.
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*
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* If the guest attempts to single step its userspace
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* we would have to deal with a trapped exception
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* while in the guest kernel. Because this would be
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* hard to unwind we suppress the guest's ability to
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* do so by masking MDSCR_EL.SS.
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*
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* This confuses guest debuggers which use
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* single-step behind the scenes but everything
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* returns to normal once the host is no longer
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* debugging the system.
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*/
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if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
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*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;
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mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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mdscr |= DBG_MDSCR_SS;
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vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);
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} else {
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mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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mdscr &= ~DBG_MDSCR_SS;
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vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);
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}
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trace_kvm_arm_set_dreg32("SPSR_EL2", *vcpu_cpsr(vcpu));
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/*
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* HW Breakpoints and watchpoints
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*
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* We simply switch the debug_ptr to point to our new
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* external_debug_state which has been populated by the
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* debug ioctl. The existing KVM_ARM64_DEBUG_DIRTY
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* mechanism ensures the registers are updated on the
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* world switch.
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*/
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if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
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/* Enable breakpoints/watchpoints */
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mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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mdscr |= DBG_MDSCR_MDE;
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vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);
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vcpu->arch.debug_ptr = &vcpu->arch.external_debug_state;
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vcpu->arch.flags |= KVM_ARM64_DEBUG_DIRTY;
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trap_debug = true;
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trace_kvm_arm_set_regset("BKPTS", get_num_brps(),
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&vcpu->arch.debug_ptr->dbg_bcr[0],
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&vcpu->arch.debug_ptr->dbg_bvr[0]);
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trace_kvm_arm_set_regset("WAPTS", get_num_wrps(),
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&vcpu->arch.debug_ptr->dbg_wcr[0],
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&vcpu->arch.debug_ptr->dbg_wvr[0]);
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}
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}
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BUG_ON(!vcpu->guest_debug &&
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vcpu->arch.debug_ptr != &vcpu->arch.vcpu_debug_state);
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/* Trap debug register access */
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if (trap_debug)
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vcpu->arch.mdcr_el2 |= MDCR_EL2_TDA;
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/* If KDE or MDE are set, perform a full save/restore cycle. */
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if (vcpu_read_sys_reg(vcpu, MDSCR_EL1) & (DBG_MDSCR_KDE | DBG_MDSCR_MDE))
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vcpu->arch.flags |= KVM_ARM64_DEBUG_DIRTY;
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trace_kvm_arm_set_dreg32("MDCR_EL2", vcpu->arch.mdcr_el2);
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trace_kvm_arm_set_dreg32("MDSCR_EL1", vcpu_read_sys_reg(vcpu, MDSCR_EL1));
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}
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void kvm_arm_clear_debug(struct kvm_vcpu *vcpu)
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{
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trace_kvm_arm_clear_debug(vcpu->guest_debug);
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if (vcpu->guest_debug) {
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restore_guest_debug_regs(vcpu);
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/*
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* If we were using HW debug we need to restore the
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* debug_ptr to the guest debug state.
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*/
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if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
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kvm_arm_reset_debug_ptr(vcpu);
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trace_kvm_arm_set_regset("BKPTS", get_num_brps(),
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&vcpu->arch.debug_ptr->dbg_bcr[0],
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&vcpu->arch.debug_ptr->dbg_bvr[0]);
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trace_kvm_arm_set_regset("WAPTS", get_num_wrps(),
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&vcpu->arch.debug_ptr->dbg_wcr[0],
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&vcpu->arch.debug_ptr->dbg_wvr[0]);
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}
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}
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}
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