12afc0cf81
The default is enabled, and there should be no need to reconfigure the status for SoC internal devices in the board specific files. Only the USB PHY used needs to be configured in the board specific files. Cc: Bin Liu <b-liu@ti.com> Cc: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
301 lines
6.1 KiB
Plaintext
301 lines
6.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
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*
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* Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd1_reg>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins>;
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compatible = "gpio-leds";
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led0 {
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label = "com:green:user";
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gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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vbat: fixedregulator0 {
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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};
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vmmc: fixedregulator1 {
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compatible = "regulator-fixed";
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regulator-name = "vmmc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&am33xx_pinmux {
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
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>;
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};
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nandflash_pins: pinmux_nandflash_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_30 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
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>;
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};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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>;
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};
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leds_pins: pinmux_leds_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
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>;
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};
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};
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&mac {
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status = "okay";
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};
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&davinci_mdio {
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status = "okay";
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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ethphy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&cpsw_emac0 {
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phy-handle = <ðphy0>;
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phy-mode = "rmii";
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};
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&cpsw_emac1 {
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phy-handle = <ðphy1>;
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phy-mode = "rmii";
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};
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&elm {
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status = "okay";
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};
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&gpmc {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&nandflash_pins>;
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ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
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nand-bus-width = <8>;
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ti,nand-ecc-opt = "bch8";
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-on-ns = <0>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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ti,elm-id = <&elm>;
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/* MTD partition table */
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partition@0 {
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label = "SPL";
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reg = <0x00000000 0x000080000>;
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};
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partition@1 {
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label = "U-boot";
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reg = <0x00080000 0x001e0000>;
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};
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partition@2 {
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label = "U-Boot Env";
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reg = <0x00260000 0x00020000>;
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};
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partition@3 {
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label = "Kernel";
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reg = <0x00280000 0x00500000>;
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};
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partition@4 {
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label = "File System";
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reg = <0x00780000 0x007880000>;
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};
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};
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};
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&i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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clock-frequency = <400000>;
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tps: tps@2d {
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reg = <0x2d>;
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};
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};
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&mmc1 {
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status = "okay";
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vmmc-supply = <&vmmc>;
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bus-width = <4>;
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};
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&uart0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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};
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&usb1 {
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dr_mode = "host";
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};
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#include "tps65910.dtsi"
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&tps {
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vcc1-supply = <&vbat>;
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vcc2-supply = <&vbat>;
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vcc3-supply = <&vbat>;
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vcc4-supply = <&vbat>;
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vcc5-supply = <&vbat>;
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vcc6-supply = <&vbat>;
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vcc7-supply = <&vbat>;
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vccio-supply = <&vbat>;
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regulators {
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vrtc_reg: regulator@0 {
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regulator-always-on;
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};
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vio_reg: regulator@1 {
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regulator-always-on;
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};
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vdd1_reg: regulator@2 {
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/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <912500>;
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regulator-max-microvolt = <1312500>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd2_reg: regulator@3 {
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/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
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regulator-name = "vdd_core";
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regulator-min-microvolt = <912500>;
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regulator-max-microvolt = <1150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd3_reg: regulator@4 {
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regulator-always-on;
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};
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vdig1_reg: regulator@5 {
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regulator-always-on;
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};
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vdig2_reg: regulator@6 {
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regulator-always-on;
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};
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vpll_reg: regulator@7 {
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regulator-always-on;
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};
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vdac_reg: regulator@8 {
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regulator-always-on;
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};
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vaux1_reg: regulator@9 {
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regulator-always-on;
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};
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vaux2_reg: regulator@10 {
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regulator-always-on;
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};
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vaux33_reg: regulator@11 {
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regulator-always-on;
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};
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vmmc_reg: regulator@12 {
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regulator-always-on;
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};
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};
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};
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