7dd9c42f26
Leave b{4,6}50v3 GPIO expander pca953x pins P05,P10,P11 unconfigured as
they are now used to implement an additional watchdog mechanism in user
space. P10,P11 pins remain unused (and therefore hogged) on b850v3.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
380 lines
7.8 KiB
Plaintext
380 lines
7.8 KiB
Plaintext
/*
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* Copyright 2015 Timesys Corporation.
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* Copyright 2015 General Electric Company
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "imx6q-ba16.dtsi"
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/ {
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mclk: clock-mclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <22000000>;
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};
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gpio-poweroff {
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compatible = "gpio-poweroff";
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gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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reg_wl18xx_vmmc: regulator-wl18xx {
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compatible = "regulator-fixed";
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regulator-name = "vwl1807";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <70000>;
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enable-active-high;
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};
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reg_wlan: regulator-wlan {
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compatible = "regulator-fixed";
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regulator-name = "3P3V_wlan";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
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};
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sound {
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compatible = "fsl,imx6q-ba16-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6q-ba16-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&sgtl5000>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <4>;
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};
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aliases {
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mdio-gpio0 = &mdio0;
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};
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mdio0: mdio-gpio {
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compatible = "virtual,mdio-gpio";
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gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
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<&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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compatible = "marvell,mv88e6085"; /* 88e6240*/
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reg = <0>;
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switch_ports: ports {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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switchphy0: switchphy@0 {
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reg = <0>;
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};
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switchphy1: switchphy@1 {
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reg = <1>;
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};
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switchphy2: switchphy@2 {
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reg = <2>;
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};
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switchphy3: switchphy@3 {
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reg = <3>;
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};
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switchphy4: switchphy@4 {
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reg = <4>;
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};
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};
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};
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};
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};
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&ecspi5 {
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cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi5>;
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status = "okay";
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m25_eeprom: m25p80@0 {
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compatible = "atmel,at25";
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spi-max-frequency = <10000000>;
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size = <0x8000>;
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pagesize = <64>;
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reg = <0>;
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address-width = <16>;
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};
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};
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&i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
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pca9547: mux@70 {
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compatible = "nxp,pca9547";
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reg = <0x70>;
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#address-cells = <1>;
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#size-cells = <0>;
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mux1_i2c1: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0>;
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ads7830: ads7830@48 {
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compatible = "ti,ads7830";
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reg = <0x48>;
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};
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mma8453: mma8453@1c {
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compatible = "fsl,mma8453";
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reg = <0x1c>;
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};
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};
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mux1_i2c2: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x1>;
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eeprom: eeprom@50 {
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compatible = "atmel,24c08";
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reg = <0x50>;
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};
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mpl3115: mpl3115@60 {
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compatible = "fsl,mpl3115";
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reg = <0x60>;
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};
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};
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mux1_i2c3: i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2>;
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};
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mux1_i2c4: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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sgtl5000: codec@a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&mclk>;
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VDDA-supply = <®_1p8v>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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mux1_i2c5: i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x4>;
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pca9539: pca9539@74 {
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compatible = "nxp,pca9539";
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reg = <0x74>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio2>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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P12 {
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gpio-hog;
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gpios = <10 0>;
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output-low;
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line-name = "PCA9539-P12";
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};
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P13 {
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gpio-hog;
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gpios = <11 0>;
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output-low;
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line-name = "PCA9539-P13";
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};
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P14 {
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gpio-hog;
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gpios = <12 0>;
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output-low;
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line-name = "PCA9539-P14";
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};
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P15 {
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gpio-hog;
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gpios = <13 0>;
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output-low;
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line-name = "PCA9539-P15";
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};
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P16 {
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gpio-hog;
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gpios = <14 0>;
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output-low;
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line-name = "PCA9539-P16";
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};
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P17 {
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gpio-hog;
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gpios = <15 0>;
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output-low;
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line-name = "PCA9539-P17";
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};
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};
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};
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mux1_i2c6: i2c@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x5>;
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};
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mux1_i2c7: i2c@6 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x6>;
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};
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mux1_i2c8: i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x7>;
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};
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};
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};
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&i2c2 {
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pinctrl-names = "default", "gpio";
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
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};
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&i2c3 {
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pinctrl-names = "default", "gpio";
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pinctrl-1 = <&pinctrl_i2c3_gpio>;
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sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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};
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&iomuxc {
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pinctrl_i2c1_gpio: i2c1gpiogrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0
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MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0
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>;
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};
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pinctrl_i2c2_gpio: i2c2gpiogrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
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MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
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>;
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};
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pinctrl_i2c3_gpio: i2c3gpiogrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0
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MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
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>;
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};
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};
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&pmu {
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secure-reg-access;
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};
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&usdhc2 {
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status = "disabled";
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};
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&usdhc4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4>;
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bus-width = <4>;
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vmmc-supply = <®_wl18xx_vmmc>;
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no-1-8-v;
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non-removable;
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wakeup-source;
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keep-power-in-suspend;
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cap-power-off-card;
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max-frequency = <25000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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wlcore: wlcore@2 {
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compatible = "ti,wl1837";
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reg = <2>;
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interrupt-parent = <&gpio2>;
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interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
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tcxo-clock-frequency = <26000000>;
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};
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};
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&pcie {
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/* Synopsys, Inc. Device */
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pci_root: root@0,0 {
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compatible = "pci16c3,abcd";
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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};
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};
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