e89d108da9
This series of changes contains fixes for few SoC and board specific issues that would be good to have merged for v5.5-rc1: - Fix incorrect MMC card detection polarity for omap3-tao3530 - Fix wrong am57xx-beagle-x15 pinmux named states for eMMC - Fix dra7 cpsw mdio clock that causes wrong speed - Fix vcsi for droid4 so it won't get turned off after init - Fix rev and sysconfig register offsets for omap4 sgx so it can idle Then there are also two minor late changes to logicpd-torpedo-baseboard to configure 1-wire HDQ for battery stats, and remove out of date workaround comments no longer needed. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl3enk4RHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXORmhAA3MvMUSvfo3qOH+7kktlFFzAPWvFAkcCm jKjAEOY1b0wBJkTVY9vUEL8+UHrqDguxNz7JgVqi7GXbJvafc0C1KoFbbohPncPK bzao7o2lAgje1NQ+cBIFVrqYLHPX3uxKKeTwnqIeti47fF48eIqVG2soKBEGAGpR R6/9WfK7Gd2NA/OGPfKX4h8ggm1nXnTZWwfM53I4JjW+36G5ZgpFxdQ5GdNw2uk3 iXttxuigkEMS3dR+Wlphquf2kDmIhKgc+UQq3N13s6Axb/FyM7CBNuoCTS/63VXP 7j34/W43/Ehhjrssp35r0psEkqO23BzWo2HpmPjMpa8XSu0MrRMWBqzwGKCN92UQ KSVwvydBm6QL/WrMXGYlkEs73N/bHpX2Tb22EdhmbL7zpS+1D14g9t7qRvuF/AnE ubsNzl9Eh9hma4EFvVP+YETpuOMJ9lhgAz/aEUiTPV/AINDfyJkDFP9/feP9DUzj BJkthGbMGdmTbGIZ+fQ2E8fXVpNVFRNBwZ0mmjYm4EbG1pbroGiDXByNv9sTusPn e1x9aU9fOqrY0OAr7SR2s1/d3E3MntW6lzBYehNdA0C3NMutrxULqxXAksYwkOud S6f6uV2Uq9DumapwbKkC7GKaHtONW6ocKmfraH7S+CIbvohfR3FBBdCNtqM84XOE EBtdBX7ToBQ= =2L5D -----END PGP SIGNATURE----- Merge tag 'omap-for-v5.5/dt-fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes Device tree fixes for omap variants for for v5.5 merge window This series of changes contains fixes for few SoC and board specific issues that would be good to have merged for v5.5-rc1: - Fix incorrect MMC card detection polarity for omap3-tao3530 - Fix wrong am57xx-beagle-x15 pinmux named states for eMMC - Fix dra7 cpsw mdio clock that causes wrong speed - Fix vcsi for droid4 so it won't get turned off after init - Fix rev and sysconfig register offsets for omap4 sgx so it can idle Then there are also two minor late changes to logicpd-torpedo-baseboard to configure 1-wire HDQ for battery stats, and remove out of date workaround comments no longer needed. * tag 'omap-for-v5.5/dt-fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Fix sgx sysconfig register for omap4 ARM: dts: Fix vcsi regulator to be always-on for droid4 to prevent hangs ARM: dts: dra7: fix cpsw mdio fck clock ARM: dts: am57xx-beagle-x15: Update pinmux name to ddr_3_3v ARM: dts: omap3-tao3530: Fix incorrect MMC card detection GPIO polarity ARM: dts: logicpd-torpedo: Remove unnecessary notes/comments ARM: dts: logicpd-torpedo-baseboard: Enable HDQ Link: https://lore.kernel.org/r/pull-1574870758-237468@atomide.com Signed-off-by: Olof Johansson <olof@lixom.net>
471 lines
11 KiB
Plaintext
471 lines
11 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#include <dt-bindings/bus/ti-sysc.h>
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#include <dt-bindings/clock/omap4.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/pinctrl/omap.h>
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#include <dt-bindings/clock/omap4.h>
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/ {
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compatible = "ti,omap4430", "ti,omap4";
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interrupt-parent = <&wakeupgen>;
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#address-cells = <1>;
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#size-cells = <1>;
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chosen { };
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aliases {
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i2c0 = &i2c1;
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i2c1 = &i2c2;
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i2c2 = &i2c3;
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i2c3 = &i2c4;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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next-level-cache = <&L2>;
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reg = <0x0>;
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clocks = <&dpll_mpu_ck>;
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clock-names = "cpu";
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clock-latency = <300000>; /* From omap-cpufreq driver */
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};
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cpu@1 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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next-level-cache = <&L2>;
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reg = <0x1>;
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};
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};
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/*
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* Note that 4430 needs cross trigger interface (CTI) supported
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* before we can configure the interrupts. This means sampling
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* events are not supported for pmu. Note that 4460 does not use
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* CTI, see also 4460.dtsi.
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*/
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pmu {
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compatible = "arm,cortex-a9-pmu";
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ti,hwmods = "debugss";
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};
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gic: interrupt-controller@48241000 {
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compatible = "arm,cortex-a9-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x48241000 0x1000>,
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<0x48240100 0x0100>;
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interrupt-parent = <&gic>;
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};
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L2: l2-cache-controller@48242000 {
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compatible = "arm,pl310-cache";
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reg = <0x48242000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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local-timer@48240600 {
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compatible = "arm,cortex-a9-twd-timer";
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clocks = <&mpu_periphclk>;
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reg = <0x48240600 0x20>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
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interrupt-parent = <&gic>;
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};
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wakeupgen: interrupt-controller@48281000 {
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compatible = "ti,omap4-wugen-mpu";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x48281000 0x1000>;
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interrupt-parent = <&gic>;
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};
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/*
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* The soc node represents the soc top level view. It is used for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap4-mpu";
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ti,hwmods = "mpu";
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sram = <&ocmcram>;
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};
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dsp {
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compatible = "ti,omap3-c64";
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ti,hwmods = "dsp";
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};
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iva {
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compatible = "ti,ivahd";
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ti,hwmods = "iva";
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};
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};
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/*
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* XXX: Use a flat representation of the OMAP4 interconnect.
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* The real OMAP interconnect network is quite complex.
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* Since it will not bring real advantage to represent that in DT for
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* the moment, just use a fake OCP bus entry to represent the whole bus
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* hierarchy.
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*/
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ocp {
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compatible = "ti,omap4-l3-noc", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
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reg = <0x44000000 0x1000>,
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<0x44800000 0x2000>,
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<0x45000000 0x1000>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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l4_wkup: interconnect@4a300000 {
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};
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l4_cfg: interconnect@4a000000 {
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};
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l4_per: interconnect@48000000 {
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};
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l4_abe: interconnect@40100000 {
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};
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ocmcram: sram@40304000 {
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compatible = "mmio-sram";
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reg = <0x40304000 0xa000>; /* 40k */
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};
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gpmc: gpmc@50000000 {
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compatible = "ti,omap4430-gpmc";
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reg = <0x50000000 0x1000>;
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#address-cells = <2>;
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#size-cells = <1>;
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&sdma 4>;
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dma-names = "rxtx";
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gpmc,num-cs = <8>;
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gpmc,num-waitpins = <4>;
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ti,hwmods = "gpmc";
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ti,no-idle-on-init;
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clocks = <&l3_div_ck>;
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clock-names = "fck";
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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mmu_dsp: mmu@4a066000 {
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compatible = "ti,omap4-iommu";
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reg = <0x4a066000 0x100>;
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "mmu_dsp";
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#iommu-cells = <0>;
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};
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target-module@52000000 {
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compatible = "ti,sysc-omap4", "ti,sysc";
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ti,hwmods = "iss";
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reg = <0x52000000 0x4>,
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<0x52000010 0x4>;
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reg-names = "rev", "sysc";
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ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
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ti,sysc-midle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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ti,sysc-delay-us = <2>;
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clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x52000000 0x1000000>;
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/* No child device binding, driver in staging */
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};
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mmu_ipu: mmu@55082000 {
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compatible = "ti,omap4-iommu";
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reg = <0x55082000 0x100>;
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interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "mmu_ipu";
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#iommu-cells = <0>;
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ti,iommu-bus-err-back;
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};
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target-module@4012c000 {
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compatible = "ti,sysc-omap4", "ti,sysc";
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ti,hwmods = "slimbus1";
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reg = <0x4012c000 0x4>,
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<0x4012c010 0x4>;
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reg-names = "rev", "sysc";
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ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
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<0x4902c000 0x4902c000 0x1000>; /* L3 */
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/* No child device binding or driver in mainline */
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};
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dmm@4e000000 {
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compatible = "ti,omap4-dmm";
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reg = <0x4e000000 0x800>;
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interrupts = <0 113 0x4>;
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ti,hwmods = "dmm";
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};
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emif1: emif@4c000000 {
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compatible = "ti,emif-4d";
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reg = <0x4c000000 0x100>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "emif1";
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ti,no-idle-on-init;
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phy-type = <1>;
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hw-caps-read-idle-ctrl;
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hw-caps-ll-interface;
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hw-caps-temp-alert;
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};
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emif2: emif@4d000000 {
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compatible = "ti,emif-4d";
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reg = <0x4d000000 0x100>;
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interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "emif2";
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ti,no-idle-on-init;
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phy-type = <1>;
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hw-caps-read-idle-ctrl;
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hw-caps-ll-interface;
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hw-caps-temp-alert;
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};
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aes1: aes@4b501000 {
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compatible = "ti,omap4-aes";
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ti,hwmods = "aes1";
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reg = <0x4b501000 0xa0>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&sdma 111>, <&sdma 110>;
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dma-names = "tx", "rx";
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};
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aes2: aes@4b701000 {
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compatible = "ti,omap4-aes";
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ti,hwmods = "aes2";
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reg = <0x4b701000 0xa0>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&sdma 114>, <&sdma 113>;
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dma-names = "tx", "rx";
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};
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des: des@480a5000 {
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compatible = "ti,omap4-des";
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ti,hwmods = "des";
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reg = <0x480a5000 0xa0>;
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&sdma 117>, <&sdma 116>;
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dma-names = "tx", "rx";
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};
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sham: sham@4b100000 {
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compatible = "ti,omap4-sham";
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ti,hwmods = "sham";
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reg = <0x4b100000 0x300>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&sdma 119>;
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dma-names = "rx";
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};
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abb_mpu: regulator-abb-mpu {
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compatible = "ti,abb-v2";
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regulator-name = "abb_mpu";
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#address-cells = <0>;
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#size-cells = <0>;
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ti,tranxdone-status-mask = <0x80>;
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clocks = <&sys_clkin_ck>;
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ti,settling-time = <50>;
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ti,clock-cycles = <16>;
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status = "disabled";
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};
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abb_iva: regulator-abb-iva {
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compatible = "ti,abb-v2";
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regulator-name = "abb_iva";
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#address-cells = <0>;
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#size-cells = <0>;
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ti,tranxdone-status-mask = <0x80000000>;
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clocks = <&sys_clkin_ck>;
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ti,settling-time = <50>;
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ti,clock-cycles = <16>;
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status = "disabled";
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};
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target-module@56000000 {
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compatible = "ti,sysc-omap4", "ti,sysc";
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reg = <0x5600fe00 0x4>,
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<0x5600fe10 0x4>;
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reg-names = "rev", "sysc";
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ti,sysc-midle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x56000000 0x2000000>;
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/*
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* Closed source PowerVR driver, no child device
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* binding or driver in mainline
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*/
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};
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dss: dss@58000000 {
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compatible = "ti,omap4-dss";
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reg = <0x58000000 0x80>;
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status = "disabled";
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ti,hwmods = "dss_core";
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clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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dispc@58001000 {
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compatible = "ti,omap4-dispc";
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reg = <0x58001000 0x1000>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "dss_dispc";
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clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
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clock-names = "fck";
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};
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rfbi: encoder@58002000 {
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compatible = "ti,omap4-rfbi";
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reg = <0x58002000 0x1000>;
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status = "disabled";
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ti,hwmods = "dss_rfbi";
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clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>, <&l3_div_ck>;
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clock-names = "fck", "ick";
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};
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venc: encoder@58003000 {
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compatible = "ti,omap4-venc";
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reg = <0x58003000 0x1000>;
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status = "disabled";
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ti,hwmods = "dss_venc";
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clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
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clock-names = "fck";
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};
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dsi1: encoder@58004000 {
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compatible = "ti,omap4-dsi";
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reg = <0x58004000 0x200>,
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<0x58004200 0x40>,
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<0x58004300 0x20>;
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reg-names = "proto", "phy", "pll";
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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ti,hwmods = "dss_dsi1";
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clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
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<&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
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clock-names = "fck", "sys_clk";
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};
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dsi2: encoder@58005000 {
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compatible = "ti,omap4-dsi";
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reg = <0x58005000 0x200>,
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<0x58005200 0x40>,
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<0x58005300 0x20>;
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reg-names = "proto", "phy", "pll";
|
|
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
ti,hwmods = "dss_dsi2";
|
|
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
|
|
<&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
|
|
clock-names = "fck", "sys_clk";
|
|
};
|
|
|
|
hdmi: encoder@58006000 {
|
|
compatible = "ti,omap4-hdmi";
|
|
reg = <0x58006000 0x200>,
|
|
<0x58006200 0x100>,
|
|
<0x58006300 0x100>,
|
|
<0x58006400 0x1000>;
|
|
reg-names = "wp", "pll", "phy", "core";
|
|
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
ti,hwmods = "dss_hdmi";
|
|
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
|
|
<&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
|
|
clock-names = "fck", "sys_clk";
|
|
dmas = <&sdma 76>;
|
|
dma-names = "audio_tx";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
#include "omap4-l4.dtsi"
|
|
#include "omap4-l4-abe.dtsi"
|
|
#include "omap44xx-clocks.dtsi"
|
|
|
|
&prm {
|
|
prm_tesla: prm@400 {
|
|
compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
|
|
reg = <0x400 0x100>;
|
|
#reset-cells = <1>;
|
|
};
|
|
|
|
prm_core: prm@700 {
|
|
compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
|
|
reg = <0x700 0x100>;
|
|
#reset-cells = <1>;
|
|
};
|
|
|
|
prm_ivahd: prm@f00 {
|
|
compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
|
|
reg = <0xf00 0x100>;
|
|
#reset-cells = <1>;
|
|
};
|
|
|
|
prm_device: prm@1b00 {
|
|
compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
|
|
reg = <0x1b00 0x40>;
|
|
#reset-cells = <1>;
|
|
};
|
|
};
|