fcaf20360a
Based on 1 normalized pattern(s): the code contained herein is licensed under the gnu general public license you may obtain a copy of the gnu general public license version 2 or later at the following locations http www opensource org licenses gpl license html http www gnu org copyleft gpl html extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
213 lines
4.7 KiB
Plaintext
213 lines
4.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2012 Stefan Roese <sr@denx.de>
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*/
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,spear600";
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cpus {
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#address-cells = <0>;
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#size-cells = <0>;
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cpu {
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compatible = "arm,arm926ej-s";
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device_type = "cpu";
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0x40000000>;
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};
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ahb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0xd0000000 0xd0000000 0x30000000>;
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vic0: interrupt-controller@f1100000 {
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compatible = "arm,pl190-vic";
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interrupt-controller;
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reg = <0xf1100000 0x1000>;
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#interrupt-cells = <1>;
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};
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vic1: interrupt-controller@f1000000 {
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compatible = "arm,pl190-vic";
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interrupt-controller;
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reg = <0xf1000000 0x1000>;
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#interrupt-cells = <1>;
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};
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clcd: clcd@fc200000 {
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compatible = "arm,pl110", "arm,primecell";
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reg = <0xfc200000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <12>;
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status = "disabled";
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};
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dmac: dma@fc400000 {
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compatible = "arm,pl080", "arm,primecell";
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reg = <0xfc400000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <10>;
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status = "disabled";
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};
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gmac: ethernet@e0800000 {
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compatible = "st,spear600-gmac";
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reg = <0xe0800000 0x8000>;
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interrupt-parent = <&vic1>;
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interrupts = <24 23>;
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interrupt-names = "macirq", "eth_wake_irq";
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phy-mode = "gmii";
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status = "disabled";
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};
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fsmc: flash@d1800000 {
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compatible = "st,spear600-fsmc-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd1800000 0x1000 /* FSMC Register */
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0xd2000000 0x0010 /* NAND Base DATA */
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0xd2020000 0x0010 /* NAND Base ADDR */
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0xd2010000 0x0010>; /* NAND Base CMD */
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reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
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status = "disabled";
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};
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smi: flash@fc000000 {
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compatible = "st,spear600-smi";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xfc000000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <12>;
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status = "disabled";
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};
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ehci_usb0: ehci@e1800000 {
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compatible = "st,spear600-ehci", "usb-ehci";
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reg = <0xe1800000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <27>;
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status = "disabled";
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};
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ehci_usb1: ehci@e2000000 {
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compatible = "st,spear600-ehci", "usb-ehci";
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reg = <0xe2000000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <29>;
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status = "disabled";
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};
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ohci_usb0: ohci@e1900000 {
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compatible = "st,spear600-ohci", "usb-ohci";
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reg = <0xe1900000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <26>;
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status = "disabled";
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};
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ohci_usb1: ohci@e2100000 {
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compatible = "st,spear600-ohci", "usb-ohci";
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reg = <0xe2100000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <28>;
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status = "disabled";
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};
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apb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0xd0000000 0xd0000000 0x30000000>;
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uart0: serial@d0000000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xd0000000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <24>;
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status = "disabled";
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};
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uart1: serial@d0080000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xd0080000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <25>;
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status = "disabled";
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};
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/* local/cpu GPIO */
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gpio0: gpio@f0100000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xf0100000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <18>;
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};
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/* basic GPIO */
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gpio1: gpio@fc980000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfc980000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <19>;
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};
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/* appl GPIO */
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gpio2: gpio@d8100000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xd8100000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <4>;
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};
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i2c: i2c@d0200000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0xd0200000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <28>;
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status = "disabled";
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};
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rtc: rtc@fc900000 {
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compatible = "st,spear600-rtc";
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reg = <0xfc900000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <10>;
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status = "disabled";
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};
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timer@f0000000 {
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compatible = "st,spear-timer";
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reg = <0xf0000000 0x400>;
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interrupt-parent = <&vic0>;
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interrupts = <16>;
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};
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adc: adc@d820b000 {
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compatible = "st,spear600-adc";
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reg = <0xd820b000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <6>;
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status = "disabled";
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};
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};
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};
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};
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