22 lines
500 B
Plaintext
22 lines
500 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*/
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&gpu_3d0 {
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assigned-clock-rates = <800000000>, <1000000000>;
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fsl,sc_gpu_pid = <IMX_SC_R_GPU_0_PID0>;
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};
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&gpu1_subsys {
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imx8_gpu_ss: imx8_gpu1_ss {
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compatible = "fsl,imx8qm-gpu", "fsl,imx8-gpu-ss";
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cores = <&gpu_3d0>, <&gpu_3d1>;
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reg = <0x80000000 0x80000000>, <0x0 0x10000000>;
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reg-names = "phys_baseaddr", "contiguous_mem";
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depth-compression = <0>;
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status = "disabled";
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};
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};
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