![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
164 lines
4.5 KiB
C
164 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* linux/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v5.c
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*
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* Copyright (C) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*/
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#include "regs-mfc.h"
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#include "s5p_mfc_cmd.h"
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#include "s5p_mfc_common.h"
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#include "s5p_mfc_debug.h"
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#include "s5p_mfc_cmd_v5.h"
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/* This function is used to send a command to the MFC */
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static int s5p_mfc_cmd_host2risc_v5(struct s5p_mfc_dev *dev, int cmd,
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struct s5p_mfc_cmd_args *args)
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{
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int cur_cmd;
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unsigned long timeout;
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timeout = jiffies + msecs_to_jiffies(MFC_BW_TIMEOUT);
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/* wait until host to risc command register becomes 'H2R_CMD_EMPTY' */
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do {
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if (time_after(jiffies, timeout)) {
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mfc_err("Timeout while waiting for hardware\n");
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return -EIO;
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}
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cur_cmd = mfc_read(dev, S5P_FIMV_HOST2RISC_CMD);
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} while (cur_cmd != S5P_FIMV_H2R_CMD_EMPTY);
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mfc_write(dev, args->arg[0], S5P_FIMV_HOST2RISC_ARG1);
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mfc_write(dev, args->arg[1], S5P_FIMV_HOST2RISC_ARG2);
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mfc_write(dev, args->arg[2], S5P_FIMV_HOST2RISC_ARG3);
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mfc_write(dev, args->arg[3], S5P_FIMV_HOST2RISC_ARG4);
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/* Issue the command */
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mfc_write(dev, cmd, S5P_FIMV_HOST2RISC_CMD);
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return 0;
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}
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/* Initialize the MFC */
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static int s5p_mfc_sys_init_cmd_v5(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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h2r_args.arg[0] = dev->fw_buf.size;
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return s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_SYS_INIT,
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&h2r_args);
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}
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/* Suspend the MFC hardware */
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static int s5p_mfc_sleep_cmd_v5(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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return s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_SLEEP, &h2r_args);
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}
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/* Wake up the MFC hardware */
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static int s5p_mfc_wakeup_cmd_v5(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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return s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_WAKEUP,
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&h2r_args);
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}
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static int s5p_mfc_open_inst_cmd_v5(struct s5p_mfc_ctx *ctx)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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struct s5p_mfc_cmd_args h2r_args;
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int ret;
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/* Preparing decoding - getting instance number */
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mfc_debug(2, "Getting instance number (codec: %d)\n", ctx->codec_mode);
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dev->curr_ctx = ctx->num;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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switch (ctx->codec_mode) {
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case S5P_MFC_CODEC_H264_DEC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_H264_DEC;
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break;
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case S5P_MFC_CODEC_VC1_DEC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_VC1_DEC;
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break;
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case S5P_MFC_CODEC_MPEG4_DEC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_MPEG4_DEC;
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break;
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case S5P_MFC_CODEC_MPEG2_DEC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_MPEG2_DEC;
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break;
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case S5P_MFC_CODEC_H263_DEC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_H263_DEC;
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break;
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case S5P_MFC_CODEC_VC1RCV_DEC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_VC1RCV_DEC;
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break;
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case S5P_MFC_CODEC_H264_ENC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_H264_ENC;
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break;
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case S5P_MFC_CODEC_MPEG4_ENC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_MPEG4_ENC;
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break;
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case S5P_MFC_CODEC_H263_ENC:
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h2r_args.arg[0] = S5P_FIMV_CODEC_H263_ENC;
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break;
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default:
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h2r_args.arg[0] = S5P_FIMV_CODEC_NONE;
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}
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h2r_args.arg[1] = 0; /* no crc & no pixelcache */
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h2r_args.arg[2] = ctx->ctx.ofs;
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h2r_args.arg[3] = ctx->ctx.size;
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ret = s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_OPEN_INSTANCE,
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&h2r_args);
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if (ret) {
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mfc_err("Failed to create a new instance\n");
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ctx->state = MFCINST_ERROR;
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}
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return ret;
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}
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static int s5p_mfc_close_inst_cmd_v5(struct s5p_mfc_ctx *ctx)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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struct s5p_mfc_cmd_args h2r_args;
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int ret;
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if (ctx->state == MFCINST_FREE) {
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mfc_err("Instance already returned\n");
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ctx->state = MFCINST_ERROR;
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return -EINVAL;
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}
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/* Closing decoding instance */
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mfc_debug(2, "Returning instance number %d\n", ctx->inst_no);
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dev->curr_ctx = ctx->num;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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h2r_args.arg[0] = ctx->inst_no;
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ret = s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_CLOSE_INSTANCE,
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&h2r_args);
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if (ret) {
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mfc_err("Failed to return an instance\n");
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ctx->state = MFCINST_ERROR;
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return -EINVAL;
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}
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return 0;
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}
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/* Initialize cmd function pointers for MFC v5 */
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static struct s5p_mfc_hw_cmds s5p_mfc_cmds_v5 = {
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.cmd_host2risc = s5p_mfc_cmd_host2risc_v5,
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.sys_init_cmd = s5p_mfc_sys_init_cmd_v5,
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.sleep_cmd = s5p_mfc_sleep_cmd_v5,
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.wakeup_cmd = s5p_mfc_wakeup_cmd_v5,
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.open_inst_cmd = s5p_mfc_open_inst_cmd_v5,
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.close_inst_cmd = s5p_mfc_close_inst_cmd_v5,
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};
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struct s5p_mfc_hw_cmds *s5p_mfc_init_hw_cmds_v5(void)
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{
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return &s5p_mfc_cmds_v5;
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}
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