![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
170 lines
4.5 KiB
C
170 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* linux/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*/
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#include "s5p_mfc_common.h"
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#include "s5p_mfc_cmd.h"
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#include "s5p_mfc_debug.h"
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#include "s5p_mfc_intr.h"
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#include "s5p_mfc_opr.h"
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#include "s5p_mfc_cmd_v6.h"
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static int s5p_mfc_cmd_host2risc_v6(struct s5p_mfc_dev *dev, int cmd,
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struct s5p_mfc_cmd_args *args)
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{
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mfc_debug(2, "Issue the command: %d\n", cmd);
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/* Reset RISC2HOST command */
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mfc_write(dev, 0x0, S5P_FIMV_RISC2HOST_CMD_V6);
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/* Issue the command */
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mfc_write(dev, cmd, S5P_FIMV_HOST2RISC_CMD_V6);
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mfc_write(dev, 0x1, S5P_FIMV_HOST2RISC_INT_V6);
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return 0;
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}
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static int s5p_mfc_sys_init_cmd_v6(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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struct s5p_mfc_buf_size_v6 *buf_size = dev->variant->buf_size->priv;
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int ret;
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ret = s5p_mfc_hw_call(dev->mfc_ops, alloc_dev_context_buffer, dev);
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if (ret)
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return ret;
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mfc_write(dev, dev->ctx_buf.dma, S5P_FIMV_CONTEXT_MEM_ADDR_V6);
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mfc_write(dev, buf_size->dev_ctx, S5P_FIMV_CONTEXT_MEM_SIZE_V6);
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return s5p_mfc_cmd_host2risc_v6(dev, S5P_FIMV_H2R_CMD_SYS_INIT_V6,
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&h2r_args);
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}
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static int s5p_mfc_sleep_cmd_v6(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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return s5p_mfc_cmd_host2risc_v6(dev, S5P_FIMV_H2R_CMD_SLEEP_V6,
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&h2r_args);
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}
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static int s5p_mfc_wakeup_cmd_v6(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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return s5p_mfc_cmd_host2risc_v6(dev, S5P_FIMV_H2R_CMD_WAKEUP_V6,
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&h2r_args);
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}
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/* Open a new instance and get its number */
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static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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struct s5p_mfc_cmd_args h2r_args;
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int codec_type;
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mfc_debug(2, "Requested codec mode: %d\n", ctx->codec_mode);
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dev->curr_ctx = ctx->num;
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switch (ctx->codec_mode) {
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case S5P_MFC_CODEC_H264_DEC:
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codec_type = S5P_FIMV_CODEC_H264_DEC_V6;
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break;
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case S5P_MFC_CODEC_H264_MVC_DEC:
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codec_type = S5P_FIMV_CODEC_H264_MVC_DEC_V6;
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break;
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case S5P_MFC_CODEC_VC1_DEC:
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codec_type = S5P_FIMV_CODEC_VC1_DEC_V6;
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break;
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case S5P_MFC_CODEC_MPEG4_DEC:
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codec_type = S5P_FIMV_CODEC_MPEG4_DEC_V6;
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break;
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case S5P_MFC_CODEC_MPEG2_DEC:
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codec_type = S5P_FIMV_CODEC_MPEG2_DEC_V6;
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break;
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case S5P_MFC_CODEC_H263_DEC:
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codec_type = S5P_FIMV_CODEC_H263_DEC_V6;
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break;
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case S5P_MFC_CODEC_VC1RCV_DEC:
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codec_type = S5P_FIMV_CODEC_VC1RCV_DEC_V6;
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break;
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case S5P_MFC_CODEC_VP8_DEC:
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codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
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break;
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case S5P_MFC_CODEC_HEVC_DEC:
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codec_type = S5P_FIMV_CODEC_HEVC_DEC;
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break;
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case S5P_MFC_CODEC_VP9_DEC:
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codec_type = S5P_FIMV_CODEC_VP9_DEC;
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break;
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case S5P_MFC_CODEC_H264_ENC:
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codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
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break;
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case S5P_MFC_CODEC_H264_MVC_ENC:
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codec_type = S5P_FIMV_CODEC_H264_MVC_ENC_V6;
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break;
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case S5P_MFC_CODEC_MPEG4_ENC:
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codec_type = S5P_FIMV_CODEC_MPEG4_ENC_V6;
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break;
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case S5P_MFC_CODEC_H263_ENC:
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codec_type = S5P_FIMV_CODEC_H263_ENC_V6;
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break;
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case S5P_MFC_CODEC_VP8_ENC:
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codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
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break;
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case S5P_MFC_CODEC_HEVC_ENC:
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codec_type = S5P_FIMV_CODEC_HEVC_ENC;
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break;
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default:
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codec_type = S5P_FIMV_CODEC_NONE_V6;
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}
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mfc_write(dev, codec_type, S5P_FIMV_CODEC_TYPE_V6);
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mfc_write(dev, ctx->ctx.dma, S5P_FIMV_CONTEXT_MEM_ADDR_V6);
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mfc_write(dev, ctx->ctx.size, S5P_FIMV_CONTEXT_MEM_SIZE_V6);
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mfc_write(dev, 0, S5P_FIMV_D_CRC_CTRL_V6); /* no crc */
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return s5p_mfc_cmd_host2risc_v6(dev, S5P_FIMV_H2R_CMD_OPEN_INSTANCE_V6,
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&h2r_args);
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}
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/* Close instance */
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static int s5p_mfc_close_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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struct s5p_mfc_cmd_args h2r_args;
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int ret = 0;
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dev->curr_ctx = ctx->num;
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if (ctx->state != MFCINST_FREE) {
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mfc_write(dev, ctx->inst_no, S5P_FIMV_INSTANCE_ID_V6);
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ret = s5p_mfc_cmd_host2risc_v6(dev,
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S5P_FIMV_H2R_CMD_CLOSE_INSTANCE_V6,
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&h2r_args);
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} else {
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ret = -EINVAL;
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}
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return ret;
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}
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/* Initialize cmd function pointers for MFC v6 */
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static struct s5p_mfc_hw_cmds s5p_mfc_cmds_v6 = {
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.cmd_host2risc = s5p_mfc_cmd_host2risc_v6,
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.sys_init_cmd = s5p_mfc_sys_init_cmd_v6,
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.sleep_cmd = s5p_mfc_sleep_cmd_v6,
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.wakeup_cmd = s5p_mfc_wakeup_cmd_v6,
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.open_inst_cmd = s5p_mfc_open_inst_cmd_v6,
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.close_inst_cmd = s5p_mfc_close_inst_cmd_v6,
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};
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struct s5p_mfc_hw_cmds *s5p_mfc_init_hw_cmds_v6(void)
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{
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return &s5p_mfc_cmds_v6;
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}
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