![Laurent Pinchart](/assets/img/avatar_default.png)
Extend the vsp1_du_atomic_flush() API with writeback support by adding format, pitch and memory addresses of the writeback framebuffer. Writeback completion is reported through the existing frame completion callback with a new VSP1_DU_STATUS_WRITEBACK status flag. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
1166 lines
30 KiB
C
1166 lines
30 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* vsp1_dl.c -- R-Car VSP1 Display List
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*
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* Copyright (C) 2015 Renesas Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*/
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#include <linux/refcount.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include "vsp1.h"
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#include "vsp1_dl.h"
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#define VSP1_DL_NUM_ENTRIES 256
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#define VSP1_DLH_INT_ENABLE (1 << 1)
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#define VSP1_DLH_AUTO_START (1 << 0)
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#define VSP1_DLH_EXT_PRE_CMD_EXEC (1 << 9)
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#define VSP1_DLH_EXT_POST_CMD_EXEC (1 << 8)
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struct vsp1_dl_header_list {
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u32 num_bytes;
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u32 addr;
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} __packed;
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struct vsp1_dl_header {
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u32 num_lists;
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struct vsp1_dl_header_list lists[8];
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u32 next_header;
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u32 flags;
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} __packed;
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/**
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* struct vsp1_dl_ext_header - Extended display list header
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* @padding: padding zero bytes for alignment
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* @pre_ext_dl_num_cmd: number of pre-extended command bodies to parse
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* @flags: enables or disables execution of the pre and post command
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* @pre_ext_dl_plist: start address of pre-extended display list bodies
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* @post_ext_dl_num_cmd: number of post-extended command bodies to parse
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* @post_ext_dl_plist: start address of post-extended display list bodies
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*/
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struct vsp1_dl_ext_header {
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u32 padding;
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/*
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* The datasheet represents flags as stored before pre_ext_dl_num_cmd,
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* expecting 32-bit accesses. The flags are appropriate to the whole
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* header, not just the pre_ext command, and thus warrant being
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* separated out. Due to byte ordering, and representing as 16 bit
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* values here, the flags must be positioned after the
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* pre_ext_dl_num_cmd.
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*/
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u16 pre_ext_dl_num_cmd;
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u16 flags;
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u32 pre_ext_dl_plist;
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u32 post_ext_dl_num_cmd;
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u32 post_ext_dl_plist;
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} __packed;
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struct vsp1_dl_header_extended {
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struct vsp1_dl_header header;
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struct vsp1_dl_ext_header ext;
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} __packed;
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struct vsp1_dl_entry {
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u32 addr;
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u32 data;
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} __packed;
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/**
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* struct vsp1_pre_ext_dl_body - Pre Extended Display List Body
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* @opcode: Extended display list command operation code
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* @flags: Pre-extended command flags. These are specific to each command
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* @address_set: Source address set pointer. Must have 16-byte alignment
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* @reserved: Zero bits for alignment.
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*/
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struct vsp1_pre_ext_dl_body {
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u32 opcode;
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u32 flags;
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u32 address_set;
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u32 reserved;
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} __packed;
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/**
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* struct vsp1_dl_body - Display list body
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* @list: entry in the display list list of bodies
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* @free: entry in the pool free body list
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* @refcnt: reference tracking for the body
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* @pool: pool to which this body belongs
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* @entries: array of entries
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* @dma: DMA address of the entries
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* @size: size of the DMA memory in bytes
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* @num_entries: number of stored entries
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* @max_entries: number of entries available
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*/
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struct vsp1_dl_body {
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struct list_head list;
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struct list_head free;
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refcount_t refcnt;
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struct vsp1_dl_body_pool *pool;
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struct vsp1_dl_entry *entries;
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dma_addr_t dma;
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size_t size;
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unsigned int num_entries;
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unsigned int max_entries;
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};
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/**
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* struct vsp1_dl_body_pool - display list body pool
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* @dma: DMA address of the entries
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* @size: size of the full DMA memory pool in bytes
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* @mem: CPU memory pointer for the pool
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* @bodies: Array of DLB structures for the pool
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* @free: List of free DLB entries
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* @lock: Protects the free list
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* @vsp1: the VSP1 device
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*/
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struct vsp1_dl_body_pool {
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/* DMA allocation */
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dma_addr_t dma;
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size_t size;
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void *mem;
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/* Body management */
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struct vsp1_dl_body *bodies;
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struct list_head free;
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spinlock_t lock;
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struct vsp1_device *vsp1;
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};
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/**
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* struct vsp1_cmd_pool - Display List commands pool
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* @dma: DMA address of the entries
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* @size: size of the full DMA memory pool in bytes
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* @mem: CPU memory pointer for the pool
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* @cmds: Array of command structures for the pool
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* @free: Free pool entries
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* @lock: Protects the free list
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* @vsp1: the VSP1 device
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*/
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struct vsp1_dl_cmd_pool {
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/* DMA allocation */
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dma_addr_t dma;
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size_t size;
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void *mem;
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struct vsp1_dl_ext_cmd *cmds;
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struct list_head free;
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spinlock_t lock;
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struct vsp1_device *vsp1;
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};
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/**
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* struct vsp1_dl_list - Display list
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* @list: entry in the display list manager lists
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* @dlm: the display list manager
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* @header: display list header
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* @extension: extended display list header. NULL for normal lists
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* @dma: DMA address for the header
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* @body0: first display list body
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* @bodies: list of extra display list bodies
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* @pre_cmd: pre command to be issued through extended dl header
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* @post_cmd: post command to be issued through extended dl header
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* @has_chain: if true, indicates that there's a partition chain
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* @chain: entry in the display list partition chain
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* @flags: display list flags, a combination of VSP1_DL_FRAME_END_*
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*/
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struct vsp1_dl_list {
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struct list_head list;
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struct vsp1_dl_manager *dlm;
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struct vsp1_dl_header *header;
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struct vsp1_dl_ext_header *extension;
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dma_addr_t dma;
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struct vsp1_dl_body *body0;
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struct list_head bodies;
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struct vsp1_dl_ext_cmd *pre_cmd;
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struct vsp1_dl_ext_cmd *post_cmd;
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bool has_chain;
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struct list_head chain;
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unsigned int flags;
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};
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/**
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* struct vsp1_dl_manager - Display List manager
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* @index: index of the related WPF
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* @singleshot: execute the display list in single-shot mode
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* @vsp1: the VSP1 device
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* @lock: protects the free, active, queued, and pending lists
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* @free: array of all free display lists
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* @active: list currently being processed (loaded) by hardware
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* @queued: list queued to the hardware (written to the DL registers)
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* @pending: list waiting to be queued to the hardware
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* @pool: body pool for the display list bodies
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* @cmdpool: commands pool for extended display list
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*/
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struct vsp1_dl_manager {
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unsigned int index;
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bool singleshot;
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struct vsp1_device *vsp1;
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spinlock_t lock;
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struct list_head free;
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struct vsp1_dl_list *active;
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struct vsp1_dl_list *queued;
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struct vsp1_dl_list *pending;
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struct vsp1_dl_body_pool *pool;
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struct vsp1_dl_cmd_pool *cmdpool;
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};
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/* -----------------------------------------------------------------------------
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* Display List Body Management
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*/
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/**
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* vsp1_dl_body_pool_create - Create a pool of bodies from a single allocation
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* @vsp1: The VSP1 device
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* @num_bodies: The number of bodies to allocate
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* @num_entries: The maximum number of entries that a body can contain
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* @extra_size: Extra allocation provided for the bodies
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*
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* Allocate a pool of display list bodies each with enough memory to contain the
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* requested number of entries plus the @extra_size.
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*
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* Return a pointer to a pool on success or NULL if memory can't be allocated.
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*/
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struct vsp1_dl_body_pool *
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vsp1_dl_body_pool_create(struct vsp1_device *vsp1, unsigned int num_bodies,
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unsigned int num_entries, size_t extra_size)
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{
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struct vsp1_dl_body_pool *pool;
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size_t dlb_size;
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unsigned int i;
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pool = kzalloc(sizeof(*pool), GFP_KERNEL);
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if (!pool)
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return NULL;
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pool->vsp1 = vsp1;
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/*
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* TODO: 'extra_size' is only used by vsp1_dlm_create(), to allocate
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* extra memory for the display list header. We need only one header per
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* display list, not per display list body, thus this allocation is
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* extraneous and should be reworked in the future.
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*/
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dlb_size = num_entries * sizeof(struct vsp1_dl_entry) + extra_size;
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pool->size = dlb_size * num_bodies;
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pool->bodies = kcalloc(num_bodies, sizeof(*pool->bodies), GFP_KERNEL);
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if (!pool->bodies) {
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kfree(pool);
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return NULL;
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}
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pool->mem = dma_alloc_wc(vsp1->bus_master, pool->size, &pool->dma,
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GFP_KERNEL);
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if (!pool->mem) {
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kfree(pool->bodies);
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kfree(pool);
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return NULL;
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}
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spin_lock_init(&pool->lock);
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INIT_LIST_HEAD(&pool->free);
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for (i = 0; i < num_bodies; ++i) {
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struct vsp1_dl_body *dlb = &pool->bodies[i];
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dlb->pool = pool;
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dlb->max_entries = num_entries;
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dlb->dma = pool->dma + i * dlb_size;
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dlb->entries = pool->mem + i * dlb_size;
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list_add_tail(&dlb->free, &pool->free);
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}
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return pool;
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}
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/**
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* vsp1_dl_body_pool_destroy - Release a body pool
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* @pool: The body pool
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*
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* Release all components of a pool allocation.
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*/
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void vsp1_dl_body_pool_destroy(struct vsp1_dl_body_pool *pool)
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{
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if (!pool)
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return;
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if (pool->mem)
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dma_free_wc(pool->vsp1->bus_master, pool->size, pool->mem,
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pool->dma);
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kfree(pool->bodies);
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kfree(pool);
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}
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/**
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* vsp1_dl_body_get - Obtain a body from a pool
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* @pool: The body pool
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*
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* Obtain a body from the pool without blocking.
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*
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* Returns a display list body or NULL if there are none available.
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*/
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struct vsp1_dl_body *vsp1_dl_body_get(struct vsp1_dl_body_pool *pool)
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{
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struct vsp1_dl_body *dlb = NULL;
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unsigned long flags;
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spin_lock_irqsave(&pool->lock, flags);
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if (!list_empty(&pool->free)) {
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dlb = list_first_entry(&pool->free, struct vsp1_dl_body, free);
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list_del(&dlb->free);
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refcount_set(&dlb->refcnt, 1);
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}
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spin_unlock_irqrestore(&pool->lock, flags);
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return dlb;
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}
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/**
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* vsp1_dl_body_put - Return a body back to its pool
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* @dlb: The display list body
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*
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* Return a body back to the pool, and reset the num_entries to clear the list.
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*/
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void vsp1_dl_body_put(struct vsp1_dl_body *dlb)
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{
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unsigned long flags;
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if (!dlb)
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return;
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if (!refcount_dec_and_test(&dlb->refcnt))
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return;
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dlb->num_entries = 0;
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spin_lock_irqsave(&dlb->pool->lock, flags);
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list_add_tail(&dlb->free, &dlb->pool->free);
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spin_unlock_irqrestore(&dlb->pool->lock, flags);
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}
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/**
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* vsp1_dl_body_write - Write a register to a display list body
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* @dlb: The body
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* @reg: The register address
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* @data: The register value
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*
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* Write the given register and value to the display list body. The maximum
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* number of entries that can be written in a body is specified when the body is
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* allocated by vsp1_dl_body_alloc().
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*/
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void vsp1_dl_body_write(struct vsp1_dl_body *dlb, u32 reg, u32 data)
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{
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if (WARN_ONCE(dlb->num_entries >= dlb->max_entries,
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"DLB size exceeded (max %u)", dlb->max_entries))
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return;
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dlb->entries[dlb->num_entries].addr = reg;
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dlb->entries[dlb->num_entries].data = data;
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dlb->num_entries++;
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}
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/* -----------------------------------------------------------------------------
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* Display List Extended Command Management
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*/
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enum vsp1_extcmd_type {
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VSP1_EXTCMD_AUTODISP,
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VSP1_EXTCMD_AUTOFLD,
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};
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struct vsp1_extended_command_info {
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u16 opcode;
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size_t body_size;
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};
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static const struct vsp1_extended_command_info vsp1_extended_commands[] = {
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[VSP1_EXTCMD_AUTODISP] = { 0x02, 96 },
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[VSP1_EXTCMD_AUTOFLD] = { 0x03, 160 },
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};
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/**
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* vsp1_dl_cmd_pool_create - Create a pool of commands from a single allocation
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* @vsp1: The VSP1 device
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* @type: The command pool type
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* @num_cmds: The number of commands to allocate
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*
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* Allocate a pool of commands each with enough memory to contain the private
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* data of each command. The allocation sizes are dependent upon the command
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* type.
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*
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* Return a pointer to the pool on success or NULL if memory can't be allocated.
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*/
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static struct vsp1_dl_cmd_pool *
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vsp1_dl_cmd_pool_create(struct vsp1_device *vsp1, enum vsp1_extcmd_type type,
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unsigned int num_cmds)
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{
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struct vsp1_dl_cmd_pool *pool;
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unsigned int i;
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size_t cmd_size;
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pool = kzalloc(sizeof(*pool), GFP_KERNEL);
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if (!pool)
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return NULL;
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spin_lock_init(&pool->lock);
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INIT_LIST_HEAD(&pool->free);
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pool->cmds = kcalloc(num_cmds, sizeof(*pool->cmds), GFP_KERNEL);
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if (!pool->cmds) {
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kfree(pool);
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return NULL;
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}
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cmd_size = sizeof(struct vsp1_pre_ext_dl_body) +
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vsp1_extended_commands[type].body_size;
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cmd_size = ALIGN(cmd_size, 16);
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pool->size = cmd_size * num_cmds;
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pool->mem = dma_alloc_wc(vsp1->bus_master, pool->size, &pool->dma,
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GFP_KERNEL);
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if (!pool->mem) {
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kfree(pool->cmds);
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kfree(pool);
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return NULL;
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}
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for (i = 0; i < num_cmds; ++i) {
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struct vsp1_dl_ext_cmd *cmd = &pool->cmds[i];
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size_t cmd_offset = i * cmd_size;
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/* data_offset must be 16 byte aligned for DMA. */
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size_t data_offset = sizeof(struct vsp1_pre_ext_dl_body) +
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cmd_offset;
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cmd->pool = pool;
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cmd->opcode = vsp1_extended_commands[type].opcode;
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/*
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* TODO: Auto-disp can utilise more than one extended body
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* command per cmd.
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*/
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cmd->num_cmds = 1;
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cmd->cmds = pool->mem + cmd_offset;
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cmd->cmd_dma = pool->dma + cmd_offset;
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cmd->data = pool->mem + data_offset;
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cmd->data_dma = pool->dma + data_offset;
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list_add_tail(&cmd->free, &pool->free);
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}
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return pool;
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}
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static
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struct vsp1_dl_ext_cmd *vsp1_dl_ext_cmd_get(struct vsp1_dl_cmd_pool *pool)
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{
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struct vsp1_dl_ext_cmd *cmd = NULL;
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unsigned long flags;
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spin_lock_irqsave(&pool->lock, flags);
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if (!list_empty(&pool->free)) {
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cmd = list_first_entry(&pool->free, struct vsp1_dl_ext_cmd,
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free);
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list_del(&cmd->free);
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}
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spin_unlock_irqrestore(&pool->lock, flags);
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return cmd;
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}
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static void vsp1_dl_ext_cmd_put(struct vsp1_dl_ext_cmd *cmd)
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{
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unsigned long flags;
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if (!cmd)
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return;
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/* Reset flags, these mark data usage. */
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cmd->flags = 0;
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spin_lock_irqsave(&cmd->pool->lock, flags);
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list_add_tail(&cmd->free, &cmd->pool->free);
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spin_unlock_irqrestore(&cmd->pool->lock, flags);
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}
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static void vsp1_dl_ext_cmd_pool_destroy(struct vsp1_dl_cmd_pool *pool)
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{
|
|
if (!pool)
|
|
return;
|
|
|
|
if (pool->mem)
|
|
dma_free_wc(pool->vsp1->bus_master, pool->size, pool->mem,
|
|
pool->dma);
|
|
|
|
kfree(pool->cmds);
|
|
kfree(pool);
|
|
}
|
|
|
|
struct vsp1_dl_ext_cmd *vsp1_dl_get_pre_cmd(struct vsp1_dl_list *dl)
|
|
{
|
|
struct vsp1_dl_manager *dlm = dl->dlm;
|
|
|
|
if (dl->pre_cmd)
|
|
return dl->pre_cmd;
|
|
|
|
dl->pre_cmd = vsp1_dl_ext_cmd_get(dlm->cmdpool);
|
|
|
|
return dl->pre_cmd;
|
|
}
|
|
|
|
/* ----------------------------------------------------------------------------
|
|
* Display List Transaction Management
|
|
*/
|
|
|
|
static struct vsp1_dl_list *vsp1_dl_list_alloc(struct vsp1_dl_manager *dlm)
|
|
{
|
|
struct vsp1_dl_list *dl;
|
|
size_t header_offset;
|
|
|
|
dl = kzalloc(sizeof(*dl), GFP_KERNEL);
|
|
if (!dl)
|
|
return NULL;
|
|
|
|
INIT_LIST_HEAD(&dl->bodies);
|
|
dl->dlm = dlm;
|
|
|
|
/* Get a default body for our list. */
|
|
dl->body0 = vsp1_dl_body_get(dlm->pool);
|
|
if (!dl->body0)
|
|
return NULL;
|
|
|
|
header_offset = dl->body0->max_entries * sizeof(*dl->body0->entries);
|
|
|
|
dl->header = ((void *)dl->body0->entries) + header_offset;
|
|
dl->dma = dl->body0->dma + header_offset;
|
|
|
|
memset(dl->header, 0, sizeof(*dl->header));
|
|
dl->header->lists[0].addr = dl->body0->dma;
|
|
|
|
return dl;
|
|
}
|
|
|
|
static void vsp1_dl_list_bodies_put(struct vsp1_dl_list *dl)
|
|
{
|
|
struct vsp1_dl_body *dlb, *tmp;
|
|
|
|
list_for_each_entry_safe(dlb, tmp, &dl->bodies, list) {
|
|
list_del(&dlb->list);
|
|
vsp1_dl_body_put(dlb);
|
|
}
|
|
}
|
|
|
|
static void vsp1_dl_list_free(struct vsp1_dl_list *dl)
|
|
{
|
|
vsp1_dl_body_put(dl->body0);
|
|
vsp1_dl_list_bodies_put(dl);
|
|
|
|
kfree(dl);
|
|
}
|
|
|
|
/**
|
|
* vsp1_dl_list_get - Get a free display list
|
|
* @dlm: The display list manager
|
|
*
|
|
* Get a display list from the pool of free lists and return it.
|
|
*
|
|
* This function must be called without the display list manager lock held.
|
|
*/
|
|
struct vsp1_dl_list *vsp1_dl_list_get(struct vsp1_dl_manager *dlm)
|
|
{
|
|
struct vsp1_dl_list *dl = NULL;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&dlm->lock, flags);
|
|
|
|
if (!list_empty(&dlm->free)) {
|
|
dl = list_first_entry(&dlm->free, struct vsp1_dl_list, list);
|
|
list_del(&dl->list);
|
|
|
|
/*
|
|
* The display list chain must be initialised to ensure every
|
|
* display list can assert list_empty() if it is not in a chain.
|
|
*/
|
|
INIT_LIST_HEAD(&dl->chain);
|
|
}
|
|
|
|
spin_unlock_irqrestore(&dlm->lock, flags);
|
|
|
|
return dl;
|
|
}
|
|
|
|
/* This function must be called with the display list manager lock held.*/
|
|
static void __vsp1_dl_list_put(struct vsp1_dl_list *dl)
|
|
{
|
|
struct vsp1_dl_list *dl_next;
|
|
|
|
if (!dl)
|
|
return;
|
|
|
|
/*
|
|
* Release any linked display-lists which were chained for a single
|
|
* hardware operation.
|
|
*/
|
|
if (dl->has_chain) {
|
|
list_for_each_entry(dl_next, &dl->chain, chain)
|
|
__vsp1_dl_list_put(dl_next);
|
|
}
|
|
|
|
dl->has_chain = false;
|
|
|
|
vsp1_dl_list_bodies_put(dl);
|
|
|
|
vsp1_dl_ext_cmd_put(dl->pre_cmd);
|
|
vsp1_dl_ext_cmd_put(dl->post_cmd);
|
|
|
|
dl->pre_cmd = NULL;
|
|
dl->post_cmd = NULL;
|
|
|
|
/*
|
|
* body0 is reused as as an optimisation as presently every display list
|
|
* has at least one body, thus we reinitialise the entries list.
|
|
*/
|
|
dl->body0->num_entries = 0;
|
|
|
|
list_add_tail(&dl->list, &dl->dlm->free);
|
|
}
|
|
|
|
/**
|
|
* vsp1_dl_list_put - Release a display list
|
|
* @dl: The display list
|
|
*
|
|
* Release the display list and return it to the pool of free lists.
|
|
*
|
|
* Passing a NULL pointer to this function is safe, in that case no operation
|
|
* will be performed.
|
|
*/
|
|
void vsp1_dl_list_put(struct vsp1_dl_list *dl)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (!dl)
|
|
return;
|
|
|
|
spin_lock_irqsave(&dl->dlm->lock, flags);
|
|
__vsp1_dl_list_put(dl);
|
|
spin_unlock_irqrestore(&dl->dlm->lock, flags);
|
|
}
|
|
|
|
/**
|
|
* vsp1_dl_list_get_body0 - Obtain the default body for the display list
|
|
* @dl: The display list
|
|
*
|
|
* Obtain a pointer to the internal display list body allowing this to be passed
|
|
* directly to configure operations.
|
|
*/
|
|
struct vsp1_dl_body *vsp1_dl_list_get_body0(struct vsp1_dl_list *dl)
|
|
{
|
|
return dl->body0;
|
|
}
|
|
|
|
/**
|
|
* vsp1_dl_list_add_body - Add a body to the display list
|
|
* @dl: The display list
|
|
* @dlb: The body
|
|
*
|
|
* Add a display list body to a display list. Registers contained in bodies are
|
|
* processed after registers contained in the main display list, in the order in
|
|
* which bodies are added.
|
|
*
|
|
* Adding a body to a display list passes ownership of the body to the list. The
|
|
* caller retains its reference to the body when adding it to the display list,
|
|
* but is not allowed to add new entries to the body.
|
|
*
|
|
* The reference must be explicitly released by a call to vsp1_dl_body_put()
|
|
* when the body isn't needed anymore.
|
|
*/
|
|
int vsp1_dl_list_add_body(struct vsp1_dl_list *dl, struct vsp1_dl_body *dlb)
|
|
{
|
|
refcount_inc(&dlb->refcnt);
|
|
|
|
list_add_tail(&dlb->list, &dl->bodies);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* vsp1_dl_list_add_chain - Add a display list to a chain
|
|
* @head: The head display list
|
|
* @dl: The new display list
|
|
*
|
|
* Add a display list to an existing display list chain. The chained lists
|
|
* will be automatically processed by the hardware without intervention from
|
|
* the CPU. A display list end interrupt will only complete after the last
|
|
* display list in the chain has completed processing.
|
|
*
|
|
* Adding a display list to a chain passes ownership of the display list to
|
|
* the head display list item. The chain is released when the head dl item is
|
|
* put back with __vsp1_dl_list_put().
|
|
*/
|
|
int vsp1_dl_list_add_chain(struct vsp1_dl_list *head,
|
|
struct vsp1_dl_list *dl)
|
|
{
|
|
head->has_chain = true;
|
|
list_add_tail(&dl->chain, &head->chain);
|
|
return 0;
|
|
}
|
|
|
|
static void vsp1_dl_ext_cmd_fill_header(struct vsp1_dl_ext_cmd *cmd)
|
|
{
|
|
cmd->cmds[0].opcode = cmd->opcode;
|
|
cmd->cmds[0].flags = cmd->flags;
|
|
cmd->cmds[0].address_set = cmd->data_dma;
|
|
cmd->cmds[0].reserved = 0;
|
|
}
|
|
|
|
static void vsp1_dl_list_fill_header(struct vsp1_dl_list *dl, bool is_last)
|
|
{
|
|
struct vsp1_dl_manager *dlm = dl->dlm;
|
|
struct vsp1_dl_header_list *hdr = dl->header->lists;
|
|
struct vsp1_dl_body *dlb;
|
|
unsigned int num_lists = 0;
|
|
|
|
/*
|
|
* Fill the header with the display list bodies addresses and sizes. The
|
|
* address of the first body has already been filled when the display
|
|
* list was allocated.
|
|
*/
|
|
|
|
hdr->num_bytes = dl->body0->num_entries
|
|
* sizeof(*dl->header->lists);
|
|
|
|
list_for_each_entry(dlb, &dl->bodies, list) {
|
|
num_lists++;
|
|
hdr++;
|
|
|
|
hdr->addr = dlb->dma;
|
|
hdr->num_bytes = dlb->num_entries
|
|
* sizeof(*dl->header->lists);
|
|
}
|
|
|
|
dl->header->num_lists = num_lists;
|
|
dl->header->flags = 0;
|
|
|
|
/*
|
|
* Enable the interrupt for the end of each frame. In continuous mode
|
|
* chained lists are used with one list per frame, so enable the
|
|
* interrupt for each list. In singleshot mode chained lists are used
|
|
* to partition a single frame, so enable the interrupt for the last
|
|
* list only.
|
|
*/
|
|
if (!dlm->singleshot || is_last)
|
|
dl->header->flags |= VSP1_DLH_INT_ENABLE;
|
|
|
|
/*
|
|
* In continuous mode enable auto-start for all lists, as the VSP must
|
|
* loop on the same list until a new one is queued. In singleshot mode
|
|
* enable auto-start for all lists but the last to chain processing of
|
|
* partitions without software intervention.
|
|
*/
|
|
if (!dlm->singleshot || !is_last)
|
|
dl->header->flags |= VSP1_DLH_AUTO_START;
|
|
|
|
if (!is_last) {
|
|
/*
|
|
* If this is not the last display list in the chain, queue the
|
|
* next item for automatic processing by the hardware.
|
|
*/
|
|
struct vsp1_dl_list *next = list_next_entry(dl, chain);
|
|
|
|
dl->header->next_header = next->dma;
|
|
} else if (!dlm->singleshot) {
|
|
/*
|
|
* if the display list manager works in continuous mode, the VSP
|
|
* should loop over the display list continuously until
|
|
* instructed to do otherwise.
|
|
*/
|
|
dl->header->next_header = dl->dma;
|
|
}
|
|
|
|
if (!dl->extension)
|
|
return;
|
|
|
|
dl->extension->flags = 0;
|
|
|
|
if (dl->pre_cmd) {
|
|
dl->extension->pre_ext_dl_plist = dl->pre_cmd->cmd_dma;
|
|
dl->extension->pre_ext_dl_num_cmd = dl->pre_cmd->num_cmds;
|
|
dl->extension->flags |= VSP1_DLH_EXT_PRE_CMD_EXEC;
|
|
|
|
vsp1_dl_ext_cmd_fill_header(dl->pre_cmd);
|
|
}
|
|
|
|
if (dl->post_cmd) {
|
|
dl->extension->post_ext_dl_plist = dl->post_cmd->cmd_dma;
|
|
dl->extension->post_ext_dl_num_cmd = dl->post_cmd->num_cmds;
|
|
dl->extension->flags |= VSP1_DLH_EXT_POST_CMD_EXEC;
|
|
|
|
vsp1_dl_ext_cmd_fill_header(dl->post_cmd);
|
|
}
|
|
}
|
|
|
|
static bool vsp1_dl_list_hw_update_pending(struct vsp1_dl_manager *dlm)
|
|
{
|
|
struct vsp1_device *vsp1 = dlm->vsp1;
|
|
|
|
if (!dlm->queued)
|
|
return false;
|
|
|
|
/*
|
|
* Check whether the VSP1 has taken the update. The hardware indicates
|
|
* this by clearing the UPDHDR bit in the CMD register.
|
|
*/
|
|
return !!(vsp1_read(vsp1, VI6_CMD(dlm->index)) & VI6_CMD_UPDHDR);
|
|
}
|
|
|
|
static void vsp1_dl_list_hw_enqueue(struct vsp1_dl_list *dl)
|
|
{
|
|
struct vsp1_dl_manager *dlm = dl->dlm;
|
|
struct vsp1_device *vsp1 = dlm->vsp1;
|
|
|
|
/*
|
|
* Program the display list header address. If the hardware is idle
|
|
* (single-shot mode or first frame in continuous mode) it will then be
|
|
* started independently. If the hardware is operating, the
|
|
* VI6_DL_HDR_REF_ADDR register will be updated with the display list
|
|
* address.
|
|
*/
|
|
vsp1_write(vsp1, VI6_DL_HDR_ADDR(dlm->index), dl->dma);
|
|
}
|
|
|
|
static void vsp1_dl_list_commit_continuous(struct vsp1_dl_list *dl)
|
|
{
|
|
struct vsp1_dl_manager *dlm = dl->dlm;
|
|
|
|
/*
|
|
* If a previous display list has been queued to the hardware but not
|
|
* processed yet, the VSP can start processing it at any time. In that
|
|
* case we can't replace the queued list by the new one, as we could
|
|
* race with the hardware. We thus mark the update as pending, it will
|
|
* be queued up to the hardware by the frame end interrupt handler.
|
|
*
|
|
* If a display list is already pending we simply drop it as the new
|
|
* display list is assumed to contain a more recent configuration. It is
|
|
* an error if the already pending list has the
|
|
* VSP1_DL_FRAME_END_INTERNAL flag set, as there is then a process
|
|
* waiting for that list to complete. This shouldn't happen as the
|
|
* waiting process should perform proper locking, but warn just in
|
|
* case.
|
|
*/
|
|
if (vsp1_dl_list_hw_update_pending(dlm)) {
|
|
WARN_ON(dlm->pending &&
|
|
(dlm->pending->flags & VSP1_DL_FRAME_END_INTERNAL));
|
|
__vsp1_dl_list_put(dlm->pending);
|
|
dlm->pending = dl;
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Pass the new display list to the hardware and mark it as queued. It
|
|
* will become active when the hardware starts processing it.
|
|
*/
|
|
vsp1_dl_list_hw_enqueue(dl);
|
|
|
|
__vsp1_dl_list_put(dlm->queued);
|
|
dlm->queued = dl;
|
|
}
|
|
|
|
static void vsp1_dl_list_commit_singleshot(struct vsp1_dl_list *dl)
|
|
{
|
|
struct vsp1_dl_manager *dlm = dl->dlm;
|
|
|
|
/*
|
|
* When working in single-shot mode, the caller guarantees that the
|
|
* hardware is idle at this point. Just commit the head display list
|
|
* to hardware. Chained lists will be started automatically.
|
|
*/
|
|
vsp1_dl_list_hw_enqueue(dl);
|
|
|
|
dlm->active = dl;
|
|
}
|
|
|
|
void vsp1_dl_list_commit(struct vsp1_dl_list *dl, unsigned int dl_flags)
|
|
{
|
|
struct vsp1_dl_manager *dlm = dl->dlm;
|
|
struct vsp1_dl_list *dl_next;
|
|
unsigned long flags;
|
|
|
|
/* Fill the header for the head and chained display lists. */
|
|
vsp1_dl_list_fill_header(dl, list_empty(&dl->chain));
|
|
|
|
list_for_each_entry(dl_next, &dl->chain, chain) {
|
|
bool last = list_is_last(&dl_next->chain, &dl->chain);
|
|
|
|
vsp1_dl_list_fill_header(dl_next, last);
|
|
}
|
|
|
|
dl->flags = dl_flags & ~VSP1_DL_FRAME_END_COMPLETED;
|
|
|
|
spin_lock_irqsave(&dlm->lock, flags);
|
|
|
|
if (dlm->singleshot)
|
|
vsp1_dl_list_commit_singleshot(dl);
|
|
else
|
|
vsp1_dl_list_commit_continuous(dl);
|
|
|
|
spin_unlock_irqrestore(&dlm->lock, flags);
|
|
}
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Display List Manager
|
|
*/
|
|
|
|
/**
|
|
* vsp1_dlm_irq_frame_end - Display list handler for the frame end interrupt
|
|
* @dlm: the display list manager
|
|
*
|
|
* Return a set of flags that indicates display list completion status.
|
|
*
|
|
* The VSP1_DL_FRAME_END_COMPLETED flag indicates that the previous display list
|
|
* has completed at frame end. If the flag is not returned display list
|
|
* completion has been delayed by one frame because the display list commit
|
|
* raced with the frame end interrupt. The function always returns with the flag
|
|
* set in single-shot mode as display list processing is then not continuous and
|
|
* races never occur.
|
|
*
|
|
* The following flags are only supported for continuous mode.
|
|
*
|
|
* The VSP1_DL_FRAME_END_INTERNAL flag indicates that the display list that just
|
|
* became active had been queued with the internal notification flag.
|
|
*
|
|
* The VSP1_DL_FRAME_END_WRITEBACK flag indicates that the previously active
|
|
* display list had been queued with the writeback flag.
|
|
*/
|
|
unsigned int vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
|
|
{
|
|
struct vsp1_device *vsp1 = dlm->vsp1;
|
|
u32 status = vsp1_read(vsp1, VI6_STATUS);
|
|
unsigned int flags = 0;
|
|
|
|
spin_lock(&dlm->lock);
|
|
|
|
/*
|
|
* The mem-to-mem pipelines work in single-shot mode. No new display
|
|
* list can be queued, we don't have to do anything.
|
|
*/
|
|
if (dlm->singleshot) {
|
|
__vsp1_dl_list_put(dlm->active);
|
|
dlm->active = NULL;
|
|
flags |= VSP1_DL_FRAME_END_COMPLETED;
|
|
goto done;
|
|
}
|
|
|
|
/*
|
|
* If the commit operation raced with the interrupt and occurred after
|
|
* the frame end event but before interrupt processing, the hardware
|
|
* hasn't taken the update into account yet. We have to skip one frame
|
|
* and retry.
|
|
*/
|
|
if (vsp1_dl_list_hw_update_pending(dlm))
|
|
goto done;
|
|
|
|
/*
|
|
* Progressive streams report only TOP fields. If we have a BOTTOM
|
|
* field, we are interlaced, and expect the frame to complete on the
|
|
* next frame end interrupt.
|
|
*/
|
|
if (status & VI6_STATUS_FLD_STD(dlm->index))
|
|
goto done;
|
|
|
|
/*
|
|
* If the active display list has the writeback flag set, the frame
|
|
* completion marks the end of the writeback capture. Return the
|
|
* VSP1_DL_FRAME_END_WRITEBACK flag and reset the display list's
|
|
* writeback flag.
|
|
*/
|
|
if (dlm->active && (dlm->active->flags & VSP1_DL_FRAME_END_WRITEBACK)) {
|
|
flags |= VSP1_DL_FRAME_END_WRITEBACK;
|
|
dlm->active->flags &= ~VSP1_DL_FRAME_END_WRITEBACK;
|
|
}
|
|
|
|
/*
|
|
* The device starts processing the queued display list right after the
|
|
* frame end interrupt. The display list thus becomes active.
|
|
*/
|
|
if (dlm->queued) {
|
|
if (dlm->queued->flags & VSP1_DL_FRAME_END_INTERNAL)
|
|
flags |= VSP1_DL_FRAME_END_INTERNAL;
|
|
dlm->queued->flags &= ~VSP1_DL_FRAME_END_INTERNAL;
|
|
|
|
__vsp1_dl_list_put(dlm->active);
|
|
dlm->active = dlm->queued;
|
|
dlm->queued = NULL;
|
|
flags |= VSP1_DL_FRAME_END_COMPLETED;
|
|
}
|
|
|
|
/*
|
|
* Now that the VSP has started processing the queued display list, we
|
|
* can queue the pending display list to the hardware if one has been
|
|
* prepared.
|
|
*/
|
|
if (dlm->pending) {
|
|
vsp1_dl_list_hw_enqueue(dlm->pending);
|
|
dlm->queued = dlm->pending;
|
|
dlm->pending = NULL;
|
|
}
|
|
|
|
done:
|
|
spin_unlock(&dlm->lock);
|
|
|
|
return flags;
|
|
}
|
|
|
|
/* Hardware Setup */
|
|
void vsp1_dlm_setup(struct vsp1_device *vsp1)
|
|
{
|
|
unsigned int i;
|
|
u32 ctrl = (256 << VI6_DL_CTRL_AR_WAIT_SHIFT)
|
|
| VI6_DL_CTRL_DC2 | VI6_DL_CTRL_DC1 | VI6_DL_CTRL_DC0
|
|
| VI6_DL_CTRL_DLE;
|
|
u32 ext_dl = (0x02 << VI6_DL_EXT_CTRL_POLINT_SHIFT)
|
|
| VI6_DL_EXT_CTRL_DLPRI | VI6_DL_EXT_CTRL_EXT;
|
|
|
|
if (vsp1_feature(vsp1, VSP1_HAS_EXT_DL)) {
|
|
for (i = 0; i < vsp1->info->wpf_count; ++i)
|
|
vsp1_write(vsp1, VI6_DL_EXT_CTRL(i), ext_dl);
|
|
}
|
|
|
|
vsp1_write(vsp1, VI6_DL_CTRL, ctrl);
|
|
vsp1_write(vsp1, VI6_DL_SWAP, VI6_DL_SWAP_LWS);
|
|
}
|
|
|
|
void vsp1_dlm_reset(struct vsp1_dl_manager *dlm)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&dlm->lock, flags);
|
|
|
|
__vsp1_dl_list_put(dlm->active);
|
|
__vsp1_dl_list_put(dlm->queued);
|
|
__vsp1_dl_list_put(dlm->pending);
|
|
|
|
spin_unlock_irqrestore(&dlm->lock, flags);
|
|
|
|
dlm->active = NULL;
|
|
dlm->queued = NULL;
|
|
dlm->pending = NULL;
|
|
}
|
|
|
|
struct vsp1_dl_body *vsp1_dlm_dl_body_get(struct vsp1_dl_manager *dlm)
|
|
{
|
|
return vsp1_dl_body_get(dlm->pool);
|
|
}
|
|
|
|
struct vsp1_dl_manager *vsp1_dlm_create(struct vsp1_device *vsp1,
|
|
unsigned int index,
|
|
unsigned int prealloc)
|
|
{
|
|
struct vsp1_dl_manager *dlm;
|
|
size_t header_size;
|
|
unsigned int i;
|
|
|
|
dlm = devm_kzalloc(vsp1->dev, sizeof(*dlm), GFP_KERNEL);
|
|
if (!dlm)
|
|
return NULL;
|
|
|
|
dlm->index = index;
|
|
dlm->singleshot = vsp1->info->uapi;
|
|
dlm->vsp1 = vsp1;
|
|
|
|
spin_lock_init(&dlm->lock);
|
|
INIT_LIST_HEAD(&dlm->free);
|
|
|
|
/*
|
|
* Initialize the display list body and allocate DMA memory for the body
|
|
* and the header. Both are allocated together to avoid memory
|
|
* fragmentation, with the header located right after the body in
|
|
* memory. An extra body is allocated on top of the prealloc to account
|
|
* for the cached body used by the vsp1_pipeline object.
|
|
*/
|
|
header_size = vsp1_feature(vsp1, VSP1_HAS_EXT_DL) ?
|
|
sizeof(struct vsp1_dl_header_extended) :
|
|
sizeof(struct vsp1_dl_header);
|
|
|
|
header_size = ALIGN(header_size, 8);
|
|
|
|
dlm->pool = vsp1_dl_body_pool_create(vsp1, prealloc + 1,
|
|
VSP1_DL_NUM_ENTRIES, header_size);
|
|
if (!dlm->pool)
|
|
return NULL;
|
|
|
|
for (i = 0; i < prealloc; ++i) {
|
|
struct vsp1_dl_list *dl;
|
|
|
|
dl = vsp1_dl_list_alloc(dlm);
|
|
if (!dl) {
|
|
vsp1_dlm_destroy(dlm);
|
|
return NULL;
|
|
}
|
|
|
|
/* The extended header immediately follows the header. */
|
|
if (vsp1_feature(vsp1, VSP1_HAS_EXT_DL))
|
|
dl->extension = (void *)dl->header
|
|
+ sizeof(*dl->header);
|
|
|
|
list_add_tail(&dl->list, &dlm->free);
|
|
}
|
|
|
|
if (vsp1_feature(vsp1, VSP1_HAS_EXT_DL)) {
|
|
dlm->cmdpool = vsp1_dl_cmd_pool_create(vsp1,
|
|
VSP1_EXTCMD_AUTOFLD, prealloc);
|
|
if (!dlm->cmdpool) {
|
|
vsp1_dlm_destroy(dlm);
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
return dlm;
|
|
}
|
|
|
|
void vsp1_dlm_destroy(struct vsp1_dl_manager *dlm)
|
|
{
|
|
struct vsp1_dl_list *dl, *next;
|
|
|
|
if (!dlm)
|
|
return;
|
|
|
|
list_for_each_entry_safe(dl, next, &dlm->free, list) {
|
|
list_del(&dl->list);
|
|
vsp1_dl_list_free(dl);
|
|
}
|
|
|
|
vsp1_dl_body_pool_destroy(dlm->pool);
|
|
vsp1_dl_ext_cmd_pool_destroy(dlm->cmdpool);
|
|
}
|