![Arnaud Ebalard](/assets/img/avatar_default.png)
The bootloader on the Netgear ReadyNAS RN2120 uses Hardware BCH
ECC (strength = 4), while the pxa3xx NAND driver by default uses
Hamming ECC (strength = 1).
This patch changes the ECC mode on these machines to match that
of the bootloader and of the stock firmware. That way, it is
now possible to update the kernel from userland (e.g. using
standard tools from mtd-utils package); u-boot will happily
load and boot it.
The issue was initially reported and fixed by Ben Pedell for
RN102. The RN2120 shares the same Hynix H27U1G8F2BTR NAND
flash and setup. This patch is based on Ben's fix for RN102.
Fixes: ad51eddd95
("ARM: mvebu: Enable NAND controller in ReadyNAS 2120 .dts file")
Cc: <stable@vger.kernel.org> # v3.14+
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/61f6a1b7ad0adc57a0e201b9680bc2e5f214a317.1410035142.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
331 lines
6.8 KiB
Plaintext
331 lines
6.8 KiB
Plaintext
/*
|
|
* Device Tree file for NETGEAR ReadyNAS 2120
|
|
*
|
|
* Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* as published by the Free Software Foundation; either version
|
|
* 2 of the License, or (at your option) any later version.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include "armada-xp-mv78230.dtsi"
|
|
|
|
/ {
|
|
model = "NETGEAR ReadyNAS 2120";
|
|
compatible = "netgear,readynas-2120", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200 earlyprintk";
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0 0x00000000 0 0x80000000>; /* 2GB */
|
|
};
|
|
|
|
soc {
|
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
|
|
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
|
|
|
|
pcie-controller {
|
|
status = "okay";
|
|
|
|
/* Connected to first Marvell 88SE9170 SATA controller */
|
|
pcie@1,0 {
|
|
/* Port 0, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
|
|
/* Connected to second Marvell 88SE9170 SATA controller */
|
|
pcie@2,0 {
|
|
/* Port 0, Lane 1 */
|
|
status = "okay";
|
|
};
|
|
|
|
/* Connected to Fresco Logic FL1009 USB 3.0 controller */
|
|
pcie@5,0 {
|
|
/* Port 1, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
internal-regs {
|
|
pinctrl {
|
|
poweroff: poweroff {
|
|
marvell,pins = "mpp42";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
power_button_pin: power-button-pin {
|
|
marvell,pins = "mpp27";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
reset_button_pin: reset-button-pin {
|
|
marvell,pins = "mpp41";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata1_led_pin: sata1-led-pin {
|
|
marvell,pins = "mpp31";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata2_led_pin: sata2-led-pin {
|
|
marvell,pins = "mpp40";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata3_led_pin: sata3-led-pin {
|
|
marvell,pins = "mpp44";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata4_led_pin: sata4-led-pin {
|
|
marvell,pins = "mpp47";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata1_power_pin: sata1-power-pin {
|
|
marvell,pins = "mpp24";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata2_power_pin: sata2-power-pin {
|
|
marvell,pins = "mpp25";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata3_power_pin: sata3-power-pin {
|
|
marvell,pins = "mpp26";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata4_power_pin: sata4-power-pin {
|
|
marvell,pins = "mpp28";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata1_pres_pin: sata1-pres-pin {
|
|
marvell,pins = "mpp32";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata2_pres_pin: sata2-pres-pin {
|
|
marvell,pins = "mpp33";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata3_pres_pin: sata3-pres-pin {
|
|
marvell,pins = "mpp34";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
sata4_pres_pin: sata4-pres-pin {
|
|
marvell,pins = "mpp35";
|
|
marvell,function = "gpio";
|
|
};
|
|
|
|
err_led_pin: err-led-pin {
|
|
marvell,pins = "mpp45";
|
|
marvell,function = "gpio";
|
|
};
|
|
};
|
|
|
|
serial@12000 {
|
|
status = "okay";
|
|
};
|
|
|
|
mdio {
|
|
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
|
reg = <0>;
|
|
};
|
|
|
|
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
ethernet@70000 {
|
|
status = "okay";
|
|
phy = <&phy0>;
|
|
phy-mode = "rgmii-id";
|
|
};
|
|
|
|
ethernet@74000 {
|
|
status = "okay";
|
|
phy = <&phy1>;
|
|
phy-mode = "rgmii-id";
|
|
};
|
|
|
|
/* Front USB 2.0 port */
|
|
usb@50000 {
|
|
status = "okay";
|
|
};
|
|
|
|
i2c@11000 {
|
|
compatible = "marvell,mv64xxx-i2c";
|
|
clock-frequency = <400000>;
|
|
status = "okay";
|
|
|
|
isl12057: isl12057@68 {
|
|
compatible = "isl,isl12057";
|
|
reg = <0x68>;
|
|
};
|
|
|
|
/* Controller for rear fan #1 of 3 (Protechnic
|
|
* MGT4012XB-O20, 8000RPM) near eSATA port */
|
|
g762_fan1: g762@3e {
|
|
compatible = "gmt,g762";
|
|
reg = <0x3e>;
|
|
clocks = <&g762_clk>; /* input clock */
|
|
fan_gear_mode = <0>;
|
|
fan_startv = <1>;
|
|
pwm_polarity = <0>;
|
|
};
|
|
|
|
/* Controller for rear (center) fan #2 of 3 */
|
|
g762_fan2: g762@48 {
|
|
compatible = "gmt,g762";
|
|
reg = <0x48>;
|
|
clocks = <&g762_clk>; /* input clock */
|
|
fan_gear_mode = <0>;
|
|
fan_startv = <1>;
|
|
pwm_polarity = <0>;
|
|
};
|
|
|
|
/* Controller for rear fan #3 of 3 */
|
|
g762_fan3: g762@49 {
|
|
compatible = "gmt,g762";
|
|
reg = <0x49>;
|
|
clocks = <&g762_clk>; /* input clock */
|
|
fan_gear_mode = <0>;
|
|
fan_startv = <1>;
|
|
pwm_polarity = <0>;
|
|
};
|
|
|
|
/* Temperature sensor */
|
|
g751: g751@4c {
|
|
compatible = "gmt,g751";
|
|
reg = <0x4c>;
|
|
};
|
|
};
|
|
|
|
nand@d0000 {
|
|
status = "okay";
|
|
num-cs = <1>;
|
|
marvell,nand-keep-config;
|
|
marvell,nand-enable-arbiter;
|
|
nand-on-flash-bbt;
|
|
|
|
/* Use Hardware BCH ECC */
|
|
nand-ecc-strength = <4>;
|
|
nand-ecc-step-size = <512>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0000000 0x180000>; /* 1.5MB */
|
|
read-only;
|
|
};
|
|
|
|
partition@180000 {
|
|
label = "u-boot-env";
|
|
reg = <0x180000 0x20000>; /* 128KB */
|
|
read-only;
|
|
};
|
|
|
|
partition@200000 {
|
|
label = "uImage";
|
|
reg = <0x0200000 0x600000>; /* 6MB */
|
|
};
|
|
|
|
partition@800000 {
|
|
label = "minirootfs";
|
|
reg = <0x0800000 0x400000>; /* 4MB */
|
|
};
|
|
|
|
/* Last MB is for the BBT, i.e. not writable */
|
|
partition@c00000 {
|
|
label = "ubifs";
|
|
reg = <0x0c00000 0x7400000>; /* 116MB */
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
clocks {
|
|
g762_clk: g762-oscillator {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
};
|
|
};
|
|
|
|
gpio-leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-0 = <&sata1_led_pin &sata2_led_pin &err_led_pin
|
|
&sata3_led_pin &sata4_led_pin>;
|
|
pinctrl-names = "default";
|
|
|
|
red-sata1-led {
|
|
label = "rn2120:red:sata1";
|
|
gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
|
|
default-state = "off";
|
|
};
|
|
|
|
red-sata2-led {
|
|
label = "rn2120:red:sata2";
|
|
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
|
default-state = "off";
|
|
};
|
|
|
|
red-sata3-led {
|
|
label = "rn2120:red:sata3";
|
|
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
|
default-state = "off";
|
|
};
|
|
|
|
red-sata4-led {
|
|
label = "rn2120:red:sata4";
|
|
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
|
default-state = "off";
|
|
};
|
|
|
|
red-err-led {
|
|
label = "rn2120:red:err";
|
|
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
|
|
default-state = "off";
|
|
};
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-0 = <&power_button_pin &reset_button_pin>;
|
|
pinctrl-names = "default";
|
|
|
|
power-button {
|
|
label = "Power Button";
|
|
linux,code = <KEY_POWER>;
|
|
gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
reset-button {
|
|
label = "Reset Button";
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
gpio-poweroff {
|
|
compatible = "gpio-poweroff";
|
|
pinctrl-0 = <&poweroff>;
|
|
pinctrl-names = "default";
|
|
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|