![Henry Orosco](/assets/img/avatar_default.png)
Some resources are incorrectly organized and at odds with HW capabilities. Specifically, ILQ, IEQ, QPs, MSS, QOS and statistics belong in a VSI. Signed-off-by: Faisal Latif <faisal.latif@intel.com> Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com> Signed-off-by: Henry Orosco <henry.orosco@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
595 lines
16 KiB
C
595 lines
16 KiB
C
/*******************************************************************************
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*
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* Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenFabrics.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*******************************************************************************/
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#ifndef I40IW_IW_H
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#define I40IW_IW_H
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#include <linux/netdevice.h>
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#include <linux/inetdevice.h>
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#include <linux/spinlock.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/workqueue.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/crc32c.h>
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#include <rdma/ib_smi.h>
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#include <rdma/ib_verbs.h>
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#include <rdma/ib_pack.h>
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#include <rdma/rdma_cm.h>
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#include <rdma/iw_cm.h>
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#include <crypto/hash.h>
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#include "i40iw_status.h"
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#include "i40iw_osdep.h"
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#include "i40iw_d.h"
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#include "i40iw_hmc.h"
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#include <i40e_client.h>
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#include "i40iw_type.h"
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#include "i40iw_p.h"
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#include "i40iw_ucontext.h"
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#include "i40iw_pble.h"
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#include "i40iw_verbs.h"
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#include "i40iw_cm.h"
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#include "i40iw_user.h"
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#include "i40iw_puda.h"
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#define I40IW_FW_VERSION 2
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#define I40IW_HW_VERSION 2
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#define I40IW_ARP_ADD 1
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#define I40IW_ARP_DELETE 2
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#define I40IW_ARP_RESOLVE 3
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#define I40IW_MACIP_ADD 1
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#define I40IW_MACIP_DELETE 2
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#define IW_CCQ_SIZE (I40IW_CQP_SW_SQSIZE_2048 + 1)
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#define IW_CEQ_SIZE 2048
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#define IW_AEQ_SIZE 2048
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#define RX_BUF_SIZE (1536 + 8)
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#define IW_REG0_SIZE (4 * 1024)
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#define IW_TX_TIMEOUT (6 * HZ)
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#define IW_FIRST_QPN 1
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#define IW_SW_CONTEXT_ALIGN 1024
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#define MAX_DPC_ITERATIONS 128
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#define I40IW_EVENT_TIMEOUT 100000
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#define I40IW_VCHNL_EVENT_TIMEOUT 100000
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#define I40IW_NO_VLAN 0xffff
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#define I40IW_NO_QSET 0xffff
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/* access to mcast filter list */
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#define IW_ADD_MCAST false
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#define IW_DEL_MCAST true
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#define I40IW_DRV_OPT_ENABLE_MPA_VER_0 0x00000001
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#define I40IW_DRV_OPT_DISABLE_MPA_CRC 0x00000002
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#define I40IW_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
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#define I40IW_DRV_OPT_DISABLE_INTF 0x00000008
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#define I40IW_DRV_OPT_ENABLE_MSI 0x00000010
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#define I40IW_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
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#define I40IW_DRV_OPT_NO_INLINE_DATA 0x00000080
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#define I40IW_DRV_OPT_DISABLE_INT_MOD 0x00000100
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#define I40IW_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
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#define I40IW_DRV_OPT_ENABLE_PAU 0x00000400
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#define I40IW_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
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#define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
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#define IW_CFG_FPM_QP_COUNT 32768
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#define I40IW_MAX_PAGES_PER_FMR 512
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#define I40IW_MIN_PAGES_PER_FMR 1
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#define I40IW_CQP_COMPL_RQ_WQE_FLUSHED 2
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#define I40IW_CQP_COMPL_SQ_WQE_FLUSHED 3
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#define I40IW_CQP_COMPL_RQ_SQ_WQE_FLUSHED 4
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#define I40IW_MTU_TO_MSS 40
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#define I40IW_DEFAULT_MSS 1460
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struct i40iw_cqp_compl_info {
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u32 op_ret_val;
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u16 maj_err_code;
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u16 min_err_code;
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bool error;
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u8 op_code;
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};
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#define i40iw_pr_err(fmt, args ...) pr_err("%s: "fmt, __func__, ## args)
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#define i40iw_pr_info(fmt, args ...) pr_info("%s: " fmt, __func__, ## args)
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#define i40iw_pr_warn(fmt, args ...) pr_warn("%s: " fmt, __func__, ## args)
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struct i40iw_cqp_request {
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struct cqp_commands_info info;
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wait_queue_head_t waitq;
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struct list_head list;
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atomic_t refcount;
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void (*callback_fcn)(struct i40iw_cqp_request*, u32);
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void *param;
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struct i40iw_cqp_compl_info compl_info;
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bool waiting;
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bool request_done;
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bool dynamic;
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};
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struct i40iw_cqp {
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struct i40iw_sc_cqp sc_cqp;
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spinlock_t req_lock; /*cqp request list */
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wait_queue_head_t waitq;
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struct i40iw_dma_mem sq;
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struct i40iw_dma_mem host_ctx;
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u64 *scratch_array;
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struct i40iw_cqp_request *cqp_requests;
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struct list_head cqp_avail_reqs;
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struct list_head cqp_pending_reqs;
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};
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struct i40iw_device;
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struct i40iw_ccq {
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struct i40iw_sc_cq sc_cq;
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spinlock_t lock; /* ccq control */
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wait_queue_head_t waitq;
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struct i40iw_dma_mem mem_cq;
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struct i40iw_dma_mem shadow_area;
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};
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struct i40iw_ceq {
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struct i40iw_sc_ceq sc_ceq;
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struct i40iw_dma_mem mem;
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u32 irq;
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u32 msix_idx;
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struct i40iw_device *iwdev;
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struct tasklet_struct dpc_tasklet;
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};
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struct i40iw_aeq {
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struct i40iw_sc_aeq sc_aeq;
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struct i40iw_dma_mem mem;
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};
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struct i40iw_arp_entry {
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u32 ip_addr[4];
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u8 mac_addr[ETH_ALEN];
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};
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enum init_completion_state {
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INVALID_STATE = 0,
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INITIAL_STATE,
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CQP_CREATED,
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HMC_OBJS_CREATED,
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PBLE_CHUNK_MEM,
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CCQ_CREATED,
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AEQ_CREATED,
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CEQ_CREATED,
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ILQ_CREATED,
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IEQ_CREATED,
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INET_NOTIFIER,
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IP_ADDR_REGISTERED,
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RDMA_DEV_REGISTERED
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};
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struct i40iw_msix_vector {
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u32 idx;
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u32 irq;
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u32 cpu_affinity;
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u32 ceq_id;
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};
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struct l2params_work {
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struct work_struct work;
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struct i40iw_device *iwdev;
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struct i40iw_l2params l2params;
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};
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#define I40IW_MSIX_TABLE_SIZE 65
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struct virtchnl_work {
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struct work_struct work;
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union {
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struct i40iw_cqp_request *cqp_request;
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struct i40iw_virtchnl_work_info work_info;
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};
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};
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struct i40e_qvlist_info;
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struct i40iw_device {
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struct i40iw_ib_device *iwibdev;
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struct net_device *netdev;
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wait_queue_head_t vchnl_waitq;
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struct i40iw_sc_dev sc_dev;
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struct i40iw_sc_vsi vsi;
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struct i40iw_handler *hdl;
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struct i40e_info *ldev;
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struct i40e_client *client;
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struct i40iw_hw hw;
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struct i40iw_cm_core cm_core;
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u8 *mem_resources;
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unsigned long *allocated_qps;
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unsigned long *allocated_cqs;
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unsigned long *allocated_mrs;
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unsigned long *allocated_pds;
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unsigned long *allocated_arps;
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struct i40iw_qp **qp_table;
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bool msix_shared;
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u32 msix_count;
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struct i40iw_msix_vector *iw_msixtbl;
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struct i40e_qvlist_info *iw_qvlist;
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struct i40iw_hmc_pble_rsrc *pble_rsrc;
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struct i40iw_arp_entry *arp_table;
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struct i40iw_cqp cqp;
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struct i40iw_ccq ccq;
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u32 ceqs_count;
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struct i40iw_ceq *ceqlist;
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struct i40iw_aeq aeq;
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u32 arp_table_size;
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u32 next_arp_index;
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spinlock_t resource_lock; /* hw resource access */
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spinlock_t qptable_lock;
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u32 vendor_id;
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u32 vendor_part_id;
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u32 of_device_registered;
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u32 device_cap_flags;
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unsigned long db_start;
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u8 resource_profile;
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u8 max_rdma_vfs;
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u8 max_enabled_vfs;
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u8 max_sge;
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u8 iw_status;
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u8 send_term_ok;
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bool push_mode; /* Initialized from parameter passed to driver */
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/* x710 specific */
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struct mutex pbl_mutex;
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struct tasklet_struct dpc_tasklet;
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struct workqueue_struct *virtchnl_wq;
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struct virtchnl_work virtchnl_w[I40IW_MAX_PE_ENABLED_VF_COUNT];
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struct i40iw_dma_mem obj_mem;
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struct i40iw_dma_mem obj_next;
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u8 *hmc_info_mem;
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u32 sd_type;
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struct workqueue_struct *param_wq;
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atomic_t params_busy;
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enum init_completion_state init_state;
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u16 mac_ip_table_idx;
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atomic_t vchnl_msgs;
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u32 max_mr;
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u32 max_qp;
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u32 max_cq;
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u32 max_pd;
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u32 next_qp;
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u32 next_cq;
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u32 next_pd;
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u32 max_mr_size;
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u32 max_qp_wr;
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u32 max_cqe;
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u32 mr_stagmask;
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u32 mpa_version;
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bool dcb;
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bool closing;
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bool reset;
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u32 used_pds;
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u32 used_cqs;
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u32 used_mrs;
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u32 used_qps;
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wait_queue_head_t close_wq;
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atomic64_t use_count;
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};
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struct i40iw_ib_device {
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struct ib_device ibdev;
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struct i40iw_device *iwdev;
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};
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struct i40iw_handler {
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struct list_head list;
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struct i40e_client *client;
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struct i40iw_device device;
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struct i40e_info ldev;
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};
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/**
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* to_iwdev - get device
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* @ibdev: ib device
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**/
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static inline struct i40iw_device *to_iwdev(struct ib_device *ibdev)
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{
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return container_of(ibdev, struct i40iw_ib_device, ibdev)->iwdev;
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}
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/**
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* to_ucontext - get user context
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* @ibucontext: ib user context
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**/
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static inline struct i40iw_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
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{
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return container_of(ibucontext, struct i40iw_ucontext, ibucontext);
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}
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/**
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* to_iwpd - get protection domain
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* @ibpd: ib pd
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**/
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static inline struct i40iw_pd *to_iwpd(struct ib_pd *ibpd)
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{
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return container_of(ibpd, struct i40iw_pd, ibpd);
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}
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/**
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* to_iwmr - get device memory region
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* @ibdev: ib memory region
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**/
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static inline struct i40iw_mr *to_iwmr(struct ib_mr *ibmr)
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{
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return container_of(ibmr, struct i40iw_mr, ibmr);
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}
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/**
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* to_iwmr_from_ibfmr - get device memory region
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* @ibfmr: ib fmr
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**/
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static inline struct i40iw_mr *to_iwmr_from_ibfmr(struct ib_fmr *ibfmr)
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{
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return container_of(ibfmr, struct i40iw_mr, ibfmr);
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}
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/**
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* to_iwmw - get device memory window
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* @ibmw: ib memory window
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**/
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static inline struct i40iw_mr *to_iwmw(struct ib_mw *ibmw)
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{
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return container_of(ibmw, struct i40iw_mr, ibmw);
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}
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/**
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* to_iwcq - get completion queue
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* @ibcq: ib cqdevice
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**/
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static inline struct i40iw_cq *to_iwcq(struct ib_cq *ibcq)
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{
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return container_of(ibcq, struct i40iw_cq, ibcq);
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}
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/**
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* to_iwqp - get device qp
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* @ibqp: ib qp
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**/
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static inline struct i40iw_qp *to_iwqp(struct ib_qp *ibqp)
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{
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return container_of(ibqp, struct i40iw_qp, ibqp);
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}
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/* i40iw.c */
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void i40iw_add_ref(struct ib_qp *);
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void i40iw_rem_ref(struct ib_qp *);
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struct ib_qp *i40iw_get_qp(struct ib_device *, int);
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void i40iw_flush_wqes(struct i40iw_device *iwdev,
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struct i40iw_qp *qp);
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void i40iw_manage_arp_cache(struct i40iw_device *iwdev,
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unsigned char *mac_addr,
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u32 *ip_addr,
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bool ipv4,
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u32 action);
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int i40iw_manage_apbvt(struct i40iw_device *iwdev,
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u16 accel_local_port,
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bool add_port);
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struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait);
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void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
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void i40iw_put_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
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/**
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* i40iw_alloc_resource - allocate a resource
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* @iwdev: device pointer
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* @resource_array: resource bit array:
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* @max_resources: maximum resource number
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* @req_resources_num: Allocated resource number
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* @next: next free id
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**/
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static inline int i40iw_alloc_resource(struct i40iw_device *iwdev,
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unsigned long *resource_array,
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u32 max_resources,
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u32 *req_resource_num,
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u32 *next)
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{
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u32 resource_num;
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unsigned long flags;
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spin_lock_irqsave(&iwdev->resource_lock, flags);
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resource_num = find_next_zero_bit(resource_array, max_resources, *next);
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if (resource_num >= max_resources) {
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resource_num = find_first_zero_bit(resource_array, max_resources);
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if (resource_num >= max_resources) {
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spin_unlock_irqrestore(&iwdev->resource_lock, flags);
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return -EOVERFLOW;
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}
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}
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set_bit(resource_num, resource_array);
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*next = resource_num + 1;
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if (*next == max_resources)
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*next = 0;
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*req_resource_num = resource_num;
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spin_unlock_irqrestore(&iwdev->resource_lock, flags);
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return 0;
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}
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/**
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* i40iw_is_resource_allocated - detrmine if resource is
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* allocated
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* @iwdev: device pointer
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* @resource_array: resource array for the resource_num
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* @resource_num: resource number to check
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**/
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static inline bool i40iw_is_resource_allocated(struct i40iw_device *iwdev,
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unsigned long *resource_array,
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u32 resource_num)
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{
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bool bit_is_set;
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unsigned long flags;
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spin_lock_irqsave(&iwdev->resource_lock, flags);
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bit_is_set = test_bit(resource_num, resource_array);
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spin_unlock_irqrestore(&iwdev->resource_lock, flags);
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return bit_is_set;
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}
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/**
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* i40iw_free_resource - free a resource
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* @iwdev: device pointer
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* @resource_array: resource array for the resource_num
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* @resource_num: resource number to free
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**/
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static inline void i40iw_free_resource(struct i40iw_device *iwdev,
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unsigned long *resource_array,
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u32 resource_num)
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{
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unsigned long flags;
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spin_lock_irqsave(&iwdev->resource_lock, flags);
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clear_bit(resource_num, resource_array);
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spin_unlock_irqrestore(&iwdev->resource_lock, flags);
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}
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/**
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* to_iwhdl - Get the handler from the device pointer
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* @iwdev: device pointer
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**/
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static inline struct i40iw_handler *to_iwhdl(struct i40iw_device *iw_dev)
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{
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return container_of(iw_dev, struct i40iw_handler, device);
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}
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struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev);
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/**
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* iw_init_resources -
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*/
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u32 i40iw_initialize_hw_resources(struct i40iw_device *iwdev);
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int i40iw_register_rdma_device(struct i40iw_device *iwdev);
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void i40iw_port_ibevent(struct i40iw_device *iwdev);
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void i40iw_cm_disconn(struct i40iw_qp *iwqp);
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void i40iw_cm_disconn_worker(void *);
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int mini_cm_recv_pkt(struct i40iw_cm_core *, struct i40iw_device *,
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struct sk_buff *);
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|
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enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
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struct i40iw_cqp_request *cqp_request);
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enum i40iw_status_code i40iw_add_mac_addr(struct i40iw_device *iwdev,
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u8 *mac_addr, u8 *mac_index);
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int i40iw_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
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void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq);
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|
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void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev);
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void i40iw_add_pdusecount(struct i40iw_pd *iwpd);
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void i40iw_rem_devusecount(struct i40iw_device *iwdev);
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void i40iw_add_devusecount(struct i40iw_device *iwdev);
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void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
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struct i40iw_modify_qp_info *info, bool wait);
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|
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|
void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev,
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|
struct i40iw_sc_qp *qp,
|
|
bool suspend);
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|
enum i40iw_status_code i40iw_manage_qhash(struct i40iw_device *iwdev,
|
|
struct i40iw_cm_info *cminfo,
|
|
enum i40iw_quad_entry_type etype,
|
|
enum i40iw_quad_hash_manage_type mtype,
|
|
void *cmnode,
|
|
bool wait);
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|
void i40iw_receive_ilq(struct i40iw_sc_vsi *vsi, struct i40iw_puda_buf *rbuf);
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|
void i40iw_free_sqbuf(struct i40iw_sc_vsi *vsi, void *bufp);
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void i40iw_free_qp_resources(struct i40iw_device *iwdev,
|
|
struct i40iw_qp *iwqp,
|
|
u32 qp_num);
|
|
enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
|
|
struct i40iw_dma_mem *memptr,
|
|
u32 size, u32 mask);
|
|
|
|
void i40iw_request_reset(struct i40iw_device *iwdev);
|
|
void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev);
|
|
void i40iw_setup_cm_core(struct i40iw_device *iwdev);
|
|
void i40iw_cleanup_cm_core(struct i40iw_cm_core *cm_core);
|
|
void i40iw_process_ceq(struct i40iw_device *, struct i40iw_ceq *iwceq);
|
|
void i40iw_process_aeq(struct i40iw_device *);
|
|
void i40iw_next_iw_state(struct i40iw_qp *iwqp,
|
|
u8 state, u8 del_hash,
|
|
u8 term, u8 term_len);
|
|
int i40iw_send_syn(struct i40iw_cm_node *cm_node, u32 sendack);
|
|
struct i40iw_cm_node *i40iw_find_node(struct i40iw_cm_core *cm_core,
|
|
u16 rem_port,
|
|
u32 *rem_addr,
|
|
u16 loc_port,
|
|
u32 *loc_addr,
|
|
bool add_refcnt);
|
|
|
|
enum i40iw_status_code i40iw_hw_flush_wqes(struct i40iw_device *iwdev,
|
|
struct i40iw_sc_qp *qp,
|
|
struct i40iw_qp_flush_info *info,
|
|
bool wait);
|
|
|
|
void i40iw_copy_ip_ntohl(u32 *dst, __be32 *src);
|
|
struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *ib_pd,
|
|
u64 addr,
|
|
u64 size,
|
|
int acc,
|
|
u64 *iova_start);
|
|
|
|
int i40iw_inetaddr_event(struct notifier_block *notifier,
|
|
unsigned long event,
|
|
void *ptr);
|
|
int i40iw_inet6addr_event(struct notifier_block *notifier,
|
|
unsigned long event,
|
|
void *ptr);
|
|
int i40iw_net_event(struct notifier_block *notifier,
|
|
unsigned long event,
|
|
void *ptr);
|
|
|
|
#endif
|