![Adit Ranadive](/assets/img/avatar_default.png)
This patch series adds a driver for a paravirtual RDMA device. The device is developed for VMware's Virtual Machines and allows existing RDMA applications to continue to use existing Verbs API when deployed in VMs on ESXi. We recently did a presentation in the OFA Workshop [1] regarding this device. Description and RDMA Support ============================ The virtual device is exposed as a dual function PCIe device. One part is a virtual network device (VMXNet3) which provides networking properties like MAC, IP addresses to the RDMA part of the device. The networking properties are used to register GIDs required by RDMA applications to communicate. These patches add support and the all required infrastructure for letting applications use such a device. We support the mandatory Verbs API as well as the base memory management extensions (Local Inv, Send with Inv and Fast Register Work Requests). We currently support both Reliable Connected and Unreliable Datagram QPs but do not support Shared Receive Queues (SRQs). Also, we support the following types of Work Requests: o Send/Receive (with or without Immediate Data) o RDMA Write (with or without Immediate Data) o RDMA Read o Local Invalidate o Send with Invalidate o Fast Register Work Requests This version only adds support for version 1 of RoCE. We will add RoCEv2 support in a future patch. We do support registration of both MAC-based and IP-based GIDs. I have also created a git tree for our user-level driver [2]. Testing ======= We have tested this internally for various types of Guest OS - Red Hat, Centos, Ubuntu 12.04/14.04/16.04, Oracle Enterprise Linux, SLES 12 using backported versions of this driver. The tests included several runs of the performance tests (included with OFED), Intel MPI PingPong benchmark on OpenMPI, krping for FRWRs. Mellanox has been kind enough to test the backported version of the driver internally on their hardware using a VMware provided ESX build. I have also applied and tested this with Doug's k.o/for-4.9 branch (commit 5603910b). Note, that this patch series should be applied all together. I split out the commits so that it may be easier to review. PVRDMA Resources ================ [1] OFA Workshop Presentation - https://openfabrics.org/images/eventpresos/2016presentations/102parardma.pdf [2] Libpvrdma User-level library - http://git.openfabrics.org/?p=~aditr/libpvrdma.git;a=summary Reviewed-by: Jorgen Hansen <jhansen@vmware.com> Reviewed-by: George Zhang <georgezhang@vmware.com> Reviewed-by: Aditya Sarwade <asarwade@vmware.com> Reviewed-by: Bryan Tan <bryantan@vmware.com> Reviewed-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Adit Ranadive <aditr@vmware.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
437 lines
12 KiB
C
437 lines
12 KiB
C
/*
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* Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of EITHER the GNU General Public License
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* version 2 as published by the Free Software Foundation or the BSD
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* 2-Clause License. This program is distributed in the hope that it
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* will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
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* WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License version 2 for more details at
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program available in the file COPYING in the main
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* directory of this source tree.
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*
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* The BSD 2-Clause License
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PVRDMA_VERBS_H__
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#define __PVRDMA_VERBS_H__
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#include <linux/types.h>
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union pvrdma_gid {
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u8 raw[16];
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struct {
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__be64 subnet_prefix;
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__be64 interface_id;
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} global;
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};
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enum pvrdma_link_layer {
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PVRDMA_LINK_LAYER_UNSPECIFIED,
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PVRDMA_LINK_LAYER_INFINIBAND,
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PVRDMA_LINK_LAYER_ETHERNET,
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};
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enum pvrdma_mtu {
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PVRDMA_MTU_256 = 1,
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PVRDMA_MTU_512 = 2,
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PVRDMA_MTU_1024 = 3,
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PVRDMA_MTU_2048 = 4,
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PVRDMA_MTU_4096 = 5,
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};
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static inline int pvrdma_mtu_enum_to_int(enum pvrdma_mtu mtu)
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{
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switch (mtu) {
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case PVRDMA_MTU_256: return 256;
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case PVRDMA_MTU_512: return 512;
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case PVRDMA_MTU_1024: return 1024;
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case PVRDMA_MTU_2048: return 2048;
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case PVRDMA_MTU_4096: return 4096;
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default: return -1;
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}
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}
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static inline enum pvrdma_mtu pvrdma_mtu_int_to_enum(int mtu)
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{
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switch (mtu) {
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case 256: return PVRDMA_MTU_256;
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case 512: return PVRDMA_MTU_512;
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case 1024: return PVRDMA_MTU_1024;
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case 2048: return PVRDMA_MTU_2048;
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case 4096:
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default: return PVRDMA_MTU_4096;
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}
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}
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enum pvrdma_port_state {
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PVRDMA_PORT_NOP = 0,
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PVRDMA_PORT_DOWN = 1,
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PVRDMA_PORT_INIT = 2,
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PVRDMA_PORT_ARMED = 3,
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PVRDMA_PORT_ACTIVE = 4,
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PVRDMA_PORT_ACTIVE_DEFER = 5,
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};
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enum pvrdma_port_cap_flags {
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PVRDMA_PORT_SM = 1 << 1,
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PVRDMA_PORT_NOTICE_SUP = 1 << 2,
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PVRDMA_PORT_TRAP_SUP = 1 << 3,
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PVRDMA_PORT_OPT_IPD_SUP = 1 << 4,
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PVRDMA_PORT_AUTO_MIGR_SUP = 1 << 5,
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PVRDMA_PORT_SL_MAP_SUP = 1 << 6,
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PVRDMA_PORT_MKEY_NVRAM = 1 << 7,
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PVRDMA_PORT_PKEY_NVRAM = 1 << 8,
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PVRDMA_PORT_LED_INFO_SUP = 1 << 9,
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PVRDMA_PORT_SM_DISABLED = 1 << 10,
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PVRDMA_PORT_SYS_IMAGE_GUID_SUP = 1 << 11,
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PVRDMA_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12,
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PVRDMA_PORT_EXTENDED_SPEEDS_SUP = 1 << 14,
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PVRDMA_PORT_CM_SUP = 1 << 16,
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PVRDMA_PORT_SNMP_TUNNEL_SUP = 1 << 17,
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PVRDMA_PORT_REINIT_SUP = 1 << 18,
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PVRDMA_PORT_DEVICE_MGMT_SUP = 1 << 19,
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PVRDMA_PORT_VENDOR_CLASS_SUP = 1 << 20,
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PVRDMA_PORT_DR_NOTICE_SUP = 1 << 21,
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PVRDMA_PORT_CAP_MASK_NOTICE_SUP = 1 << 22,
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PVRDMA_PORT_BOOT_MGMT_SUP = 1 << 23,
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PVRDMA_PORT_LINK_LATENCY_SUP = 1 << 24,
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PVRDMA_PORT_CLIENT_REG_SUP = 1 << 25,
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PVRDMA_PORT_IP_BASED_GIDS = 1 << 26,
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PVRDMA_PORT_CAP_FLAGS_MAX = PVRDMA_PORT_IP_BASED_GIDS,
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};
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enum pvrdma_port_width {
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PVRDMA_WIDTH_1X = 1,
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PVRDMA_WIDTH_4X = 2,
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PVRDMA_WIDTH_8X = 4,
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PVRDMA_WIDTH_12X = 8,
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};
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static inline int pvrdma_width_enum_to_int(enum pvrdma_port_width width)
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{
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switch (width) {
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case PVRDMA_WIDTH_1X: return 1;
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case PVRDMA_WIDTH_4X: return 4;
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case PVRDMA_WIDTH_8X: return 8;
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case PVRDMA_WIDTH_12X: return 12;
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default: return -1;
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}
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}
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enum pvrdma_port_speed {
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PVRDMA_SPEED_SDR = 1,
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PVRDMA_SPEED_DDR = 2,
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PVRDMA_SPEED_QDR = 4,
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PVRDMA_SPEED_FDR10 = 8,
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PVRDMA_SPEED_FDR = 16,
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PVRDMA_SPEED_EDR = 32,
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};
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struct pvrdma_port_attr {
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enum pvrdma_port_state state;
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enum pvrdma_mtu max_mtu;
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enum pvrdma_mtu active_mtu;
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u32 gid_tbl_len;
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u32 port_cap_flags;
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u32 max_msg_sz;
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u32 bad_pkey_cntr;
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u32 qkey_viol_cntr;
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u16 pkey_tbl_len;
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u16 lid;
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u16 sm_lid;
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u8 lmc;
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u8 max_vl_num;
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u8 sm_sl;
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u8 subnet_timeout;
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u8 init_type_reply;
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u8 active_width;
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u8 active_speed;
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u8 phys_state;
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u8 reserved[2];
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};
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struct pvrdma_global_route {
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union pvrdma_gid dgid;
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u32 flow_label;
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u8 sgid_index;
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u8 hop_limit;
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u8 traffic_class;
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u8 reserved;
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};
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struct pvrdma_grh {
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__be32 version_tclass_flow;
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__be16 paylen;
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u8 next_hdr;
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u8 hop_limit;
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union pvrdma_gid sgid;
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union pvrdma_gid dgid;
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};
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enum pvrdma_ah_flags {
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PVRDMA_AH_GRH = 1,
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};
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enum pvrdma_rate {
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PVRDMA_RATE_PORT_CURRENT = 0,
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PVRDMA_RATE_2_5_GBPS = 2,
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PVRDMA_RATE_5_GBPS = 5,
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PVRDMA_RATE_10_GBPS = 3,
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PVRDMA_RATE_20_GBPS = 6,
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PVRDMA_RATE_30_GBPS = 4,
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PVRDMA_RATE_40_GBPS = 7,
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PVRDMA_RATE_60_GBPS = 8,
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PVRDMA_RATE_80_GBPS = 9,
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PVRDMA_RATE_120_GBPS = 10,
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PVRDMA_RATE_14_GBPS = 11,
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PVRDMA_RATE_56_GBPS = 12,
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PVRDMA_RATE_112_GBPS = 13,
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PVRDMA_RATE_168_GBPS = 14,
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PVRDMA_RATE_25_GBPS = 15,
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PVRDMA_RATE_100_GBPS = 16,
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PVRDMA_RATE_200_GBPS = 17,
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PVRDMA_RATE_300_GBPS = 18,
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};
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struct pvrdma_ah_attr {
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struct pvrdma_global_route grh;
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u16 dlid;
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u16 vlan_id;
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u8 sl;
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u8 src_path_bits;
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u8 static_rate;
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u8 ah_flags;
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u8 port_num;
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u8 dmac[6];
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u8 reserved;
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};
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enum pvrdma_cq_notify_flags {
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PVRDMA_CQ_SOLICITED = 1 << 0,
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PVRDMA_CQ_NEXT_COMP = 1 << 1,
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PVRDMA_CQ_SOLICITED_MASK = PVRDMA_CQ_SOLICITED |
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PVRDMA_CQ_NEXT_COMP,
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PVRDMA_CQ_REPORT_MISSED_EVENTS = 1 << 2,
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};
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struct pvrdma_qp_cap {
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u32 max_send_wr;
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u32 max_recv_wr;
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u32 max_send_sge;
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u32 max_recv_sge;
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u32 max_inline_data;
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u32 reserved;
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};
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enum pvrdma_sig_type {
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PVRDMA_SIGNAL_ALL_WR,
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PVRDMA_SIGNAL_REQ_WR,
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};
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enum pvrdma_qp_type {
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PVRDMA_QPT_SMI,
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PVRDMA_QPT_GSI,
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PVRDMA_QPT_RC,
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PVRDMA_QPT_UC,
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PVRDMA_QPT_UD,
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PVRDMA_QPT_RAW_IPV6,
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PVRDMA_QPT_RAW_ETHERTYPE,
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PVRDMA_QPT_RAW_PACKET = 8,
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PVRDMA_QPT_XRC_INI = 9,
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PVRDMA_QPT_XRC_TGT,
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PVRDMA_QPT_MAX,
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};
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enum pvrdma_qp_create_flags {
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PVRDMA_QP_CREATE_IPOPVRDMA_UD_LSO = 1 << 0,
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PVRDMA_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1,
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};
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enum pvrdma_qp_attr_mask {
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PVRDMA_QP_STATE = 1 << 0,
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PVRDMA_QP_CUR_STATE = 1 << 1,
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PVRDMA_QP_EN_SQD_ASYNC_NOTIFY = 1 << 2,
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PVRDMA_QP_ACCESS_FLAGS = 1 << 3,
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PVRDMA_QP_PKEY_INDEX = 1 << 4,
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PVRDMA_QP_PORT = 1 << 5,
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PVRDMA_QP_QKEY = 1 << 6,
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PVRDMA_QP_AV = 1 << 7,
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PVRDMA_QP_PATH_MTU = 1 << 8,
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PVRDMA_QP_TIMEOUT = 1 << 9,
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PVRDMA_QP_RETRY_CNT = 1 << 10,
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PVRDMA_QP_RNR_RETRY = 1 << 11,
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PVRDMA_QP_RQ_PSN = 1 << 12,
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PVRDMA_QP_MAX_QP_RD_ATOMIC = 1 << 13,
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PVRDMA_QP_ALT_PATH = 1 << 14,
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PVRDMA_QP_MIN_RNR_TIMER = 1 << 15,
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PVRDMA_QP_SQ_PSN = 1 << 16,
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PVRDMA_QP_MAX_DEST_RD_ATOMIC = 1 << 17,
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PVRDMA_QP_PATH_MIG_STATE = 1 << 18,
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PVRDMA_QP_CAP = 1 << 19,
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PVRDMA_QP_DEST_QPN = 1 << 20,
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PVRDMA_QP_ATTR_MASK_MAX = PVRDMA_QP_DEST_QPN,
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};
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enum pvrdma_qp_state {
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PVRDMA_QPS_RESET,
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PVRDMA_QPS_INIT,
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PVRDMA_QPS_RTR,
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PVRDMA_QPS_RTS,
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PVRDMA_QPS_SQD,
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PVRDMA_QPS_SQE,
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PVRDMA_QPS_ERR,
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};
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enum pvrdma_mig_state {
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PVRDMA_MIG_MIGRATED,
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PVRDMA_MIG_REARM,
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PVRDMA_MIG_ARMED,
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};
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enum pvrdma_mw_type {
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PVRDMA_MW_TYPE_1 = 1,
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PVRDMA_MW_TYPE_2 = 2,
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};
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struct pvrdma_qp_attr {
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enum pvrdma_qp_state qp_state;
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enum pvrdma_qp_state cur_qp_state;
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enum pvrdma_mtu path_mtu;
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enum pvrdma_mig_state path_mig_state;
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u32 qkey;
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u32 rq_psn;
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u32 sq_psn;
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u32 dest_qp_num;
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u32 qp_access_flags;
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u16 pkey_index;
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u16 alt_pkey_index;
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u8 en_sqd_async_notify;
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u8 sq_draining;
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u8 max_rd_atomic;
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u8 max_dest_rd_atomic;
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u8 min_rnr_timer;
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u8 port_num;
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u8 timeout;
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u8 retry_cnt;
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u8 rnr_retry;
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u8 alt_port_num;
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u8 alt_timeout;
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u8 reserved[5];
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struct pvrdma_qp_cap cap;
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struct pvrdma_ah_attr ah_attr;
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struct pvrdma_ah_attr alt_ah_attr;
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};
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enum pvrdma_send_flags {
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PVRDMA_SEND_FENCE = 1 << 0,
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PVRDMA_SEND_SIGNALED = 1 << 1,
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PVRDMA_SEND_SOLICITED = 1 << 2,
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PVRDMA_SEND_INLINE = 1 << 3,
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PVRDMA_SEND_IP_CSUM = 1 << 4,
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PVRDMA_SEND_FLAGS_MAX = PVRDMA_SEND_IP_CSUM,
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};
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enum pvrdma_access_flags {
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PVRDMA_ACCESS_LOCAL_WRITE = 1 << 0,
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PVRDMA_ACCESS_REMOTE_WRITE = 1 << 1,
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PVRDMA_ACCESS_REMOTE_READ = 1 << 2,
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PVRDMA_ACCESS_REMOTE_ATOMIC = 1 << 3,
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PVRDMA_ACCESS_MW_BIND = 1 << 4,
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PVRDMA_ZERO_BASED = 1 << 5,
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PVRDMA_ACCESS_ON_DEMAND = 1 << 6,
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PVRDMA_ACCESS_FLAGS_MAX = PVRDMA_ACCESS_ON_DEMAND,
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};
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int pvrdma_query_device(struct ib_device *ibdev,
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struct ib_device_attr *props,
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struct ib_udata *udata);
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int pvrdma_query_port(struct ib_device *ibdev, u8 port,
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struct ib_port_attr *props);
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int pvrdma_query_gid(struct ib_device *ibdev, u8 port,
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int index, union ib_gid *gid);
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int pvrdma_query_pkey(struct ib_device *ibdev, u8 port,
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u16 index, u16 *pkey);
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enum rdma_link_layer pvrdma_port_link_layer(struct ib_device *ibdev,
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u8 port);
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int pvrdma_modify_device(struct ib_device *ibdev, int mask,
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struct ib_device_modify *props);
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int pvrdma_modify_port(struct ib_device *ibdev, u8 port,
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int mask, struct ib_port_modify *props);
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int pvrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma);
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struct ib_ucontext *pvrdma_alloc_ucontext(struct ib_device *ibdev,
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struct ib_udata *udata);
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int pvrdma_dealloc_ucontext(struct ib_ucontext *context);
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struct ib_pd *pvrdma_alloc_pd(struct ib_device *ibdev,
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struct ib_ucontext *context,
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struct ib_udata *udata);
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int pvrdma_dealloc_pd(struct ib_pd *ibpd);
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struct ib_mr *pvrdma_get_dma_mr(struct ib_pd *pd, int acc);
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struct ib_mr *pvrdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
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u64 virt_addr, int access_flags,
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struct ib_udata *udata);
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int pvrdma_dereg_mr(struct ib_mr *mr);
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struct ib_mr *pvrdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
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u32 max_num_sg);
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int pvrdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
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int sg_nents, unsigned int *sg_offset);
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int pvrdma_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
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int pvrdma_resize_cq(struct ib_cq *ibcq, int entries,
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struct ib_udata *udata);
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struct ib_cq *pvrdma_create_cq(struct ib_device *ibdev,
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const struct ib_cq_init_attr *attr,
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struct ib_ucontext *context,
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struct ib_udata *udata);
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int pvrdma_resize_cq(struct ib_cq *ibcq, int entries,
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struct ib_udata *udata);
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int pvrdma_destroy_cq(struct ib_cq *cq);
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int pvrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
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int pvrdma_req_notify_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
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struct ib_ah *pvrdma_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr,
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struct ib_udata *udata);
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int pvrdma_destroy_ah(struct ib_ah *ah);
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struct ib_qp *pvrdma_create_qp(struct ib_pd *pd,
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struct ib_qp_init_attr *init_attr,
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struct ib_udata *udata);
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int pvrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
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int attr_mask, struct ib_udata *udata);
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int pvrdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
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int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr);
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int pvrdma_destroy_qp(struct ib_qp *qp);
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int pvrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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struct ib_send_wr **bad_wr);
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int pvrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
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struct ib_recv_wr **bad_wr);
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#endif /* __PVRDMA_VERBS_H__ */
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