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-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJQDRDNAAoJEI7yEDeUysxlkl8P/3C2AHx2webOU8sVzhfU6ONZ ZoGevwBjyZIeJEmiWVpFTTEew1l0PXtpyOocXGNUXIddVnhXTQOKr/Scj4uFbmx8 ROqgK8NSX9+xOGrBPCoN7SlJkmp+m6uYtwYkl2SGnsEVLWMKkc7J7oqmszCcTQvN UXMf7G47/Ul2NUSBdv4Yvizhl4kpvWxluiweDw3E/hIQKN0uyP7CY58qcAztw8nG csZBAnnuPFwIAWxHXW3eBBv4UP138HbNDqJ/dujjocM6GnOxmXJmcZ6b57gh+Y64 3+w9IR4qrRWnsErb/I8inKLJ1Jdcf7yV2FmxYqR4pIXay2Yzo1BsvFd6EB+JavUv pJpixrFiDDFoQyXlh4tGpsjpqdXNMLqyG4YpqzSZ46C8naVv9gKE7SXqlXnjyDlb Llx3hb9Fop8O5ykYEGHi+gIISAK5eETiQl4yw9RUBDpxydH4qJtqGIbLiDy8y9wi Xyi8PBlNl+biJFsK805lxURqTp/SJTC3+Zb7A7CzYEQm5xZw3W/CKZx1ZYBfpaa/ pWaP6tB7JwgLIVXi4HQayLWqMVwH0soZIn9yazpOEFv6qO8d5QH5RAxAW2VXE3n5 JDlrajar/lGIdiBVWfwTJLb86gv3QDZtIWoR9mZuLKeKWE/6PRLe7HQpG1pJovsm 2AsN5bS0BWq+aqPpZHa5 =pECD -----END PGP SIGNATURE----- Merge tag 'kvm-3.6-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM updates from Avi Kivity: "Highlights include - full big real mode emulation on pre-Westmere Intel hosts (can be disabled with emulate_invalid_guest_state=0) - relatively small ppc and s390 updates - PCID/INVPCID support in guests - EOI avoidance; 3.6 guests should perform better on 3.6 hosts on interrupt intensive workloads) - Lockless write faults during live migration - EPT accessed/dirty bits support for new Intel processors" Fix up conflicts in: - Documentation/virtual/kvm/api.txt: Stupid subchapter numbering, added next to each other. - arch/powerpc/kvm/booke_interrupts.S: PPC asm changes clashing with the KVM fixes - arch/s390/include/asm/sigp.h, arch/s390/kvm/sigp.c: Duplicated commits through the kvm tree and the s390 tree, with subsequent edits in the KVM tree. * tag 'kvm-3.6-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (93 commits) KVM: fix race with level interrupts x86, hyper: fix build with !CONFIG_KVM_GUEST Revert "apic: fix kvm build on UP without IOAPIC" KVM guest: switch to apic_set_eoi_write, apic_write apic: add apic_set_eoi_write for PV use KVM: VMX: Implement PCID/INVPCID for guests with EPT KVM: Add x86_hyper_kvm to complete detect_hypervisor_platform check KVM: PPC: Critical interrupt emulation support KVM: PPC: e500mc: Fix tlbilx emulation for 64-bit guests KVM: PPC64: booke: Set interrupt computation mode for 64-bit host KVM: PPC: bookehv: Add ESR flag to Data Storage Interrupt KVM: PPC: bookehv64: Add support for std/ld emulation. booke: Added crit/mc exception handler for e500v2 booke/bookehv: Add host crit-watchdog exception support KVM: MMU: document mmu-lock and fast page fault KVM: MMU: fix kvm_mmu_pagetable_walk tracepoint KVM: MMU: trace fast page fault KVM: MMU: fast path of handling guest page fault KVM: MMU: introduce SPTE_MMU_WRITEABLE bit KVM: MMU: fold tlb flush judgement into mmu_spte_update ...
790 lines
20 KiB
C
790 lines
20 KiB
C
/*
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* Copyright (C) 2010 SUSE Linux Products GmbH. All rights reserved.
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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*
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* Authors:
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* Alexander Graf <agraf@suse.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/kvm_host.h>
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/kvm_para.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <asm/reg.h>
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#include <asm/sections.h>
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#include <asm/cacheflush.h>
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#include <asm/disassemble.h>
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#include <asm/ppc-opcode.h>
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#include <asm/epapr_hcalls.h>
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#define KVM_MAGIC_PAGE (-4096L)
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#define magic_var(x) KVM_MAGIC_PAGE + offsetof(struct kvm_vcpu_arch_shared, x)
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#define KVM_INST_LWZ 0x80000000
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#define KVM_INST_STW 0x90000000
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#define KVM_INST_LD 0xe8000000
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#define KVM_INST_STD 0xf8000000
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#define KVM_INST_NOP 0x60000000
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#define KVM_INST_B 0x48000000
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#define KVM_INST_B_MASK 0x03ffffff
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#define KVM_INST_B_MAX 0x01ffffff
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#define KVM_INST_LI 0x38000000
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#define KVM_MASK_RT 0x03e00000
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#define KVM_RT_30 0x03c00000
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#define KVM_MASK_RB 0x0000f800
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#define KVM_INST_MFMSR 0x7c0000a6
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#define SPR_FROM 0
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#define SPR_TO 0x100
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#define KVM_INST_SPR(sprn, moveto) (0x7c0002a6 | \
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(((sprn) & 0x1f) << 16) | \
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(((sprn) & 0x3e0) << 6) | \
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(moveto))
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#define KVM_INST_MFSPR(sprn) KVM_INST_SPR(sprn, SPR_FROM)
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#define KVM_INST_MTSPR(sprn) KVM_INST_SPR(sprn, SPR_TO)
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#define KVM_INST_TLBSYNC 0x7c00046c
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#define KVM_INST_MTMSRD_L0 0x7c000164
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#define KVM_INST_MTMSRD_L1 0x7c010164
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#define KVM_INST_MTMSR 0x7c000124
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#define KVM_INST_WRTEE 0x7c000106
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#define KVM_INST_WRTEEI_0 0x7c000146
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#define KVM_INST_WRTEEI_1 0x7c008146
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#define KVM_INST_MTSRIN 0x7c0001e4
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static bool kvm_patching_worked = true;
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static char kvm_tmp[1024 * 1024];
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static int kvm_tmp_index;
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static inline void kvm_patch_ins(u32 *inst, u32 new_inst)
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{
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*inst = new_inst;
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flush_icache_range((ulong)inst, (ulong)inst + 4);
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}
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static void kvm_patch_ins_ll(u32 *inst, long addr, u32 rt)
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{
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#ifdef CONFIG_64BIT
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kvm_patch_ins(inst, KVM_INST_LD | rt | (addr & 0x0000fffc));
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#else
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kvm_patch_ins(inst, KVM_INST_LWZ | rt | (addr & 0x0000fffc));
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#endif
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}
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static void kvm_patch_ins_ld(u32 *inst, long addr, u32 rt)
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{
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#ifdef CONFIG_64BIT
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kvm_patch_ins(inst, KVM_INST_LD | rt | (addr & 0x0000fffc));
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#else
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kvm_patch_ins(inst, KVM_INST_LWZ | rt | ((addr + 4) & 0x0000fffc));
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#endif
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}
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static void kvm_patch_ins_lwz(u32 *inst, long addr, u32 rt)
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{
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kvm_patch_ins(inst, KVM_INST_LWZ | rt | (addr & 0x0000ffff));
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}
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static void kvm_patch_ins_std(u32 *inst, long addr, u32 rt)
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{
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#ifdef CONFIG_64BIT
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kvm_patch_ins(inst, KVM_INST_STD | rt | (addr & 0x0000fffc));
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#else
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kvm_patch_ins(inst, KVM_INST_STW | rt | ((addr + 4) & 0x0000fffc));
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#endif
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}
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static void kvm_patch_ins_stw(u32 *inst, long addr, u32 rt)
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{
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kvm_patch_ins(inst, KVM_INST_STW | rt | (addr & 0x0000fffc));
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}
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static void kvm_patch_ins_nop(u32 *inst)
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{
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kvm_patch_ins(inst, KVM_INST_NOP);
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}
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static void kvm_patch_ins_b(u32 *inst, int addr)
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{
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#if defined(CONFIG_RELOCATABLE) && defined(CONFIG_PPC_BOOK3S)
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/* On relocatable kernels interrupts handlers and our code
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can be in different regions, so we don't patch them */
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if ((ulong)inst < (ulong)&__end_interrupts)
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return;
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#endif
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kvm_patch_ins(inst, KVM_INST_B | (addr & KVM_INST_B_MASK));
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}
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static u32 *kvm_alloc(int len)
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{
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u32 *p;
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if ((kvm_tmp_index + len) > ARRAY_SIZE(kvm_tmp)) {
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printk(KERN_ERR "KVM: No more space (%d + %d)\n",
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kvm_tmp_index, len);
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kvm_patching_worked = false;
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return NULL;
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}
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p = (void*)&kvm_tmp[kvm_tmp_index];
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kvm_tmp_index += len;
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return p;
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}
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extern u32 kvm_emulate_mtmsrd_branch_offs;
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extern u32 kvm_emulate_mtmsrd_reg_offs;
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extern u32 kvm_emulate_mtmsrd_orig_ins_offs;
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extern u32 kvm_emulate_mtmsrd_len;
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extern u32 kvm_emulate_mtmsrd[];
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static void kvm_patch_ins_mtmsrd(u32 *inst, u32 rt)
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{
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u32 *p;
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int distance_start;
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int distance_end;
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ulong next_inst;
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p = kvm_alloc(kvm_emulate_mtmsrd_len * 4);
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if (!p)
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return;
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/* Find out where we are and put everything there */
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distance_start = (ulong)p - (ulong)inst;
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next_inst = ((ulong)inst + 4);
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distance_end = next_inst - (ulong)&p[kvm_emulate_mtmsrd_branch_offs];
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/* Make sure we only write valid b instructions */
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if (distance_start > KVM_INST_B_MAX) {
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kvm_patching_worked = false;
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return;
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}
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/* Modify the chunk to fit the invocation */
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memcpy(p, kvm_emulate_mtmsrd, kvm_emulate_mtmsrd_len * 4);
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p[kvm_emulate_mtmsrd_branch_offs] |= distance_end & KVM_INST_B_MASK;
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switch (get_rt(rt)) {
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case 30:
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kvm_patch_ins_ll(&p[kvm_emulate_mtmsrd_reg_offs],
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magic_var(scratch2), KVM_RT_30);
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break;
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case 31:
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kvm_patch_ins_ll(&p[kvm_emulate_mtmsrd_reg_offs],
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magic_var(scratch1), KVM_RT_30);
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break;
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default:
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p[kvm_emulate_mtmsrd_reg_offs] |= rt;
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break;
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}
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p[kvm_emulate_mtmsrd_orig_ins_offs] = *inst;
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flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsrd_len * 4);
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/* Patch the invocation */
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kvm_patch_ins_b(inst, distance_start);
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}
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extern u32 kvm_emulate_mtmsr_branch_offs;
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extern u32 kvm_emulate_mtmsr_reg1_offs;
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extern u32 kvm_emulate_mtmsr_reg2_offs;
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extern u32 kvm_emulate_mtmsr_orig_ins_offs;
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extern u32 kvm_emulate_mtmsr_len;
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extern u32 kvm_emulate_mtmsr[];
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static void kvm_patch_ins_mtmsr(u32 *inst, u32 rt)
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{
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u32 *p;
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int distance_start;
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int distance_end;
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ulong next_inst;
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p = kvm_alloc(kvm_emulate_mtmsr_len * 4);
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if (!p)
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return;
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/* Find out where we are and put everything there */
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distance_start = (ulong)p - (ulong)inst;
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next_inst = ((ulong)inst + 4);
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distance_end = next_inst - (ulong)&p[kvm_emulate_mtmsr_branch_offs];
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/* Make sure we only write valid b instructions */
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if (distance_start > KVM_INST_B_MAX) {
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kvm_patching_worked = false;
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return;
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}
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/* Modify the chunk to fit the invocation */
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memcpy(p, kvm_emulate_mtmsr, kvm_emulate_mtmsr_len * 4);
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p[kvm_emulate_mtmsr_branch_offs] |= distance_end & KVM_INST_B_MASK;
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/* Make clobbered registers work too */
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switch (get_rt(rt)) {
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case 30:
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kvm_patch_ins_ll(&p[kvm_emulate_mtmsr_reg1_offs],
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magic_var(scratch2), KVM_RT_30);
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kvm_patch_ins_ll(&p[kvm_emulate_mtmsr_reg2_offs],
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magic_var(scratch2), KVM_RT_30);
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break;
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case 31:
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kvm_patch_ins_ll(&p[kvm_emulate_mtmsr_reg1_offs],
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magic_var(scratch1), KVM_RT_30);
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kvm_patch_ins_ll(&p[kvm_emulate_mtmsr_reg2_offs],
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magic_var(scratch1), KVM_RT_30);
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break;
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default:
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p[kvm_emulate_mtmsr_reg1_offs] |= rt;
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p[kvm_emulate_mtmsr_reg2_offs] |= rt;
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break;
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}
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p[kvm_emulate_mtmsr_orig_ins_offs] = *inst;
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flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsr_len * 4);
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/* Patch the invocation */
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kvm_patch_ins_b(inst, distance_start);
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}
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#ifdef CONFIG_BOOKE
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extern u32 kvm_emulate_wrtee_branch_offs;
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extern u32 kvm_emulate_wrtee_reg_offs;
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extern u32 kvm_emulate_wrtee_orig_ins_offs;
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extern u32 kvm_emulate_wrtee_len;
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extern u32 kvm_emulate_wrtee[];
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static void kvm_patch_ins_wrtee(u32 *inst, u32 rt, int imm_one)
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{
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u32 *p;
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int distance_start;
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int distance_end;
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ulong next_inst;
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p = kvm_alloc(kvm_emulate_wrtee_len * 4);
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if (!p)
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return;
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/* Find out where we are and put everything there */
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distance_start = (ulong)p - (ulong)inst;
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next_inst = ((ulong)inst + 4);
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distance_end = next_inst - (ulong)&p[kvm_emulate_wrtee_branch_offs];
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/* Make sure we only write valid b instructions */
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if (distance_start > KVM_INST_B_MAX) {
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kvm_patching_worked = false;
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return;
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}
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/* Modify the chunk to fit the invocation */
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memcpy(p, kvm_emulate_wrtee, kvm_emulate_wrtee_len * 4);
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p[kvm_emulate_wrtee_branch_offs] |= distance_end & KVM_INST_B_MASK;
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if (imm_one) {
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p[kvm_emulate_wrtee_reg_offs] =
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KVM_INST_LI | __PPC_RT(R30) | MSR_EE;
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} else {
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/* Make clobbered registers work too */
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switch (get_rt(rt)) {
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case 30:
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kvm_patch_ins_ll(&p[kvm_emulate_wrtee_reg_offs],
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magic_var(scratch2), KVM_RT_30);
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break;
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case 31:
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kvm_patch_ins_ll(&p[kvm_emulate_wrtee_reg_offs],
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magic_var(scratch1), KVM_RT_30);
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break;
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default:
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p[kvm_emulate_wrtee_reg_offs] |= rt;
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break;
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}
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}
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p[kvm_emulate_wrtee_orig_ins_offs] = *inst;
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flush_icache_range((ulong)p, (ulong)p + kvm_emulate_wrtee_len * 4);
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/* Patch the invocation */
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kvm_patch_ins_b(inst, distance_start);
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}
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extern u32 kvm_emulate_wrteei_0_branch_offs;
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extern u32 kvm_emulate_wrteei_0_len;
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extern u32 kvm_emulate_wrteei_0[];
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static void kvm_patch_ins_wrteei_0(u32 *inst)
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{
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u32 *p;
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int distance_start;
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int distance_end;
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ulong next_inst;
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p = kvm_alloc(kvm_emulate_wrteei_0_len * 4);
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if (!p)
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return;
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/* Find out where we are and put everything there */
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distance_start = (ulong)p - (ulong)inst;
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next_inst = ((ulong)inst + 4);
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distance_end = next_inst - (ulong)&p[kvm_emulate_wrteei_0_branch_offs];
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/* Make sure we only write valid b instructions */
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if (distance_start > KVM_INST_B_MAX) {
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kvm_patching_worked = false;
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return;
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}
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memcpy(p, kvm_emulate_wrteei_0, kvm_emulate_wrteei_0_len * 4);
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p[kvm_emulate_wrteei_0_branch_offs] |= distance_end & KVM_INST_B_MASK;
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flush_icache_range((ulong)p, (ulong)p + kvm_emulate_wrteei_0_len * 4);
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/* Patch the invocation */
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kvm_patch_ins_b(inst, distance_start);
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}
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#endif
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#ifdef CONFIG_PPC_BOOK3S_32
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extern u32 kvm_emulate_mtsrin_branch_offs;
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extern u32 kvm_emulate_mtsrin_reg1_offs;
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extern u32 kvm_emulate_mtsrin_reg2_offs;
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extern u32 kvm_emulate_mtsrin_orig_ins_offs;
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extern u32 kvm_emulate_mtsrin_len;
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extern u32 kvm_emulate_mtsrin[];
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static void kvm_patch_ins_mtsrin(u32 *inst, u32 rt, u32 rb)
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{
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u32 *p;
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int distance_start;
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int distance_end;
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ulong next_inst;
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p = kvm_alloc(kvm_emulate_mtsrin_len * 4);
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if (!p)
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return;
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/* Find out where we are and put everything there */
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distance_start = (ulong)p - (ulong)inst;
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next_inst = ((ulong)inst + 4);
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distance_end = next_inst - (ulong)&p[kvm_emulate_mtsrin_branch_offs];
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/* Make sure we only write valid b instructions */
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if (distance_start > KVM_INST_B_MAX) {
|
|
kvm_patching_worked = false;
|
|
return;
|
|
}
|
|
|
|
/* Modify the chunk to fit the invocation */
|
|
memcpy(p, kvm_emulate_mtsrin, kvm_emulate_mtsrin_len * 4);
|
|
p[kvm_emulate_mtsrin_branch_offs] |= distance_end & KVM_INST_B_MASK;
|
|
p[kvm_emulate_mtsrin_reg1_offs] |= (rb << 10);
|
|
p[kvm_emulate_mtsrin_reg2_offs] |= rt;
|
|
p[kvm_emulate_mtsrin_orig_ins_offs] = *inst;
|
|
flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtsrin_len * 4);
|
|
|
|
/* Patch the invocation */
|
|
kvm_patch_ins_b(inst, distance_start);
|
|
}
|
|
|
|
#endif
|
|
|
|
static void kvm_map_magic_page(void *data)
|
|
{
|
|
u32 *features = data;
|
|
|
|
ulong in[8];
|
|
ulong out[8];
|
|
|
|
in[0] = KVM_MAGIC_PAGE;
|
|
in[1] = KVM_MAGIC_PAGE;
|
|
|
|
kvm_hypercall(in, out, HC_VENDOR_KVM | KVM_HC_PPC_MAP_MAGIC_PAGE);
|
|
|
|
*features = out[0];
|
|
}
|
|
|
|
static void kvm_check_ins(u32 *inst, u32 features)
|
|
{
|
|
u32 _inst = *inst;
|
|
u32 inst_no_rt = _inst & ~KVM_MASK_RT;
|
|
u32 inst_rt = _inst & KVM_MASK_RT;
|
|
|
|
switch (inst_no_rt) {
|
|
/* Loads */
|
|
case KVM_INST_MFMSR:
|
|
kvm_patch_ins_ld(inst, magic_var(msr), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SPRG0):
|
|
kvm_patch_ins_ld(inst, magic_var(sprg0), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SPRG1):
|
|
kvm_patch_ins_ld(inst, magic_var(sprg1), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SPRG2):
|
|
kvm_patch_ins_ld(inst, magic_var(sprg2), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SPRG3):
|
|
kvm_patch_ins_ld(inst, magic_var(sprg3), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SRR0):
|
|
kvm_patch_ins_ld(inst, magic_var(srr0), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SRR1):
|
|
kvm_patch_ins_ld(inst, magic_var(srr1), inst_rt);
|
|
break;
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_MFSPR(SPRN_DEAR):
|
|
#else
|
|
case KVM_INST_MFSPR(SPRN_DAR):
|
|
#endif
|
|
kvm_patch_ins_ld(inst, magic_var(dar), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_DSISR):
|
|
kvm_patch_ins_lwz(inst, magic_var(dsisr), inst_rt);
|
|
break;
|
|
|
|
#ifdef CONFIG_PPC_BOOK3E_MMU
|
|
case KVM_INST_MFSPR(SPRN_MAS0):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_lwz(inst, magic_var(mas0), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_MAS1):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_lwz(inst, magic_var(mas1), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_MAS2):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_ld(inst, magic_var(mas2), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_MAS3):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_lwz(inst, magic_var(mas7_3) + 4, inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_MAS4):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_lwz(inst, magic_var(mas4), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_MAS6):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_lwz(inst, magic_var(mas6), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_MAS7):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_lwz(inst, magic_var(mas7_3), inst_rt);
|
|
break;
|
|
#endif /* CONFIG_PPC_BOOK3E_MMU */
|
|
|
|
case KVM_INST_MFSPR(SPRN_SPRG4):
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_MFSPR(SPRN_SPRG4R):
|
|
#endif
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_ld(inst, magic_var(sprg4), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SPRG5):
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_MFSPR(SPRN_SPRG5R):
|
|
#endif
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_ld(inst, magic_var(sprg5), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SPRG6):
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_MFSPR(SPRN_SPRG6R):
|
|
#endif
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_ld(inst, magic_var(sprg6), inst_rt);
|
|
break;
|
|
case KVM_INST_MFSPR(SPRN_SPRG7):
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_MFSPR(SPRN_SPRG7R):
|
|
#endif
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_ld(inst, magic_var(sprg7), inst_rt);
|
|
break;
|
|
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_MFSPR(SPRN_ESR):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_lwz(inst, magic_var(esr), inst_rt);
|
|
break;
|
|
#endif
|
|
|
|
case KVM_INST_MFSPR(SPRN_PIR):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_lwz(inst, magic_var(pir), inst_rt);
|
|
break;
|
|
|
|
|
|
/* Stores */
|
|
case KVM_INST_MTSPR(SPRN_SPRG0):
|
|
kvm_patch_ins_std(inst, magic_var(sprg0), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_SPRG1):
|
|
kvm_patch_ins_std(inst, magic_var(sprg1), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_SPRG2):
|
|
kvm_patch_ins_std(inst, magic_var(sprg2), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_SPRG3):
|
|
kvm_patch_ins_std(inst, magic_var(sprg3), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_SRR0):
|
|
kvm_patch_ins_std(inst, magic_var(srr0), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_SRR1):
|
|
kvm_patch_ins_std(inst, magic_var(srr1), inst_rt);
|
|
break;
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_MTSPR(SPRN_DEAR):
|
|
#else
|
|
case KVM_INST_MTSPR(SPRN_DAR):
|
|
#endif
|
|
kvm_patch_ins_std(inst, magic_var(dar), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_DSISR):
|
|
kvm_patch_ins_stw(inst, magic_var(dsisr), inst_rt);
|
|
break;
|
|
#ifdef CONFIG_PPC_BOOK3E_MMU
|
|
case KVM_INST_MTSPR(SPRN_MAS0):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_stw(inst, magic_var(mas0), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_MAS1):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_stw(inst, magic_var(mas1), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_MAS2):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_std(inst, magic_var(mas2), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_MAS3):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_stw(inst, magic_var(mas7_3) + 4, inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_MAS4):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_stw(inst, magic_var(mas4), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_MAS6):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_stw(inst, magic_var(mas6), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_MAS7):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_stw(inst, magic_var(mas7_3), inst_rt);
|
|
break;
|
|
#endif /* CONFIG_PPC_BOOK3E_MMU */
|
|
|
|
case KVM_INST_MTSPR(SPRN_SPRG4):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_std(inst, magic_var(sprg4), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_SPRG5):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_std(inst, magic_var(sprg5), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_SPRG6):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_std(inst, magic_var(sprg6), inst_rt);
|
|
break;
|
|
case KVM_INST_MTSPR(SPRN_SPRG7):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_std(inst, magic_var(sprg7), inst_rt);
|
|
break;
|
|
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_MTSPR(SPRN_ESR):
|
|
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
|
|
kvm_patch_ins_stw(inst, magic_var(esr), inst_rt);
|
|
break;
|
|
#endif
|
|
|
|
/* Nops */
|
|
case KVM_INST_TLBSYNC:
|
|
kvm_patch_ins_nop(inst);
|
|
break;
|
|
|
|
/* Rewrites */
|
|
case KVM_INST_MTMSRD_L1:
|
|
kvm_patch_ins_mtmsrd(inst, inst_rt);
|
|
break;
|
|
case KVM_INST_MTMSR:
|
|
case KVM_INST_MTMSRD_L0:
|
|
kvm_patch_ins_mtmsr(inst, inst_rt);
|
|
break;
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_WRTEE:
|
|
kvm_patch_ins_wrtee(inst, inst_rt, 0);
|
|
break;
|
|
#endif
|
|
}
|
|
|
|
switch (inst_no_rt & ~KVM_MASK_RB) {
|
|
#ifdef CONFIG_PPC_BOOK3S_32
|
|
case KVM_INST_MTSRIN:
|
|
if (features & KVM_MAGIC_FEAT_SR) {
|
|
u32 inst_rb = _inst & KVM_MASK_RB;
|
|
kvm_patch_ins_mtsrin(inst, inst_rt, inst_rb);
|
|
}
|
|
break;
|
|
break;
|
|
#endif
|
|
}
|
|
|
|
switch (_inst) {
|
|
#ifdef CONFIG_BOOKE
|
|
case KVM_INST_WRTEEI_0:
|
|
kvm_patch_ins_wrteei_0(inst);
|
|
break;
|
|
|
|
case KVM_INST_WRTEEI_1:
|
|
kvm_patch_ins_wrtee(inst, 0, 1);
|
|
break;
|
|
#endif
|
|
}
|
|
}
|
|
|
|
extern u32 kvm_template_start[];
|
|
extern u32 kvm_template_end[];
|
|
|
|
static void kvm_use_magic_page(void)
|
|
{
|
|
u32 *p;
|
|
u32 *start, *end;
|
|
u32 tmp;
|
|
u32 features;
|
|
|
|
/* Tell the host to map the magic page to -4096 on all CPUs */
|
|
on_each_cpu(kvm_map_magic_page, &features, 1);
|
|
|
|
/* Quick self-test to see if the mapping works */
|
|
if (__get_user(tmp, (u32*)KVM_MAGIC_PAGE)) {
|
|
kvm_patching_worked = false;
|
|
return;
|
|
}
|
|
|
|
/* Now loop through all code and find instructions */
|
|
start = (void*)_stext;
|
|
end = (void*)_etext;
|
|
|
|
/*
|
|
* Being interrupted in the middle of patching would
|
|
* be bad for SPRG4-7, which KVM can't keep in sync
|
|
* with emulated accesses because reads don't trap.
|
|
*/
|
|
local_irq_disable();
|
|
|
|
for (p = start; p < end; p++) {
|
|
/* Avoid patching the template code */
|
|
if (p >= kvm_template_start && p < kvm_template_end) {
|
|
p = kvm_template_end - 1;
|
|
continue;
|
|
}
|
|
kvm_check_ins(p, features);
|
|
}
|
|
|
|
local_irq_enable();
|
|
|
|
printk(KERN_INFO "KVM: Live patching for a fast VM %s\n",
|
|
kvm_patching_worked ? "worked" : "failed");
|
|
}
|
|
|
|
unsigned long kvm_hypercall(unsigned long *in,
|
|
unsigned long *out,
|
|
unsigned long nr)
|
|
{
|
|
unsigned long register r0 asm("r0");
|
|
unsigned long register r3 asm("r3") = in[0];
|
|
unsigned long register r4 asm("r4") = in[1];
|
|
unsigned long register r5 asm("r5") = in[2];
|
|
unsigned long register r6 asm("r6") = in[3];
|
|
unsigned long register r7 asm("r7") = in[4];
|
|
unsigned long register r8 asm("r8") = in[5];
|
|
unsigned long register r9 asm("r9") = in[6];
|
|
unsigned long register r10 asm("r10") = in[7];
|
|
unsigned long register r11 asm("r11") = nr;
|
|
unsigned long register r12 asm("r12");
|
|
|
|
asm volatile("bl epapr_hypercall_start"
|
|
: "=r"(r0), "=r"(r3), "=r"(r4), "=r"(r5), "=r"(r6),
|
|
"=r"(r7), "=r"(r8), "=r"(r9), "=r"(r10), "=r"(r11),
|
|
"=r"(r12)
|
|
: "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "r"(r8),
|
|
"r"(r9), "r"(r10), "r"(r11)
|
|
: "memory", "cc", "xer", "ctr", "lr");
|
|
|
|
out[0] = r4;
|
|
out[1] = r5;
|
|
out[2] = r6;
|
|
out[3] = r7;
|
|
out[4] = r8;
|
|
out[5] = r9;
|
|
out[6] = r10;
|
|
out[7] = r11;
|
|
|
|
return r3;
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvm_hypercall);
|
|
|
|
static __init void kvm_free_tmp(void)
|
|
{
|
|
unsigned long start, end;
|
|
|
|
start = (ulong)&kvm_tmp[kvm_tmp_index + (PAGE_SIZE - 1)] & PAGE_MASK;
|
|
end = (ulong)&kvm_tmp[ARRAY_SIZE(kvm_tmp)] & PAGE_MASK;
|
|
|
|
/* Free the tmp space we don't need */
|
|
for (; start < end; start += PAGE_SIZE) {
|
|
ClearPageReserved(virt_to_page(start));
|
|
init_page_count(virt_to_page(start));
|
|
free_page(start);
|
|
totalram_pages++;
|
|
}
|
|
}
|
|
|
|
static int __init kvm_guest_init(void)
|
|
{
|
|
if (!kvm_para_available())
|
|
goto free_tmp;
|
|
|
|
if (!epapr_paravirt_enabled)
|
|
goto free_tmp;
|
|
|
|
if (kvm_para_has_feature(KVM_FEATURE_MAGIC_PAGE))
|
|
kvm_use_magic_page();
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
/* Enable napping */
|
|
powersave_nap = 1;
|
|
#endif
|
|
|
|
free_tmp:
|
|
kvm_free_tmp();
|
|
|
|
return 0;
|
|
}
|
|
|
|
postcore_initcall(kvm_guest_init);
|