220196b384
Pull request already again to get the s/fence/dma_fence/ stuff in and allow everyone to resync. Otherwise really just misc stuff all over, and a new bridge driver. * tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel: drm/bridge: fix platform_no_drv_owner.cocci warnings drm/bridge: fix semicolon.cocci warnings drm: Print some debug/error info during DP dual mode detect drm: mark drm_of_component_match_add dummy inline drm/bridge: add Silicon Image SiI8620 driver dt-bindings: add Silicon Image SiI8620 bridge bindings video: add header file for Mobile High-Definition Link (MHL) interface drm: convert DT component matching to component_match_add_release() dma-buf: Rename struct fence to dma_fence dma-buf/fence: add an lockdep_assert_held() drm/dp: Factor out helper to distinguish between branch and sink devices drm/edid: Only print the bad edid when aborting drm/msm: add missing header dependencies drm/msm/adreno: move function declarations to header file drm/i2c/tda998x: mark symbol static where possible doc: add missing docbook parameter for fence-array drm: RIP mode_config->rotation_property drm/msm/mdp5: Advertize 180 degree rotation drm/msm/mdp5: Use per-plane rotation property
92 lines
3.1 KiB
C
92 lines
3.1 KiB
C
/*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __AMDGPU_TTM_H__
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#define __AMDGPU_TTM_H__
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#include "gpu_scheduler.h"
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#define AMDGPU_PL_GDS (TTM_PL_PRIV + 0)
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#define AMDGPU_PL_GWS (TTM_PL_PRIV + 1)
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#define AMDGPU_PL_OA (TTM_PL_PRIV + 2)
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#define AMDGPU_PL_FLAG_GDS (TTM_PL_FLAG_PRIV << 0)
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#define AMDGPU_PL_FLAG_GWS (TTM_PL_FLAG_PRIV << 1)
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#define AMDGPU_PL_FLAG_OA (TTM_PL_FLAG_PRIV << 2)
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#define AMDGPU_TTM_LRU_SIZE 20
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struct amdgpu_mman_lru {
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struct list_head *lru[TTM_NUM_MEM_TYPES];
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struct list_head *swap_lru;
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};
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struct amdgpu_mman {
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struct ttm_bo_global_ref bo_global_ref;
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struct drm_global_reference mem_global_ref;
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struct ttm_bo_device bdev;
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bool mem_global_referenced;
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bool initialized;
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#if defined(CONFIG_DEBUG_FS)
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struct dentry *vram;
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struct dentry *gtt;
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#endif
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/* buffer handling */
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const struct amdgpu_buffer_funcs *buffer_funcs;
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struct amdgpu_ring *buffer_funcs_ring;
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/* Scheduler entity for buffer moves */
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struct amd_sched_entity entity;
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/* custom LRU management */
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struct amdgpu_mman_lru log2_size[AMDGPU_TTM_LRU_SIZE];
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/* guard for log2_size array, don't add anything in between */
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struct amdgpu_mman_lru guard;
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};
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extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func;
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extern const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func;
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int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
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struct ttm_buffer_object *tbo,
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const struct ttm_place *place,
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struct ttm_mem_reg *mem);
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int amdgpu_copy_buffer(struct amdgpu_ring *ring,
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uint64_t src_offset,
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uint64_t dst_offset,
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uint32_t byte_count,
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struct reservation_object *resv,
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struct dma_fence **fence, bool direct_submit);
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int amdgpu_fill_buffer(struct amdgpu_bo *bo,
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uint32_t src_data,
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struct reservation_object *resv,
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struct dma_fence **fence);
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int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma);
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bool amdgpu_ttm_is_bound(struct ttm_tt *ttm);
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int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem);
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#endif
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