![Eric Sesterhenn](/assets/img/avatar_default.png)
this patch converts arch/sparc64 to kzalloc usage. Crosscompile tested with allyesconfig. Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
1088 lines
29 KiB
C
1088 lines
29 KiB
C
/* $Id: pci_common.c,v 1.29 2002/02/01 00:56:03 davem Exp $
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* pci_common.c: PCI controller common support.
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*
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* Copyright (C) 1999 David S. Miller (davem@redhat.com)
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*/
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <asm/pbm.h>
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/* Fix self device of BUS and hook it into BUS->self.
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* The pci_scan_bus does not do this for the host bridge.
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*/
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void __init pci_fixup_host_bridge_self(struct pci_bus *pbus)
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{
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struct pci_dev *pdev;
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list_for_each_entry(pdev, &pbus->devices, bus_list) {
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if (pdev->class >> 8 == PCI_CLASS_BRIDGE_HOST) {
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pbus->self = pdev;
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return;
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}
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}
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prom_printf("PCI: Critical error, cannot find host bridge PDEV.\n");
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prom_halt();
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}
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/* Find the OBP PROM device tree node for a PCI device.
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* Return zero if not found.
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*/
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static int __init find_device_prom_node(struct pci_pbm_info *pbm,
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struct pci_dev *pdev,
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int bus_prom_node,
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struct linux_prom_pci_registers *pregs,
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int *nregs)
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{
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int node;
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*nregs = 0;
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/*
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* Return the PBM's PROM node in case we are it's PCI device,
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* as the PBM's reg property is different to standard PCI reg
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* properties. We would delete this device entry otherwise,
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* which confuses XFree86's device probing...
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*/
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if ((pdev->bus->number == pbm->pci_bus->number) && (pdev->devfn == 0) &&
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(pdev->vendor == PCI_VENDOR_ID_SUN) &&
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(pdev->device == PCI_DEVICE_ID_SUN_PBM ||
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pdev->device == PCI_DEVICE_ID_SUN_SCHIZO ||
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pdev->device == PCI_DEVICE_ID_SUN_TOMATILLO ||
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pdev->device == PCI_DEVICE_ID_SUN_SABRE ||
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pdev->device == PCI_DEVICE_ID_SUN_HUMMINGBIRD))
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return bus_prom_node;
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node = prom_getchild(bus_prom_node);
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while (node != 0) {
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int err = prom_getproperty(node, "reg",
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(char *)pregs,
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sizeof(*pregs) * PROMREG_MAX);
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if (err == 0 || err == -1)
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goto do_next_sibling;
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if (((pregs[0].phys_hi >> 8) & 0xff) == pdev->devfn) {
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*nregs = err / sizeof(*pregs);
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return node;
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}
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do_next_sibling:
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node = prom_getsibling(node);
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}
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return 0;
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}
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/* Older versions of OBP on PCI systems encode 64-bit MEM
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* space assignments incorrectly, this fixes them up. We also
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* take the opportunity here to hide other kinds of bogus
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* assignments.
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*/
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static void __init fixup_obp_assignments(struct pci_dev *pdev,
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struct pcidev_cookie *pcp)
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{
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int i;
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if (pdev->vendor == PCI_VENDOR_ID_AL &&
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(pdev->device == PCI_DEVICE_ID_AL_M7101 ||
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pdev->device == PCI_DEVICE_ID_AL_M1533)) {
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int i;
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/* Zap all of the normal resources, they are
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* meaningless and generate bogus resource collision
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* messages. This is OpenBoot's ill-fated attempt to
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* represent the implicit resources that these devices
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* have.
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*/
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pcp->num_prom_assignments = 0;
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for (i = 0; i < 6; i++) {
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pdev->resource[i].start =
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pdev->resource[i].end =
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pdev->resource[i].flags = 0;
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}
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pdev->resource[PCI_ROM_RESOURCE].start =
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pdev->resource[PCI_ROM_RESOURCE].end =
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pdev->resource[PCI_ROM_RESOURCE].flags = 0;
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return;
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}
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for (i = 0; i < pcp->num_prom_assignments; i++) {
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struct linux_prom_pci_registers *ap;
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int space;
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ap = &pcp->prom_assignments[i];
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space = ap->phys_hi >> 24;
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if ((space & 0x3) == 2 &&
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(space & 0x4) != 0) {
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ap->phys_hi &= ~(0x7 << 24);
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ap->phys_hi |= 0x3 << 24;
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}
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}
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}
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/* Fill in the PCI device cookie sysdata for the given
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* PCI device. This cookie is the means by which one
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* can get to OBP and PCI controller specific information
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* for a PCI device.
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*/
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static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
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struct pci_dev *pdev,
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int bus_prom_node)
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{
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struct linux_prom_pci_registers pregs[PROMREG_MAX];
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struct pcidev_cookie *pcp;
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int device_prom_node, nregs, err;
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device_prom_node = find_device_prom_node(pbm, pdev, bus_prom_node,
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pregs, &nregs);
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if (device_prom_node == 0) {
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/* If it is not in the OBP device tree then
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* there must be a damn good reason for it.
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*
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* So what we do is delete the device from the
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* PCI device tree completely. This scenario
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* is seen, for example, on CP1500 for the
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* second EBUS/HappyMeal pair if the external
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* connector for it is not present.
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*/
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pci_remove_bus_device(pdev);
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return;
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}
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pcp = kmalloc(sizeof(*pcp), GFP_ATOMIC);
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if (pcp == NULL) {
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prom_printf("PCI_COOKIE: Fatal malloc error, aborting...\n");
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prom_halt();
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}
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pcp->pbm = pbm;
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pcp->prom_node = device_prom_node;
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memcpy(pcp->prom_regs, pregs, sizeof(pcp->prom_regs));
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pcp->num_prom_regs = nregs;
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err = prom_getproperty(device_prom_node, "name",
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pcp->prom_name, sizeof(pcp->prom_name));
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if (err > 0)
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pcp->prom_name[err] = 0;
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else
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pcp->prom_name[0] = 0;
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err = prom_getproperty(device_prom_node,
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"assigned-addresses",
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(char *)pcp->prom_assignments,
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sizeof(pcp->prom_assignments));
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if (err == 0 || err == -1)
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pcp->num_prom_assignments = 0;
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else
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pcp->num_prom_assignments =
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(err / sizeof(pcp->prom_assignments[0]));
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if (strcmp(pcp->prom_name, "ebus") == 0) {
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struct linux_prom_ebus_ranges erng[PROM_PCIRNG_MAX];
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int iter;
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/* EBUS is special... */
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err = prom_getproperty(device_prom_node, "ranges",
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(char *)&erng[0], sizeof(erng));
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if (err == 0 || err == -1) {
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prom_printf("EBUS: Fatal error, no range property\n");
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prom_halt();
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}
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err = (err / sizeof(erng[0]));
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for(iter = 0; iter < err; iter++) {
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struct linux_prom_ebus_ranges *ep = &erng[iter];
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struct linux_prom_pci_registers *ap;
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ap = &pcp->prom_assignments[iter];
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ap->phys_hi = ep->parent_phys_hi;
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ap->phys_mid = ep->parent_phys_mid;
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ap->phys_lo = ep->parent_phys_lo;
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ap->size_hi = 0;
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ap->size_lo = ep->size;
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}
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pcp->num_prom_assignments = err;
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}
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fixup_obp_assignments(pdev, pcp);
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pdev->sysdata = pcp;
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}
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void __init pci_fill_in_pbm_cookies(struct pci_bus *pbus,
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struct pci_pbm_info *pbm,
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int prom_node)
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{
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struct pci_dev *pdev, *pdev_next;
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struct pci_bus *this_pbus, *pbus_next;
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/* This must be _safe because the cookie fillin
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routine can delete devices from the tree. */
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list_for_each_entry_safe(pdev, pdev_next, &pbus->devices, bus_list)
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pdev_cookie_fillin(pbm, pdev, prom_node);
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list_for_each_entry_safe(this_pbus, pbus_next, &pbus->children, node) {
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struct pcidev_cookie *pcp = this_pbus->self->sysdata;
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pci_fill_in_pbm_cookies(this_pbus, pbm, pcp->prom_node);
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}
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}
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static void __init bad_assignment(struct pci_dev *pdev,
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struct linux_prom_pci_registers *ap,
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struct resource *res,
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int do_prom_halt)
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{
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prom_printf("PCI: Bogus PROM assignment. BUS[%02x] DEVFN[%x]\n",
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pdev->bus->number, pdev->devfn);
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if (ap)
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prom_printf("PCI: phys[%08x:%08x:%08x] size[%08x:%08x]\n",
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ap->phys_hi, ap->phys_mid, ap->phys_lo,
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ap->size_hi, ap->size_lo);
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if (res)
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prom_printf("PCI: RES[%016lx-->%016lx:(%lx)]\n",
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res->start, res->end, res->flags);
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prom_printf("Please email this information to davem@redhat.com\n");
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if (do_prom_halt)
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prom_halt();
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}
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static struct resource *
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__init get_root_resource(struct linux_prom_pci_registers *ap,
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struct pci_pbm_info *pbm)
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{
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int space = (ap->phys_hi >> 24) & 3;
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switch (space) {
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case 0:
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/* Configuration space, silently ignore it. */
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return NULL;
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case 1:
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/* 16-bit IO space */
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return &pbm->io_space;
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case 2:
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/* 32-bit MEM space */
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return &pbm->mem_space;
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case 3:
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/* 64-bit MEM space, these are allocated out of
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* the 32-bit mem_space range for the PBM, ie.
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* we just zero out the upper 32-bits.
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*/
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return &pbm->mem_space;
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default:
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printk("PCI: What is resource space %x? "
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"Tell davem@redhat.com about it!\n", space);
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return NULL;
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};
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}
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static struct resource *
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__init get_device_resource(struct linux_prom_pci_registers *ap,
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struct pci_dev *pdev)
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{
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struct resource *res;
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int breg = (ap->phys_hi & 0xff);
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switch (breg) {
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case PCI_ROM_ADDRESS:
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/* Unfortunately I have seen several cases where
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* buggy FCODE uses a space value of '1' (I/O space)
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* in the register property for the ROM address
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* so disable this sanity check for now.
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*/
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#if 0
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{
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int space = (ap->phys_hi >> 24) & 3;
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/* It had better be MEM space. */
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if (space != 2)
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bad_assignment(pdev, ap, NULL, 0);
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}
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#endif
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res = &pdev->resource[PCI_ROM_RESOURCE];
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break;
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case PCI_BASE_ADDRESS_0:
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case PCI_BASE_ADDRESS_1:
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case PCI_BASE_ADDRESS_2:
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case PCI_BASE_ADDRESS_3:
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case PCI_BASE_ADDRESS_4:
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case PCI_BASE_ADDRESS_5:
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res = &pdev->resource[(breg - PCI_BASE_ADDRESS_0) / 4];
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break;
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default:
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bad_assignment(pdev, ap, NULL, 0);
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res = NULL;
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break;
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};
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return res;
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}
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static int __init pdev_resource_collisions_expected(struct pci_dev *pdev)
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{
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if (pdev->vendor != PCI_VENDOR_ID_SUN)
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return 0;
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if (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS ||
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pdev->device == PCI_DEVICE_ID_SUN_RIO_1394 ||
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pdev->device == PCI_DEVICE_ID_SUN_RIO_USB)
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return 1;
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return 0;
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}
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static void __init pdev_record_assignments(struct pci_pbm_info *pbm,
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struct pci_dev *pdev)
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{
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struct pcidev_cookie *pcp = pdev->sysdata;
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int i;
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for (i = 0; i < pcp->num_prom_assignments; i++) {
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struct linux_prom_pci_registers *ap;
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struct resource *root, *res;
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/* The format of this property is specified in
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* the PCI Bus Binding to IEEE1275-1994.
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*/
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ap = &pcp->prom_assignments[i];
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root = get_root_resource(ap, pbm);
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res = get_device_resource(ap, pdev);
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if (root == NULL || res == NULL ||
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res->flags == 0)
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continue;
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/* Ok we know which resource this PROM assignment is
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* for, sanity check it.
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*/
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if ((res->start & 0xffffffffUL) != ap->phys_lo)
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bad_assignment(pdev, ap, res, 1);
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/* If it is a 64-bit MEM space assignment, verify that
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* the resource is too and that the upper 32-bits match.
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*/
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if (((ap->phys_hi >> 24) & 3) == 3) {
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if (((res->flags & IORESOURCE_MEM) == 0) ||
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((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
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!= PCI_BASE_ADDRESS_MEM_TYPE_64))
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bad_assignment(pdev, ap, res, 1);
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if ((res->start >> 32) != ap->phys_mid)
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bad_assignment(pdev, ap, res, 1);
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/* PBM cannot generate cpu initiated PIOs
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* to the full 64-bit space. Therefore the
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* upper 32-bits better be zero. If it is
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* not, just skip it and we will assign it
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* properly ourselves.
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*/
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if ((res->start >> 32) != 0UL) {
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printk(KERN_ERR "PCI: OBP assigns out of range MEM address "
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"%016lx for region %ld on device %s\n",
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res->start, (res - &pdev->resource[0]), pci_name(pdev));
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continue;
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}
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}
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/* Adjust the resource into the physical address space
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* of this PBM.
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*/
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pbm->parent->resource_adjust(pdev, res, root);
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if (request_resource(root, res) < 0) {
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/* OK, there is some conflict. But this is fine
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* since we'll reassign it in the fixup pass.
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*
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* We notify the user that OBP made an error if it
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* is a case we don't expect.
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*/
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if (!pdev_resource_collisions_expected(pdev)) {
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printk(KERN_ERR "PCI: Address space collision on region %ld "
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"[%016lx:%016lx] of device %s\n",
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(res - &pdev->resource[0]),
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res->start, res->end,
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pci_name(pdev));
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}
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}
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}
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}
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void __init pci_record_assignments(struct pci_pbm_info *pbm,
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struct pci_bus *pbus)
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{
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struct pci_dev *dev;
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struct pci_bus *bus;
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list_for_each_entry(dev, &pbus->devices, bus_list)
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pdev_record_assignments(pbm, dev);
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list_for_each_entry(bus, &pbus->children, node)
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pci_record_assignments(pbm, bus);
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}
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/* Return non-zero if PDEV has implicit I/O resources even
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* though it may not have an I/O base address register
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* active.
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*/
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static int __init has_implicit_io(struct pci_dev *pdev)
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{
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int class = pdev->class >> 8;
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if (class == PCI_CLASS_NOT_DEFINED ||
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class == PCI_CLASS_NOT_DEFINED_VGA ||
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class == PCI_CLASS_STORAGE_IDE ||
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(pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
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return 1;
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return 0;
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}
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static void __init pdev_assign_unassigned(struct pci_pbm_info *pbm,
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struct pci_dev *pdev)
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{
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u32 reg;
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u16 cmd;
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int i, io_seen, mem_seen;
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io_seen = mem_seen = 0;
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for (i = 0; i < PCI_NUM_RESOURCES; i++) {
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struct resource *root, *res;
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unsigned long size, min, max, align;
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res = &pdev->resource[i];
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if (res->flags & IORESOURCE_IO)
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io_seen++;
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else if (res->flags & IORESOURCE_MEM)
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mem_seen++;
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/* If it is already assigned or the resource does
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* not exist, there is nothing to do.
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*/
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if (res->parent != NULL || res->flags == 0UL)
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continue;
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/* Determine the root we allocate from. */
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if (res->flags & IORESOURCE_IO) {
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root = &pbm->io_space;
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min = root->start + 0x400UL;
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max = root->end;
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} else {
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root = &pbm->mem_space;
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min = root->start;
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max = min + 0x80000000UL;
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}
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size = res->end - res->start;
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align = size + 1;
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if (allocate_resource(root, res, size + 1, min, max, align, NULL, NULL) < 0) {
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/* uh oh */
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prom_printf("PCI: Failed to allocate resource %d for %s\n",
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i, pci_name(pdev));
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prom_halt();
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}
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/* Update PCI config space. */
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pbm->parent->base_address_update(pdev, i);
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}
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|
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/* Special case, disable the ROM. Several devices
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* act funny (ie. do not respond to memory space writes)
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* when it is left enabled. A good example are Qlogic,ISP
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* adapters.
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*/
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pci_read_config_dword(pdev, PCI_ROM_ADDRESS, ®);
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reg &= ~PCI_ROM_ADDRESS_ENABLE;
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pci_write_config_dword(pdev, PCI_ROM_ADDRESS, reg);
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/* If we saw I/O or MEM resources, enable appropriate
|
|
* bits in PCI command register.
|
|
*/
|
|
if (io_seen || mem_seen) {
|
|
pci_read_config_word(pdev, PCI_COMMAND, &cmd);
|
|
if (io_seen || has_implicit_io(pdev))
|
|
cmd |= PCI_COMMAND_IO;
|
|
if (mem_seen)
|
|
cmd |= PCI_COMMAND_MEMORY;
|
|
pci_write_config_word(pdev, PCI_COMMAND, cmd);
|
|
}
|
|
|
|
/* If this is a PCI bridge or an IDE controller,
|
|
* enable bus mastering. In the former case also
|
|
* set the cache line size correctly.
|
|
*/
|
|
if (((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI) ||
|
|
(((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) &&
|
|
((pdev->class & 0x80) != 0))) {
|
|
pci_read_config_word(pdev, PCI_COMMAND, &cmd);
|
|
cmd |= PCI_COMMAND_MASTER;
|
|
pci_write_config_word(pdev, PCI_COMMAND, cmd);
|
|
|
|
if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
|
|
pci_write_config_byte(pdev,
|
|
PCI_CACHE_LINE_SIZE,
|
|
(64 / sizeof(u32)));
|
|
}
|
|
}
|
|
|
|
void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
|
|
struct pci_bus *pbus)
|
|
{
|
|
struct pci_dev *dev;
|
|
struct pci_bus *bus;
|
|
|
|
list_for_each_entry(dev, &pbus->devices, bus_list)
|
|
pdev_assign_unassigned(pbm, dev);
|
|
|
|
list_for_each_entry(bus, &pbus->children, node)
|
|
pci_assign_unassigned(pbm, bus);
|
|
}
|
|
|
|
static inline unsigned int pci_slot_swivel(struct pci_pbm_info *pbm,
|
|
struct pci_dev *toplevel_pdev,
|
|
struct pci_dev *pdev,
|
|
unsigned int interrupt)
|
|
{
|
|
unsigned int ret;
|
|
|
|
if (unlikely(interrupt < 1 || interrupt > 4)) {
|
|
printk("%s: Device %s interrupt value of %u is strange.\n",
|
|
pbm->name, pci_name(pdev), interrupt);
|
|
return interrupt;
|
|
}
|
|
|
|
ret = ((interrupt - 1 + (PCI_SLOT(pdev->devfn) & 3)) & 3) + 1;
|
|
|
|
printk("%s: %s IRQ Swivel %s [%x:%x] -> [%x]\n",
|
|
pbm->name, pci_name(toplevel_pdev), pci_name(pdev),
|
|
interrupt, PCI_SLOT(pdev->devfn), ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline unsigned int pci_apply_intmap(struct pci_pbm_info *pbm,
|
|
struct pci_dev *toplevel_pdev,
|
|
struct pci_dev *pbus,
|
|
struct pci_dev *pdev,
|
|
unsigned int interrupt,
|
|
unsigned int *cnode)
|
|
{
|
|
struct linux_prom_pci_intmap imap[PROM_PCIIMAP_MAX];
|
|
struct linux_prom_pci_intmask imask;
|
|
struct pcidev_cookie *pbus_pcp = pbus->sysdata;
|
|
struct pcidev_cookie *pdev_pcp = pdev->sysdata;
|
|
struct linux_prom_pci_registers *pregs = pdev_pcp->prom_regs;
|
|
int plen, num_imap, i;
|
|
unsigned int hi, mid, lo, irq, orig_interrupt;
|
|
|
|
*cnode = pbus_pcp->prom_node;
|
|
|
|
plen = prom_getproperty(pbus_pcp->prom_node, "interrupt-map",
|
|
(char *) &imap[0], sizeof(imap));
|
|
if (plen <= 0 ||
|
|
(plen % sizeof(struct linux_prom_pci_intmap)) != 0) {
|
|
printk("%s: Device %s interrupt-map has bad len %d\n",
|
|
pbm->name, pci_name(pbus), plen);
|
|
goto no_intmap;
|
|
}
|
|
num_imap = plen / sizeof(struct linux_prom_pci_intmap);
|
|
|
|
plen = prom_getproperty(pbus_pcp->prom_node, "interrupt-map-mask",
|
|
(char *) &imask, sizeof(imask));
|
|
if (plen <= 0 ||
|
|
(plen % sizeof(struct linux_prom_pci_intmask)) != 0) {
|
|
printk("%s: Device %s interrupt-map-mask has bad len %d\n",
|
|
pbm->name, pci_name(pbus), plen);
|
|
goto no_intmap;
|
|
}
|
|
|
|
orig_interrupt = interrupt;
|
|
|
|
hi = pregs->phys_hi & imask.phys_hi;
|
|
mid = pregs->phys_mid & imask.phys_mid;
|
|
lo = pregs->phys_lo & imask.phys_lo;
|
|
irq = interrupt & imask.interrupt;
|
|
|
|
for (i = 0; i < num_imap; i++) {
|
|
if (imap[i].phys_hi == hi &&
|
|
imap[i].phys_mid == mid &&
|
|
imap[i].phys_lo == lo &&
|
|
imap[i].interrupt == irq) {
|
|
*cnode = imap[i].cnode;
|
|
interrupt = imap[i].cinterrupt;
|
|
}
|
|
}
|
|
|
|
printk("%s: %s MAP BUS %s DEV %s [%x] -> [%x]\n",
|
|
pbm->name, pci_name(toplevel_pdev),
|
|
pci_name(pbus), pci_name(pdev),
|
|
orig_interrupt, interrupt);
|
|
|
|
no_intmap:
|
|
return interrupt;
|
|
}
|
|
|
|
/* For each PCI bus on the way to the root:
|
|
* 1) If it has an interrupt-map property, apply it.
|
|
* 2) Else, swivel the interrupt number based upon the PCI device number.
|
|
*
|
|
* Return the "IRQ controller" node. If this is the PBM's device node,
|
|
* all interrupt translations are complete, else we should use that node's
|
|
* "reg" property to apply the PBM's "interrupt-{map,mask}" to the interrupt.
|
|
*/
|
|
static unsigned int __init pci_intmap_match_to_root(struct pci_pbm_info *pbm,
|
|
struct pci_dev *pdev,
|
|
unsigned int *interrupt)
|
|
{
|
|
struct pci_dev *toplevel_pdev = pdev;
|
|
struct pcidev_cookie *toplevel_pcp = toplevel_pdev->sysdata;
|
|
unsigned int cnode = toplevel_pcp->prom_node;
|
|
|
|
while (pdev->bus->number != pbm->pci_first_busno) {
|
|
struct pci_dev *pbus = pdev->bus->self;
|
|
struct pcidev_cookie *pcp = pbus->sysdata;
|
|
int plen;
|
|
|
|
plen = prom_getproplen(pcp->prom_node, "interrupt-map");
|
|
if (plen <= 0) {
|
|
*interrupt = pci_slot_swivel(pbm, toplevel_pdev,
|
|
pdev, *interrupt);
|
|
cnode = pcp->prom_node;
|
|
} else {
|
|
*interrupt = pci_apply_intmap(pbm, toplevel_pdev,
|
|
pbus, pdev,
|
|
*interrupt, &cnode);
|
|
|
|
while (pcp->prom_node != cnode &&
|
|
pbus->bus->number != pbm->pci_first_busno) {
|
|
pbus = pbus->bus->self;
|
|
pcp = pbus->sysdata;
|
|
}
|
|
}
|
|
pdev = pbus;
|
|
|
|
if (cnode == pbm->prom_node)
|
|
break;
|
|
}
|
|
|
|
return cnode;
|
|
}
|
|
|
|
static int __init pci_intmap_match(struct pci_dev *pdev, unsigned int *interrupt)
|
|
{
|
|
struct pcidev_cookie *dev_pcp = pdev->sysdata;
|
|
struct pci_pbm_info *pbm = dev_pcp->pbm;
|
|
struct linux_prom_pci_registers reg[PROMREG_MAX];
|
|
unsigned int hi, mid, lo, irq;
|
|
int i, cnode, plen;
|
|
|
|
cnode = pci_intmap_match_to_root(pbm, pdev, interrupt);
|
|
if (cnode == pbm->prom_node)
|
|
goto success;
|
|
|
|
plen = prom_getproperty(cnode, "reg", (char *) reg, sizeof(reg));
|
|
if (plen <= 0 ||
|
|
(plen % sizeof(struct linux_prom_pci_registers)) != 0) {
|
|
printk("%s: OBP node %x reg property has bad len %d\n",
|
|
pbm->name, cnode, plen);
|
|
goto fail;
|
|
}
|
|
|
|
hi = reg[0].phys_hi & pbm->pbm_intmask.phys_hi;
|
|
mid = reg[0].phys_mid & pbm->pbm_intmask.phys_mid;
|
|
lo = reg[0].phys_lo & pbm->pbm_intmask.phys_lo;
|
|
irq = *interrupt & pbm->pbm_intmask.interrupt;
|
|
|
|
for (i = 0; i < pbm->num_pbm_intmap; i++) {
|
|
struct linux_prom_pci_intmap *intmap;
|
|
|
|
intmap = &pbm->pbm_intmap[i];
|
|
|
|
if (intmap->phys_hi == hi &&
|
|
intmap->phys_mid == mid &&
|
|
intmap->phys_lo == lo &&
|
|
intmap->interrupt == irq) {
|
|
*interrupt = intmap->cinterrupt;
|
|
goto success;
|
|
}
|
|
}
|
|
|
|
fail:
|
|
return 0;
|
|
|
|
success:
|
|
printk("PCI-IRQ: Routing bus[%2x] slot[%2x] to INO[%02x]\n",
|
|
pdev->bus->number, PCI_SLOT(pdev->devfn),
|
|
*interrupt);
|
|
return 1;
|
|
}
|
|
|
|
static void __init pdev_fixup_irq(struct pci_dev *pdev)
|
|
{
|
|
struct pcidev_cookie *pcp = pdev->sysdata;
|
|
struct pci_pbm_info *pbm = pcp->pbm;
|
|
struct pci_controller_info *p = pbm->parent;
|
|
unsigned int portid = pbm->portid;
|
|
unsigned int prom_irq;
|
|
int prom_node = pcp->prom_node;
|
|
int err;
|
|
|
|
/* If this is an empty EBUS device, sometimes OBP fails to
|
|
* give it a valid fully specified interrupts property.
|
|
* The EBUS hooked up to SunHME on PCI I/O boards of
|
|
* Ex000 systems is one such case.
|
|
*
|
|
* The interrupt is not important so just ignore it.
|
|
*/
|
|
if (pdev->vendor == PCI_VENDOR_ID_SUN &&
|
|
pdev->device == PCI_DEVICE_ID_SUN_EBUS &&
|
|
!prom_getchild(prom_node)) {
|
|
pdev->irq = 0;
|
|
return;
|
|
}
|
|
|
|
err = prom_getproperty(prom_node, "interrupts",
|
|
(char *)&prom_irq, sizeof(prom_irq));
|
|
if (err == 0 || err == -1) {
|
|
pdev->irq = 0;
|
|
return;
|
|
}
|
|
|
|
if (tlb_type != hypervisor) {
|
|
/* Fully specified already? */
|
|
if (((prom_irq & PCI_IRQ_IGN) >> 6) == portid) {
|
|
pdev->irq = p->irq_build(pbm, pdev, prom_irq);
|
|
goto have_irq;
|
|
}
|
|
|
|
/* An onboard device? (bit 5 set) */
|
|
if ((prom_irq & PCI_IRQ_INO) & 0x20) {
|
|
pdev->irq = p->irq_build(pbm, pdev, (portid << 6 | prom_irq));
|
|
goto have_irq;
|
|
}
|
|
}
|
|
|
|
/* Can we find a matching entry in the interrupt-map? */
|
|
if (pci_intmap_match(pdev, &prom_irq)) {
|
|
pdev->irq = p->irq_build(pbm, pdev, (portid << 6) | prom_irq);
|
|
goto have_irq;
|
|
}
|
|
|
|
/* Ok, we have to do it the hard way. */
|
|
{
|
|
unsigned int bus, slot, line;
|
|
|
|
bus = (pbm == &pbm->parent->pbm_B) ? (1 << 4) : 0;
|
|
|
|
/* If we have a legal interrupt property, use it as
|
|
* the IRQ line.
|
|
*/
|
|
if (prom_irq > 0 && prom_irq < 5) {
|
|
line = ((prom_irq - 1) & 3);
|
|
} else {
|
|
u8 pci_irq_line;
|
|
|
|
/* Else just directly consult PCI config space. */
|
|
pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pci_irq_line);
|
|
line = ((pci_irq_line - 1) & 3);
|
|
}
|
|
|
|
/* Now figure out the slot.
|
|
*
|
|
* Basically, device number zero on the top-level bus is
|
|
* always the PCI host controller. Slot 0 is then device 1.
|
|
* PBM A supports two external slots (0 and 1), and PBM B
|
|
* supports 4 external slots (0, 1, 2, and 3). On-board PCI
|
|
* devices are wired to device numbers outside of these
|
|
* ranges. -DaveM
|
|
*/
|
|
if (pdev->bus->number == pbm->pci_first_busno) {
|
|
slot = PCI_SLOT(pdev->devfn) - pbm->pci_first_slot;
|
|
} else {
|
|
struct pci_dev *bus_dev;
|
|
|
|
/* Underneath a bridge, use slot number of parent
|
|
* bridge which is closest to the PBM.
|
|
*/
|
|
bus_dev = pdev->bus->self;
|
|
while (bus_dev->bus &&
|
|
bus_dev->bus->number != pbm->pci_first_busno)
|
|
bus_dev = bus_dev->bus->self;
|
|
|
|
slot = PCI_SLOT(bus_dev->devfn) - pbm->pci_first_slot;
|
|
}
|
|
slot = slot << 2;
|
|
|
|
pdev->irq = p->irq_build(pbm, pdev,
|
|
((portid << 6) & PCI_IRQ_IGN) |
|
|
(bus | slot | line));
|
|
}
|
|
|
|
have_irq:
|
|
pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
|
|
pdev->irq & PCI_IRQ_INO);
|
|
}
|
|
|
|
void __init pci_fixup_irq(struct pci_pbm_info *pbm,
|
|
struct pci_bus *pbus)
|
|
{
|
|
struct pci_dev *dev;
|
|
struct pci_bus *bus;
|
|
|
|
list_for_each_entry(dev, &pbus->devices, bus_list)
|
|
pdev_fixup_irq(dev);
|
|
|
|
list_for_each_entry(bus, &pbus->children, node)
|
|
pci_fixup_irq(pbm, bus);
|
|
}
|
|
|
|
static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz)
|
|
{
|
|
u16 cmd;
|
|
u8 hdr_type, min_gnt, ltimer;
|
|
|
|
pci_read_config_word(pdev, PCI_COMMAND, &cmd);
|
|
cmd |= PCI_COMMAND_MASTER;
|
|
pci_write_config_word(pdev, PCI_COMMAND, cmd);
|
|
|
|
/* Read it back, if the mastering bit did not
|
|
* get set, the device does not support bus
|
|
* mastering so we have nothing to do here.
|
|
*/
|
|
pci_read_config_word(pdev, PCI_COMMAND, &cmd);
|
|
if ((cmd & PCI_COMMAND_MASTER) == 0)
|
|
return;
|
|
|
|
/* Set correct cache line size, 64-byte on all
|
|
* Sparc64 PCI systems. Note that the value is
|
|
* measured in 32-bit words.
|
|
*/
|
|
pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
|
|
64 / sizeof(u32));
|
|
|
|
pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type);
|
|
hdr_type &= ~0x80;
|
|
if (hdr_type != PCI_HEADER_TYPE_NORMAL)
|
|
return;
|
|
|
|
/* If the latency timer is already programmed with a non-zero
|
|
* value, assume whoever set it (OBP or whoever) knows what
|
|
* they are doing.
|
|
*/
|
|
pci_read_config_byte(pdev, PCI_LATENCY_TIMER, <imer);
|
|
if (ltimer != 0)
|
|
return;
|
|
|
|
/* XXX Since I'm tipping off the min grant value to
|
|
* XXX choose a suitable latency timer value, I also
|
|
* XXX considered making use of the max latency value
|
|
* XXX as well. Unfortunately I've seen too many bogusly
|
|
* XXX low settings for it to the point where it lacks
|
|
* XXX any usefulness. In one case, an ethernet card
|
|
* XXX claimed a min grant of 10 and a max latency of 5.
|
|
* XXX Now, if I had two such cards on the same bus I
|
|
* XXX could not set the desired burst period (calculated
|
|
* XXX from min grant) without violating the max latency
|
|
* XXX bound. Duh...
|
|
* XXX
|
|
* XXX I blame dumb PC bios implementors for stuff like
|
|
* XXX this, most of them don't even try to do something
|
|
* XXX sensible with latency timer values and just set some
|
|
* XXX default value (usually 32) into every device.
|
|
*/
|
|
|
|
pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt);
|
|
|
|
if (min_gnt == 0) {
|
|
/* If no min_gnt setting then use a default
|
|
* value.
|
|
*/
|
|
if (is_66mhz)
|
|
ltimer = 16;
|
|
else
|
|
ltimer = 32;
|
|
} else {
|
|
int shift_factor;
|
|
|
|
if (is_66mhz)
|
|
shift_factor = 2;
|
|
else
|
|
shift_factor = 3;
|
|
|
|
/* Use a default value when the min_gnt value
|
|
* is erroneously high.
|
|
*/
|
|
if (((unsigned int) min_gnt << shift_factor) > 512 ||
|
|
((min_gnt << shift_factor) & 0xff) == 0) {
|
|
ltimer = 8 << shift_factor;
|
|
} else {
|
|
ltimer = min_gnt << shift_factor;
|
|
}
|
|
}
|
|
|
|
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer);
|
|
}
|
|
|
|
void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
|
|
struct pci_bus *pbus)
|
|
{
|
|
struct pci_dev *pdev;
|
|
int all_are_66mhz;
|
|
u16 status;
|
|
|
|
if (pbm->is_66mhz_capable == 0) {
|
|
all_are_66mhz = 0;
|
|
goto out;
|
|
}
|
|
|
|
all_are_66mhz = 1;
|
|
list_for_each_entry(pdev, &pbus->devices, bus_list) {
|
|
pci_read_config_word(pdev, PCI_STATUS, &status);
|
|
if (!(status & PCI_STATUS_66MHZ)) {
|
|
all_are_66mhz = 0;
|
|
break;
|
|
}
|
|
}
|
|
out:
|
|
pbm->all_devs_66mhz = all_are_66mhz;
|
|
|
|
printk("PCI%d(PBM%c): Bus running at %dMHz\n",
|
|
pbm->parent->index,
|
|
(pbm == &pbm->parent->pbm_A) ? 'A' : 'B',
|
|
(all_are_66mhz ? 66 : 33));
|
|
}
|
|
|
|
void pci_setup_busmastering(struct pci_pbm_info *pbm,
|
|
struct pci_bus *pbus)
|
|
{
|
|
struct pci_dev *dev;
|
|
struct pci_bus *bus;
|
|
int is_66mhz;
|
|
|
|
is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz;
|
|
|
|
list_for_each_entry(dev, &pbus->devices, bus_list)
|
|
pdev_setup_busmastering(dev, is_66mhz);
|
|
|
|
list_for_each_entry(bus, &pbus->children, node)
|
|
pci_setup_busmastering(pbm, bus);
|
|
}
|
|
|
|
void pci_register_legacy_regions(struct resource *io_res,
|
|
struct resource *mem_res)
|
|
{
|
|
struct resource *p;
|
|
|
|
/* VGA Video RAM. */
|
|
p = kzalloc(sizeof(*p), GFP_KERNEL);
|
|
if (!p)
|
|
return;
|
|
|
|
p->name = "Video RAM area";
|
|
p->start = mem_res->start + 0xa0000UL;
|
|
p->end = p->start + 0x1ffffUL;
|
|
p->flags = IORESOURCE_BUSY;
|
|
request_resource(mem_res, p);
|
|
|
|
p = kzalloc(sizeof(*p), GFP_KERNEL);
|
|
if (!p)
|
|
return;
|
|
|
|
p->name = "System ROM";
|
|
p->start = mem_res->start + 0xf0000UL;
|
|
p->end = p->start + 0xffffUL;
|
|
p->flags = IORESOURCE_BUSY;
|
|
request_resource(mem_res, p);
|
|
|
|
p = kzalloc(sizeof(*p), GFP_KERNEL);
|
|
if (!p)
|
|
return;
|
|
|
|
p->name = "Video ROM";
|
|
p->start = mem_res->start + 0xc0000UL;
|
|
p->end = p->start + 0x7fffUL;
|
|
p->flags = IORESOURCE_BUSY;
|
|
request_resource(mem_res, p);
|
|
}
|
|
|
|
/* Generic helper routines for PCI error reporting. */
|
|
void pci_scan_for_target_abort(struct pci_controller_info *p,
|
|
struct pci_pbm_info *pbm,
|
|
struct pci_bus *pbus)
|
|
{
|
|
struct pci_dev *pdev;
|
|
struct pci_bus *bus;
|
|
|
|
list_for_each_entry(pdev, &pbus->devices, bus_list) {
|
|
u16 status, error_bits;
|
|
|
|
pci_read_config_word(pdev, PCI_STATUS, &status);
|
|
error_bits =
|
|
(status & (PCI_STATUS_SIG_TARGET_ABORT |
|
|
PCI_STATUS_REC_TARGET_ABORT));
|
|
if (error_bits) {
|
|
pci_write_config_word(pdev, PCI_STATUS, error_bits);
|
|
printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n",
|
|
p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
|
|
pci_name(pdev), status);
|
|
}
|
|
}
|
|
|
|
list_for_each_entry(bus, &pbus->children, node)
|
|
pci_scan_for_target_abort(p, pbm, bus);
|
|
}
|
|
|
|
void pci_scan_for_master_abort(struct pci_controller_info *p,
|
|
struct pci_pbm_info *pbm,
|
|
struct pci_bus *pbus)
|
|
{
|
|
struct pci_dev *pdev;
|
|
struct pci_bus *bus;
|
|
|
|
list_for_each_entry(pdev, &pbus->devices, bus_list) {
|
|
u16 status, error_bits;
|
|
|
|
pci_read_config_word(pdev, PCI_STATUS, &status);
|
|
error_bits =
|
|
(status & (PCI_STATUS_REC_MASTER_ABORT));
|
|
if (error_bits) {
|
|
pci_write_config_word(pdev, PCI_STATUS, error_bits);
|
|
printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n",
|
|
p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
|
|
pci_name(pdev), status);
|
|
}
|
|
}
|
|
|
|
list_for_each_entry(bus, &pbus->children, node)
|
|
pci_scan_for_master_abort(p, pbm, bus);
|
|
}
|
|
|
|
void pci_scan_for_parity_error(struct pci_controller_info *p,
|
|
struct pci_pbm_info *pbm,
|
|
struct pci_bus *pbus)
|
|
{
|
|
struct pci_dev *pdev;
|
|
struct pci_bus *bus;
|
|
|
|
list_for_each_entry(pdev, &pbus->devices, bus_list) {
|
|
u16 status, error_bits;
|
|
|
|
pci_read_config_word(pdev, PCI_STATUS, &status);
|
|
error_bits =
|
|
(status & (PCI_STATUS_PARITY |
|
|
PCI_STATUS_DETECTED_PARITY));
|
|
if (error_bits) {
|
|
pci_write_config_word(pdev, PCI_STATUS, error_bits);
|
|
printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n",
|
|
p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
|
|
pci_name(pdev), status);
|
|
}
|
|
}
|
|
|
|
list_for_each_entry(bus, &pbus->children, node)
|
|
pci_scan_for_parity_error(p, pbm, bus);
|
|
}
|