862ceabb46
This adds new device tree bindings for the timer IP block of TI DaVinci-like SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
38 lines
1.4 KiB
Plaintext
38 lines
1.4 KiB
Plaintext
* Device tree bindings for Texas Instruments DaVinci timer
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This document provides bindings for the 64-bit timer in the DaVinci
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architecture devices. The timer can be configured as a general-purpose 64-bit
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timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
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timers, each half can operate in conjunction (chain mode) or independently
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(unchained mode) of each other.
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The timer is a free running up-counter and can generate interrupts when the
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counter reaches preset counter values.
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Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
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watchdog timers.
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Required properties:
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- compatible : should be "ti,da830-timer".
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- reg : specifies base physical address and count of the registers.
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- interrupts : interrupts generated by the timer.
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- interrupt-names: should be "tint12", "tint34", "cmpint0", "cmpint1",
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"cmpint2", "cmpint3", "cmpint4", "cmpint5", "cmpint6",
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"cmpint7" ("cmpintX" may be omitted if not present in the
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hardware).
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- clocks : the clock feeding the timer clock.
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Example:
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clocksource: timer@20000 {
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compatible = "ti,da830-timer";
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reg = <0x20000 0x1000>;
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interrupts = <21>, <22>, <74>, <75>, <76>, <77>, <78>, <79>,
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<80>, <81>;
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interrupt-names = "tint12", "tint34", "cmpint0", "cmpint1",
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"cmpint2", "cmpint3", "cmpint4", "cmpint5",
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"cmpint6", "cmpint7";
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clocks = <&pll0_auxclk>;
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};
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