2359ccddc1
Bindings are supposed to be organized by device class/function. Move bindings for various timers to timer/ binding directory. Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
45 lines
1.6 KiB
Plaintext
45 lines
1.6 KiB
Plaintext
OMAP Timer bindings
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Required properties:
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- compatible: Should be set to one of the below. Please note that
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OMAP44xx devices have timer instances that are 100%
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register compatible with OMAP3xxx devices as well as
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newer timers that are not 100% register compatible.
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So for OMAP44xx devices timer instances may use
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different compatible strings.
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ti,omap2420-timer (applicable to OMAP24xx devices)
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ti,omap3430-timer (applicable to OMAP3xxx/44xx devices)
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ti,omap4430-timer (applicable to OMAP44xx devices)
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ti,omap5430-timer (applicable to OMAP543x devices)
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ti,am335x-timer (applicable to AM335x devices)
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ti,am335x-timer-1ms (applicable to AM335x devices)
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- reg: Contains timer register address range (base address and
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length).
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- interrupts: Contains the interrupt information for the timer. The
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format is being dependent on which interrupt controller
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the OMAP device uses.
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- ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
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where <X> is the instance number of the timer from the
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HW spec.
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Optional properties:
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- ti,timer-alwon: Indicates the timer is in an alway-on power domain.
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- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
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addition to the ARM CPU.
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- ti,timer-pwm: Indicates the timer can generate a PWM output.
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- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
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and therefore cannot be used by the kernel.
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Example:
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timer12: timer@48304000 {
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compatible = "ti,omap3430-timer";
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reg = <0x48304000 0x400>;
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interrupts = <95>;
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ti,hwmods = "timer12"
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ti,timer-alwon;
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ti,timer-secure;
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};
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