e183914af0
A lot of asm-optimized routines in arch/x86/crypto/ keep its
constants in .data. This is wrong, they should be on .rodata.
Mnay of these constants are the same in different modules.
For example, 128-bit shuffle mask 0x000102030405060708090A0B0C0D0E0F
exists in at least half a dozen places.
There is a way to let linker merge them and use just one copy.
The rules are as follows: mergeable objects of different sizes
should not share sections. You can't put them all in one .rodata
section, they will lose "mergeability".
GCC puts its mergeable constants in ".rodata.cstSIZE" sections,
or ".rodata.cstSIZE.<object_name>" if -fdata-sections is used.
This patch does the same:
.section .rodata.cst16.SHUF_MASK, "aM", @progbits, 16
It is important that all data in such section consists of
16-byte elements, not larger ones, and there are no implicit
use of one element from another.
When this is not the case, use non-mergeable section:
.section .rodata[.VAR_NAME], "a", @progbits
This reduces .data by ~15 kbytes:
text data bss dec hex filename
11097415 2705840 2630712 16433967 fac32f vmlinux-prev.o
11112095 2690672 2630712 16433479 fac147 vmlinux.o
Merged objects are visible in System.map:
ffffffff81a28810 r POLY
ffffffff81a28810 r POLY
ffffffff81a28820 r TWOONE
ffffffff81a28820 r TWOONE
ffffffff81a28830 r PSHUFFLE_BYTE_FLIP_MASK <- merged regardless of
ffffffff81a28830 r SHUF_MASK <------------- the name difference
ffffffff81a28830 r SHUF_MASK
ffffffff81a28830 r SHUF_MASK
..
ffffffff81a28d00 r K512 <- merged three identical 640-byte tables
ffffffff81a28d00 r K512
ffffffff81a28d00 r K512
Use of object names in section name suffixes is not strictly necessary,
but might help if someday link stage will use garbage collection
to eliminate unused sections (ld --gc-sections).
Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
CC: Herbert Xu <herbert@gondor.apana.org.au>
CC: Josh Poimboeuf <jpoimboe@redhat.com>
CC: Xiaodong Liu <xiaodong.liu@intel.com>
CC: Megha Dey <megha.dey@intel.com>
CC: linux-crypto@vger.kernel.org
CC: x86@kernel.org
CC: linux-kernel@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
210 lines
6 KiB
ArmAsm
210 lines
6 KiB
ArmAsm
/*
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* Buffer submit code for multi buffer SHA1 algorithm
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Contact Information:
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* James Guilford <james.guilford@intel.com>
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* Tim Chen <tim.c.chen@linux.intel.com>
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*
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* BSD LICENSE
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*
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* Copyright(c) 2014 Intel Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/linkage.h>
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#include <asm/frame.h>
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#include "sha1_mb_mgr_datastruct.S"
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.extern sha1_x8_avx
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# LINUX register definitions
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arg1 = %rdi
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arg2 = %rsi
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size_offset = %rcx
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tmp2 = %rcx
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extra_blocks = %rdx
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# Common definitions
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#define state arg1
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#define job %rsi
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#define len2 arg2
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#define p2 arg2
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# idx must be a register not clobberred by sha1_x8_avx2
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idx = %r8
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DWORD_idx = %r8d
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last_len = %r8
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p = %r11
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start_offset = %r11
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unused_lanes = %rbx
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BYTE_unused_lanes = %bl
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job_rax = %rax
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len = %rax
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DWORD_len = %eax
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lane = %r12
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tmp3 = %r12
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tmp = %r9
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DWORD_tmp = %r9d
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lane_data = %r10
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# JOB* submit_mb_mgr_submit_avx2(MB_MGR *state, job_sha1 *job)
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# arg 1 : rcx : state
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# arg 2 : rdx : job
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ENTRY(sha1_mb_mgr_submit_avx2)
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FRAME_BEGIN
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push %rbx
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push %r12
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mov _unused_lanes(state), unused_lanes
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mov unused_lanes, lane
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and $0xF, lane
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shr $4, unused_lanes
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imul $_LANE_DATA_size, lane, lane_data
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movl $STS_BEING_PROCESSED, _status(job)
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lea _ldata(state, lane_data), lane_data
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mov unused_lanes, _unused_lanes(state)
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movl _len(job), DWORD_len
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mov job, _job_in_lane(lane_data)
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shl $4, len
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or lane, len
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movl DWORD_len, _lens(state , lane, 4)
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# Load digest words from result_digest
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vmovdqu _result_digest(job), %xmm0
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mov _result_digest+1*16(job), DWORD_tmp
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vmovd %xmm0, _args_digest(state, lane, 4)
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vpextrd $1, %xmm0, _args_digest+1*32(state , lane, 4)
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vpextrd $2, %xmm0, _args_digest+2*32(state , lane, 4)
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vpextrd $3, %xmm0, _args_digest+3*32(state , lane, 4)
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movl DWORD_tmp, _args_digest+4*32(state , lane, 4)
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mov _buffer(job), p
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mov p, _args_data_ptr(state, lane, 8)
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cmp $0xF, unused_lanes
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jne return_null
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start_loop:
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# Find min length
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vmovdqa _lens(state), %xmm0
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vmovdqa _lens+1*16(state), %xmm1
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vpminud %xmm1, %xmm0, %xmm2 # xmm2 has {D,C,B,A}
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vpalignr $8, %xmm2, %xmm3, %xmm3 # xmm3 has {x,x,D,C}
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vpminud %xmm3, %xmm2, %xmm2 # xmm2 has {x,x,E,F}
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vpalignr $4, %xmm2, %xmm3, %xmm3 # xmm3 has {x,x,x,E}
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vpminud %xmm3, %xmm2, %xmm2 # xmm2 has min value in low dword
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vmovd %xmm2, DWORD_idx
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mov idx, len2
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and $0xF, idx
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shr $4, len2
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jz len_is_0
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vpand clear_low_nibble(%rip), %xmm2, %xmm2
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vpshufd $0, %xmm2, %xmm2
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vpsubd %xmm2, %xmm0, %xmm0
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vpsubd %xmm2, %xmm1, %xmm1
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vmovdqa %xmm0, _lens + 0*16(state)
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vmovdqa %xmm1, _lens + 1*16(state)
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# "state" and "args" are the same address, arg1
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# len is arg2
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call sha1_x8_avx2
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# state and idx are intact
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len_is_0:
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# process completed job "idx"
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imul $_LANE_DATA_size, idx, lane_data
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lea _ldata(state, lane_data), lane_data
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mov _job_in_lane(lane_data), job_rax
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mov _unused_lanes(state), unused_lanes
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movq $0, _job_in_lane(lane_data)
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movl $STS_COMPLETED, _status(job_rax)
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shl $4, unused_lanes
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or idx, unused_lanes
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mov unused_lanes, _unused_lanes(state)
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movl $0xFFFFFFFF, _lens(state, idx, 4)
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vmovd _args_digest(state, idx, 4), %xmm0
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vpinsrd $1, _args_digest+1*32(state , idx, 4), %xmm0, %xmm0
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vpinsrd $2, _args_digest+2*32(state , idx, 4), %xmm0, %xmm0
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vpinsrd $3, _args_digest+3*32(state , idx, 4), %xmm0, %xmm0
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movl _args_digest+4*32(state, idx, 4), DWORD_tmp
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vmovdqu %xmm0, _result_digest(job_rax)
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movl DWORD_tmp, _result_digest+1*16(job_rax)
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return:
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pop %r12
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pop %rbx
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FRAME_END
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ret
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return_null:
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xor job_rax, job_rax
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jmp return
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ENDPROC(sha1_mb_mgr_submit_avx2)
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.section .rodata.cst16.clear_low_nibble, "aM", @progbits, 16
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.align 16
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clear_low_nibble:
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.octa 0x000000000000000000000000FFFFFFF0
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