d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Device driver for regulators in hi655x IC
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*
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* Copyright (c) 2016 Hisilicon.
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*
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* Authors:
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* Chen Feng <puck.chen@hisilicon.com>
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* Fei Wang <w.f@huawei.com>
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*/
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#ifndef __HI655X_PMIC_H
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#define __HI655X_PMIC_H
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/* Hi655x registers are mapped to memory bus in 4 bytes stride */
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#define HI655X_STRIDE 4
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#define HI655X_BUS_ADDR(x) ((x) << 2)
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#define HI655X_BITS 8
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#define HI655X_NR_IRQ 32
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#define HI655X_IRQ_STAT_BASE (0x003 << 2)
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#define HI655X_IRQ_MASK_BASE (0x007 << 2)
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#define HI655X_ANA_IRQM_BASE (0x1b5 << 2)
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#define HI655X_IRQ_ARRAY 4
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#define HI655X_IRQ_MASK 0xFF
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#define HI655X_IRQ_CLR 0xFF
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#define HI655X_VER_REG 0x00
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#define PMU_VER_START 0x10
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#define PMU_VER_END 0x38
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#define RESERVE_INT 7
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#define PWRON_D20R_INT 6
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#define PWRON_D20F_INT 5
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#define PWRON_D4SR_INT 4
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#define VSYS_6P0_D200UR_INT 3
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#define VSYS_UV_D3R_INT 2
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#define VSYS_2P5_R_INT 1
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#define OTMP_D1R_INT 0
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#define RESERVE_INT_MASK BIT(RESERVE_INT)
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#define PWRON_D20R_INT_MASK BIT(PWRON_D20R_INT)
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#define PWRON_D20F_INT_MASK BIT(PWRON_D20F_INT)
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#define PWRON_D4SR_INT_MASK BIT(PWRON_D4SR_INT)
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#define VSYS_6P0_D200UR_INT_MASK BIT(VSYS_6P0_D200UR_INT)
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#define VSYS_UV_D3R_INT_MASK BIT(VSYS_UV_D3R_INT)
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#define VSYS_2P5_R_INT_MASK BIT(VSYS_2P5_R_INT)
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#define OTMP_D1R_INT_MASK BIT(OTMP_D1R_INT)
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struct hi655x_pmic {
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struct resource *res;
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struct device *dev;
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struct regmap *regmap;
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int gpio;
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unsigned int ver;
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struct regmap_irq_chip_data *irq_data;
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};
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#endif
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