45736a72fb
This patch adds framework code to handle parsing PMU data out of the MADT, sanity checking this, and managing the association of CPUs (and their interrupts) with appropriate logical PMUs. For the time being, we expect that only one PMU driver (PMUv3) will make use of this, and we simply pass in a single probe function. This is based on an earlier patch from Jeremy Linton. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Jeremy Linton <jeremy.linton@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
46 lines
1.2 KiB
Plaintext
46 lines
1.2 KiB
Plaintext
#
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# Performance Monitor Drivers
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#
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menu "Performance monitor support"
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config ARM_PMU
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depends on PERF_EVENTS && (ARM || ARM64)
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bool "ARM PMU framework"
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default y
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help
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Say y if you want to use CPU performance monitors on ARM-based
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systems.
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config ARM_PMU_ACPI
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depends on ARM_PMU && ACPI
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def_bool y
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config QCOM_L2_PMU
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bool "Qualcomm Technologies L2-cache PMU"
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depends on ARCH_QCOM && ARM64 && PERF_EVENTS && ACPI
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help
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Provides support for the L2 cache performance monitor unit (PMU)
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in Qualcomm Technologies processors.
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Adds the L2 cache PMU into the perf events subsystem for
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monitoring L2 cache events.
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config QCOM_L3_PMU
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bool "Qualcomm Technologies L3-cache PMU"
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depends on ARCH_QCOM && ARM64 && PERF_EVENTS && ACPI
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select QCOM_IRQ_COMBINER
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help
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Provides support for the L3 cache performance monitor unit (PMU)
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in Qualcomm Technologies processors.
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Adds the L3 cache PMU into the perf events subsystem for
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monitoring L3 cache events.
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config XGENE_PMU
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depends on PERF_EVENTS && ARCH_XGENE
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bool "APM X-Gene SoC PMU"
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default n
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help
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Say y if you want to use APM X-Gene SoC performance monitors.
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endmenu
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