![Linus Torvalds](/assets/img/avatar_default.png)
The I.MX platform is getting converted to use sparse IRQs. We are doing this for all platforms over time, because this is one of the requirements for building a multiplatform kernel, and generally a good idea. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUAUA2dgGCrR//JCVInAQJOJRAA4xWh3CUqpuJ13yk2tOBcGU9+orer93fP U3DAG6jJ75blQzfA9wBoWPjqFhJo76ZtLFA9comkGI4vH8nTNNbXr1ZNt2/PjOGS PqZIYJk/f5QqOzCd10V5bK4EVFR/mjvQ8sBP8qfaHII0GVPomfa8jnXnFnLFjreX hhucTCf4z2HBvIjfOiilPtJbFpdrQ9oquM4W4Go1lrMZMU8B+Z3ClqytoxYW2Bw3 uQ0EzFlAwaXZ1CMcDn4eQJxNt8dO4SbGI7AHd3HmW3tFaaJC9dpey/7pIoW3gyz8 2e3wrdHXCAYq3sUlwzIrROCcBfW502E+KUmDi8ePT7zgZmxAmrqRCTNEqwaaGYrS Q/mk+Kpnjvtl6w21ss1LxNHP18TNL/f8isYW9vUQG8yogWlVin6NhPvNQXDDBWoD lfAyeL5JSoVxVGxft8EhLI/inPKBnWe2heE+zrRGQzUhTuUSyspmwK6o3b7JYNTX 16fY6OhW90CaZm6r1yKZsiE96Dd63oL4OVFELsgPQdsBNdWeKmOjs6fq46Bp0Hdf SAQ543yabPkDr4ZanaNqo0s3Vu2xVnvBS4FR0gbx6+LGuagkmBpSkYnlhgNJBbdK 6D5GCRoX0ayzJvg29kKzek2h8NhGtDco4dr7K5Hl9NebeZ++CjZ7xTbFQN6olt+D 8CcIdD2J0PY= =Y2Sm -----END PGP SIGNATURE----- Merge tag 'irq' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull arm-soc sparse IRQ conversion from Arnd Bergmann: "The I.MX platform is getting converted to use sparse IRQs. We are doing this for all platforms over time, because this is one of the requirements for building a multiplatform kernel, and generally a good idea." * tag 'irq' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: imx: select USE_OF ARM: imx: Fix build error due to missing irqs.h include ARM: imx: enable SPARSE_IRQ for imx platform ARM: fiq: change FIQ_START to a variable tty: serial: imx: remove the use of MXC_INTERNAL_IRQS ARM: imx: remove unneeded mach/irq.h inclusion i2c: imx: remove unneeded mach/irqs.h inclusion ARM: imx: add a legacy irqdomain for mx31ads ARM: imx: add a legacy irqdomain for 3ds_debugboard ARM: imx: pass gpio than irq number into mxc_expio_init ARM: imx: leave irq_base of wm8350_platform_data uninitialized dma: ipu: remove the use of ipu_platform_data ARM: imx: move irq_domain_add_legacy call into avic driver ARM: imx: move irq_domain_add_legacy call into tzic driver gpio/mxc: move irq_domain_add_legacy call into gpio driver ARM: imx: eliminate macro IRQ_GPIOx() ARM: imx: eliminate macro IOMUX_TO_IRQ() ARM: imx: eliminate macro IMX_GPIO_TO_IRQ()
788 lines
20 KiB
C
788 lines
20 KiB
C
/*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/mc13783.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/l4f00242t03.h>
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#include <linux/regulator/machine.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/ulpi.h>
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#include <linux/memblock.h>
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#include <media/soc_camera.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/memory.h>
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#include <asm/mach/map.h>
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#include <asm/memblock.h>
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#include <mach/common.h>
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#include <mach/iomux-mx3.h>
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#include <mach/3ds_debugboard.h>
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#include <mach/ulpi.h>
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#include "devices-imx31.h"
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static int mx31_3ds_pins[] = {
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/* UART1 */
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MX31_PIN_CTS1__CTS1,
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MX31_PIN_RTS1__RTS1,
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MX31_PIN_TXD1__TXD1,
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MX31_PIN_RXD1__RXD1,
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IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
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/*SPI0*/
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IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1),
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/* SPI 1 */
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MX31_PIN_CSPI2_SCLK__SCLK,
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MX31_PIN_CSPI2_MOSI__MOSI,
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MX31_PIN_CSPI2_MISO__MISO,
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MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
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MX31_PIN_CSPI2_SS0__SS0,
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MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
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/* MC13783 IRQ */
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IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
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/* USB OTG reset */
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IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
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/* USB OTG */
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MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
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MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
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MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
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MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
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MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
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MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
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MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
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MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
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MX31_PIN_USBOTG_CLK__USBOTG_CLK,
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MX31_PIN_USBOTG_DIR__USBOTG_DIR,
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MX31_PIN_USBOTG_NXT__USBOTG_NXT,
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MX31_PIN_USBOTG_STP__USBOTG_STP,
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/*Keyboard*/
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MX31_PIN_KEY_ROW0_KEY_ROW0,
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MX31_PIN_KEY_ROW1_KEY_ROW1,
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MX31_PIN_KEY_ROW2_KEY_ROW2,
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MX31_PIN_KEY_COL0_KEY_COL0,
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MX31_PIN_KEY_COL1_KEY_COL1,
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MX31_PIN_KEY_COL2_KEY_COL2,
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MX31_PIN_KEY_COL3_KEY_COL3,
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/* USB Host 2 */
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IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
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/* USB Host2 reset */
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IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
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/* I2C1 */
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MX31_PIN_I2C_CLK__I2C1_SCL,
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MX31_PIN_I2C_DAT__I2C1_SDA,
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/* SDHC1 */
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MX31_PIN_SD1_DATA3__SD1_DATA3,
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MX31_PIN_SD1_DATA2__SD1_DATA2,
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MX31_PIN_SD1_DATA1__SD1_DATA1,
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MX31_PIN_SD1_DATA0__SD1_DATA0,
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MX31_PIN_SD1_CLK__SD1_CLK,
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MX31_PIN_SD1_CMD__SD1_CMD,
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MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
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MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
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/* Framebuffer */
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MX31_PIN_LD0__LD0,
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MX31_PIN_LD1__LD1,
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MX31_PIN_LD2__LD2,
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MX31_PIN_LD3__LD3,
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MX31_PIN_LD4__LD4,
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MX31_PIN_LD5__LD5,
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MX31_PIN_LD6__LD6,
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MX31_PIN_LD7__LD7,
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MX31_PIN_LD8__LD8,
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MX31_PIN_LD9__LD9,
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MX31_PIN_LD10__LD10,
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MX31_PIN_LD11__LD11,
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MX31_PIN_LD12__LD12,
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MX31_PIN_LD13__LD13,
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MX31_PIN_LD14__LD14,
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MX31_PIN_LD15__LD15,
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MX31_PIN_LD16__LD16,
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MX31_PIN_LD17__LD17,
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MX31_PIN_VSYNC3__VSYNC3,
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MX31_PIN_HSYNC__HSYNC,
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MX31_PIN_FPSHIFT__FPSHIFT,
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MX31_PIN_CONTRAST__CONTRAST,
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/* CSI */
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MX31_PIN_CSI_D6__CSI_D6,
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MX31_PIN_CSI_D7__CSI_D7,
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MX31_PIN_CSI_D8__CSI_D8,
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MX31_PIN_CSI_D9__CSI_D9,
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MX31_PIN_CSI_D10__CSI_D10,
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MX31_PIN_CSI_D11__CSI_D11,
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MX31_PIN_CSI_D12__CSI_D12,
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MX31_PIN_CSI_D13__CSI_D13,
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MX31_PIN_CSI_D14__CSI_D14,
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MX31_PIN_CSI_D15__CSI_D15,
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MX31_PIN_CSI_HSYNC__CSI_HSYNC,
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MX31_PIN_CSI_MCLK__CSI_MCLK,
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MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
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MX31_PIN_CSI_VSYNC__CSI_VSYNC,
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MX31_PIN_CSI_D5__GPIO3_5, /* CMOS PWDN */
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IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_GPIO), /* CMOS reset */
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/* SSI */
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MX31_PIN_STXD4__STXD4,
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MX31_PIN_SRXD4__SRXD4,
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MX31_PIN_SCK4__SCK4,
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MX31_PIN_SFS4__SFS4,
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};
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/*
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* Camera support
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*/
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static phys_addr_t mx3_camera_base __initdata;
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#define MX31_3DS_CAMERA_BUF_SIZE SZ_8M
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#define MX31_3DS_GPIO_CAMERA_PW IOMUX_TO_GPIO(MX31_PIN_CSI_D5)
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#define MX31_3DS_GPIO_CAMERA_RST IOMUX_TO_GPIO(MX31_PIN_RI_DTE1)
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static struct gpio mx31_3ds_camera_gpios[] = {
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{ MX31_3DS_GPIO_CAMERA_PW, GPIOF_OUT_INIT_HIGH, "camera-power" },
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{ MX31_3DS_GPIO_CAMERA_RST, GPIOF_OUT_INIT_HIGH, "camera-reset" },
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};
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static const struct mx3_camera_pdata mx31_3ds_camera_pdata __initconst = {
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.flags = MX3_CAMERA_DATAWIDTH_10,
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.mclk_10khz = 2600,
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};
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static int __init mx31_3ds_init_camera(void)
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{
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int dma, ret = -ENOMEM;
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struct platform_device *pdev =
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imx31_alloc_mx3_camera(&mx31_3ds_camera_pdata);
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if (IS_ERR(pdev))
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return PTR_ERR(pdev);
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if (!mx3_camera_base)
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goto err;
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dma = dma_declare_coherent_memory(&pdev->dev,
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mx3_camera_base, mx3_camera_base,
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MX31_3DS_CAMERA_BUF_SIZE,
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DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
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if (!(dma & DMA_MEMORY_MAP))
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goto err;
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ret = platform_device_add(pdev);
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if (ret)
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err:
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platform_device_put(pdev);
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return ret;
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}
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static int mx31_3ds_camera_power(struct device *dev, int on)
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{
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/* enable or disable the camera */
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pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
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gpio_set_value(MX31_3DS_GPIO_CAMERA_PW, on ? 0 : 1);
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if (!on)
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goto out;
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/* If enabled, give a reset impulse */
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gpio_set_value(MX31_3DS_GPIO_CAMERA_RST, 0);
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msleep(20);
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gpio_set_value(MX31_3DS_GPIO_CAMERA_RST, 1);
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msleep(100);
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out:
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return 0;
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}
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static struct i2c_board_info mx31_3ds_i2c_camera = {
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I2C_BOARD_INFO("ov2640", 0x30),
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};
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static struct regulator_bulk_data mx31_3ds_camera_regs[] = {
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{ .supply = "cmos_vcore" },
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{ .supply = "cmos_2v8" },
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};
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static struct soc_camera_link iclink_ov2640 = {
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.bus_id = 0,
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.board_info = &mx31_3ds_i2c_camera,
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.i2c_adapter_id = 0,
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.power = mx31_3ds_camera_power,
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.regulators = mx31_3ds_camera_regs,
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.num_regulators = ARRAY_SIZE(mx31_3ds_camera_regs),
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};
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static struct platform_device mx31_3ds_ov2640 = {
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.name = "soc-camera-pdrv",
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.id = 0,
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.dev = {
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.platform_data = &iclink_ov2640,
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},
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};
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/*
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* FB support
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*/
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static const struct fb_videomode fb_modedb[] = {
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{ /* 480x640 @ 60 Hz */
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.name = "Epson-VGA",
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.refresh = 60,
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.xres = 480,
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.yres = 640,
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.pixclock = 41701,
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.left_margin = 20,
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.right_margin = 41,
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.upper_margin = 10,
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.lower_margin = 5,
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.hsync_len = 20,
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.vsync_len = 10,
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.sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
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.vmode = FB_VMODE_NONINTERLACED,
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.flag = 0,
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},
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};
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static struct mx3fb_platform_data mx3fb_pdata __initdata = {
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.name = "Epson-VGA",
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.mode = fb_modedb,
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.num_modes = ARRAY_SIZE(fb_modedb),
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};
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/* LCD */
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static struct l4f00242t03_pdata mx31_3ds_l4f00242t03_pdata = {
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.reset_gpio = IOMUX_TO_GPIO(MX31_PIN_LCS1),
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.data_enable_gpio = IOMUX_TO_GPIO(MX31_PIN_SER_RS),
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};
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/*
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* Support for SD card slot in personality board
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*/
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#define MX31_3DS_GPIO_SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
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#define MX31_3DS_GPIO_SDHC1_BE IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
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static struct gpio mx31_3ds_sdhc1_gpios[] = {
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{ MX31_3DS_GPIO_SDHC1_CD, GPIOF_IN, "sdhc1-card-detect" },
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{ MX31_3DS_GPIO_SDHC1_BE, GPIOF_OUT_INIT_LOW, "sdhc1-bus-en" },
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};
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static int mx31_3ds_sdhc1_init(struct device *dev,
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irq_handler_t detect_irq,
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void *data)
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{
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int ret;
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ret = gpio_request_array(mx31_3ds_sdhc1_gpios,
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ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
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if (ret) {
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pr_warning("Unable to request the SD/MMC GPIOs.\n");
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return ret;
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}
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ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)),
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detect_irq, IRQF_DISABLED |
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IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
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"sdhc1-detect", data);
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if (ret) {
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pr_warning("Unable to request the SD/MMC card-detect IRQ.\n");
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goto gpio_free;
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}
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return 0;
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gpio_free:
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gpio_free_array(mx31_3ds_sdhc1_gpios,
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ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
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return ret;
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}
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static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
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{
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free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)), data);
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gpio_free_array(mx31_3ds_sdhc1_gpios,
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ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
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}
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static void mx31_3ds_sdhc1_setpower(struct device *dev, unsigned int vdd)
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{
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/*
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* While the voltage stuff is done by the driver, activate the
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* Buffer Enable Pin only if there is a card in slot to fix the card
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* voltage issue caused by bi-directional chip TXB0108 on 3Stack.
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* Done here because at this stage we have for sure a debounced value
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* of the presence of the card, showed by the value of vdd.
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* 7 == ilog2(MMC_VDD_165_195)
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*/
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if (vdd > 7)
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gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 1);
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else
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gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 0);
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}
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static struct imxmmc_platform_data sdhc1_pdata = {
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.init = mx31_3ds_sdhc1_init,
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.exit = mx31_3ds_sdhc1_exit,
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.setpower = mx31_3ds_sdhc1_setpower,
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};
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/*
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* Matrix keyboard
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*/
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static const uint32_t mx31_3ds_keymap[] = {
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KEY(0, 0, KEY_UP),
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KEY(0, 1, KEY_DOWN),
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KEY(1, 0, KEY_RIGHT),
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KEY(1, 1, KEY_LEFT),
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KEY(1, 2, KEY_ENTER),
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KEY(2, 0, KEY_F6),
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KEY(2, 1, KEY_F8),
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KEY(2, 2, KEY_F9),
|
|
KEY(2, 3, KEY_F10),
|
|
};
|
|
|
|
static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
|
|
.keymap = mx31_3ds_keymap,
|
|
.keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
|
|
};
|
|
|
|
/* Regulators */
|
|
static struct regulator_init_data pwgtx_init = {
|
|
.constraints = {
|
|
.boot_on = 1,
|
|
.always_on = 1,
|
|
},
|
|
};
|
|
|
|
static struct regulator_init_data gpo_init = {
|
|
.constraints = {
|
|
.boot_on = 1,
|
|
.always_on = 1,
|
|
}
|
|
};
|
|
|
|
static struct regulator_consumer_supply vmmc2_consumers[] = {
|
|
REGULATOR_SUPPLY("vmmc", "mxc-mmc.0"),
|
|
};
|
|
|
|
static struct regulator_init_data vmmc2_init = {
|
|
.constraints = {
|
|
.min_uV = 3000000,
|
|
.max_uV = 3000000,
|
|
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
|
REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(vmmc2_consumers),
|
|
.consumer_supplies = vmmc2_consumers,
|
|
};
|
|
|
|
static struct regulator_consumer_supply vmmc1_consumers[] = {
|
|
REGULATOR_SUPPLY("vcore", "spi0.0"),
|
|
REGULATOR_SUPPLY("cmos_2v8", "soc-camera-pdrv.0"),
|
|
};
|
|
|
|
static struct regulator_init_data vmmc1_init = {
|
|
.constraints = {
|
|
.min_uV = 2800000,
|
|
.max_uV = 2800000,
|
|
.apply_uV = 1,
|
|
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
|
REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
|
|
.consumer_supplies = vmmc1_consumers,
|
|
};
|
|
|
|
static struct regulator_consumer_supply vgen_consumers[] = {
|
|
REGULATOR_SUPPLY("vdd", "spi0.0"),
|
|
};
|
|
|
|
static struct regulator_init_data vgen_init = {
|
|
.constraints = {
|
|
.min_uV = 1800000,
|
|
.max_uV = 1800000,
|
|
.apply_uV = 1,
|
|
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
|
REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
|
|
.consumer_supplies = vgen_consumers,
|
|
};
|
|
|
|
static struct regulator_consumer_supply vvib_consumers[] = {
|
|
REGULATOR_SUPPLY("cmos_vcore", "soc-camera-pdrv.0"),
|
|
};
|
|
|
|
static struct regulator_init_data vvib_init = {
|
|
.constraints = {
|
|
.min_uV = 1300000,
|
|
.max_uV = 1300000,
|
|
.apply_uV = 1,
|
|
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
|
REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(vvib_consumers),
|
|
.consumer_supplies = vvib_consumers,
|
|
};
|
|
|
|
static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
|
|
{
|
|
.id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
|
|
.init_data = &pwgtx_init,
|
|
}, {
|
|
.id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
|
|
.init_data = &pwgtx_init,
|
|
}, {
|
|
|
|
.id = MC13783_REG_GPO1, /* Turn on 1.8V */
|
|
.init_data = &gpo_init,
|
|
}, {
|
|
.id = MC13783_REG_GPO3, /* Turn on 3.3V */
|
|
.init_data = &gpo_init,
|
|
}, {
|
|
.id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
|
|
.init_data = &vmmc2_init,
|
|
}, {
|
|
.id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
|
|
.init_data = &vmmc1_init,
|
|
}, {
|
|
.id = MC13783_REG_VGEN, /* Power LCD */
|
|
.init_data = &vgen_init,
|
|
}, {
|
|
.id = MC13783_REG_VVIB, /* Power CMOS */
|
|
.init_data = &vvib_init,
|
|
},
|
|
};
|
|
|
|
/* MC13783 */
|
|
static struct mc13xxx_codec_platform_data mx31_3ds_codec = {
|
|
.dac_ssi_port = MC13783_SSI1_PORT,
|
|
.adc_ssi_port = MC13783_SSI1_PORT,
|
|
};
|
|
|
|
static struct mc13xxx_platform_data mc13783_pdata = {
|
|
.regulators = {
|
|
.regulators = mx31_3ds_regulators,
|
|
.num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
|
|
},
|
|
.codec = &mx31_3ds_codec,
|
|
.flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC | MC13XXX_USE_CODEC,
|
|
|
|
};
|
|
|
|
static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = {
|
|
.flags = IMX_SSI_DMA | IMX_SSI_NET,
|
|
};
|
|
|
|
/* SPI */
|
|
static int spi0_internal_chipselect[] = {
|
|
MXC_SPI_CS(2),
|
|
};
|
|
|
|
static const struct spi_imx_master spi0_pdata __initconst = {
|
|
.chipselect = spi0_internal_chipselect,
|
|
.num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
|
|
};
|
|
|
|
static int spi1_internal_chipselect[] = {
|
|
MXC_SPI_CS(0),
|
|
MXC_SPI_CS(2),
|
|
};
|
|
|
|
static const struct spi_imx_master spi1_pdata __initconst = {
|
|
.chipselect = spi1_internal_chipselect,
|
|
.num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
|
|
};
|
|
|
|
static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
|
|
{
|
|
.modalias = "mc13783",
|
|
.max_speed_hz = 1000000,
|
|
.bus_num = 1,
|
|
.chip_select = 1, /* SS2 */
|
|
.platform_data = &mc13783_pdata,
|
|
/* irq number is run-time assigned */
|
|
.mode = SPI_CS_HIGH,
|
|
}, {
|
|
.modalias = "l4f00242t03",
|
|
.max_speed_hz = 5000000,
|
|
.bus_num = 0,
|
|
.chip_select = 0, /* SS2 */
|
|
.platform_data = &mx31_3ds_l4f00242t03_pdata,
|
|
},
|
|
};
|
|
|
|
/*
|
|
* NAND Flash
|
|
*/
|
|
static const struct mxc_nand_platform_data
|
|
mx31_3ds_nand_board_info __initconst = {
|
|
.width = 1,
|
|
.hw_ecc = 1,
|
|
#ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT
|
|
.flash_bbt = 1,
|
|
#endif
|
|
};
|
|
|
|
/*
|
|
* USB OTG
|
|
*/
|
|
|
|
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
|
|
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
|
|
|
|
#define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
|
|
#define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
|
|
|
|
static int mx31_3ds_usbotg_init(void)
|
|
{
|
|
int err;
|
|
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
|
|
|
|
err = gpio_request(USBOTG_RST_B, "otgusb-reset");
|
|
if (err) {
|
|
pr_err("Failed to request the USB OTG reset gpio\n");
|
|
return err;
|
|
}
|
|
|
|
err = gpio_direction_output(USBOTG_RST_B, 0);
|
|
if (err) {
|
|
pr_err("Failed to drive the USB OTG reset gpio\n");
|
|
goto usbotg_free_reset;
|
|
}
|
|
|
|
mdelay(1);
|
|
gpio_set_value(USBOTG_RST_B, 1);
|
|
return 0;
|
|
|
|
usbotg_free_reset:
|
|
gpio_free(USBOTG_RST_B);
|
|
return err;
|
|
}
|
|
|
|
static int mx31_3ds_otg_init(struct platform_device *pdev)
|
|
{
|
|
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
|
|
}
|
|
|
|
static int mx31_3ds_host2_init(struct platform_device *pdev)
|
|
{
|
|
int err;
|
|
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
|
|
mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
|
|
|
|
err = gpio_request(USBH2_RST_B, "usbh2-reset");
|
|
if (err) {
|
|
pr_err("Failed to request the USB Host 2 reset gpio\n");
|
|
return err;
|
|
}
|
|
|
|
err = gpio_direction_output(USBH2_RST_B, 0);
|
|
if (err) {
|
|
pr_err("Failed to drive the USB Host 2 reset gpio\n");
|
|
goto usbotg_free_reset;
|
|
}
|
|
|
|
mdelay(1);
|
|
gpio_set_value(USBH2_RST_B, 1);
|
|
|
|
mdelay(10);
|
|
|
|
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
|
|
|
|
usbotg_free_reset:
|
|
gpio_free(USBH2_RST_B);
|
|
return err;
|
|
}
|
|
|
|
static struct mxc_usbh_platform_data otg_pdata __initdata = {
|
|
.init = mx31_3ds_otg_init,
|
|
.portsc = MXC_EHCI_MODE_ULPI,
|
|
};
|
|
|
|
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
|
|
.init = mx31_3ds_host2_init,
|
|
.portsc = MXC_EHCI_MODE_ULPI,
|
|
};
|
|
|
|
static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
|
|
.operating_mode = FSL_USB2_DR_DEVICE,
|
|
.phy_mode = FSL_USB2_PHY_ULPI,
|
|
};
|
|
|
|
static bool otg_mode_host __initdata;
|
|
|
|
static int __init mx31_3ds_otg_mode(char *options)
|
|
{
|
|
if (!strcmp(options, "host"))
|
|
otg_mode_host = true;
|
|
else if (!strcmp(options, "device"))
|
|
otg_mode_host = false;
|
|
else
|
|
pr_info("otg_mode neither \"host\" nor \"device\". "
|
|
"Defaulting to device\n");
|
|
return 1;
|
|
}
|
|
__setup("otg_mode=", mx31_3ds_otg_mode);
|
|
|
|
static const struct imxuart_platform_data uart_pdata __initconst = {
|
|
.flags = IMXUART_HAVE_RTSCTS,
|
|
};
|
|
|
|
static const struct imxi2c_platform_data mx31_3ds_i2c0_data __initconst = {
|
|
.bitrate = 100000,
|
|
};
|
|
|
|
static struct platform_device *devices[] __initdata = {
|
|
&mx31_3ds_ov2640,
|
|
};
|
|
|
|
static void __init mx31_3ds_init(void)
|
|
{
|
|
int ret;
|
|
|
|
imx31_soc_init();
|
|
|
|
/* Configure SPI1 IOMUX */
|
|
mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true);
|
|
|
|
mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
|
|
"mx31_3ds");
|
|
|
|
imx31_add_imx_uart0(&uart_pdata);
|
|
imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
|
|
|
|
imx31_add_spi_imx1(&spi1_pdata);
|
|
mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
|
|
spi_register_board_info(mx31_3ds_spi_devs,
|
|
ARRAY_SIZE(mx31_3ds_spi_devs));
|
|
|
|
platform_add_devices(devices, ARRAY_SIZE(devices));
|
|
|
|
imx31_add_imx_keypad(&mx31_3ds_keymap_data);
|
|
|
|
mx31_3ds_usbotg_init();
|
|
if (otg_mode_host) {
|
|
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
|
ULPI_OTG_DRVVBUS_EXT);
|
|
if (otg_pdata.otg)
|
|
imx31_add_mxc_ehci_otg(&otg_pdata);
|
|
}
|
|
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
|
ULPI_OTG_DRVVBUS_EXT);
|
|
if (usbh2_pdata.otg)
|
|
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
|
|
|
|
if (!otg_mode_host)
|
|
imx31_add_fsl_usb2_udc(&usbotg_pdata);
|
|
|
|
if (mxc_expio_init(MX31_CS5_BASE_ADDR, IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)))
|
|
printk(KERN_WARNING "Init of the debug board failed, all "
|
|
"devices on the debug board are unusable.\n");
|
|
imx31_add_imx2_wdt();
|
|
imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
|
|
imx31_add_mxc_mmc(0, &sdhc1_pdata);
|
|
|
|
imx31_add_spi_imx0(&spi0_pdata);
|
|
imx31_add_ipu_core();
|
|
imx31_add_mx3_sdc_fb(&mx3fb_pdata);
|
|
|
|
/* CSI */
|
|
/* Camera power: default - off */
|
|
ret = gpio_request_array(mx31_3ds_camera_gpios,
|
|
ARRAY_SIZE(mx31_3ds_camera_gpios));
|
|
if (ret) {
|
|
pr_err("Failed to request camera gpios");
|
|
iclink_ov2640.power = NULL;
|
|
}
|
|
|
|
mx31_3ds_init_camera();
|
|
|
|
imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata);
|
|
|
|
imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
|
|
}
|
|
|
|
static void __init mx31_3ds_timer_init(void)
|
|
{
|
|
mx31_clocks_init(26000000);
|
|
}
|
|
|
|
static struct sys_timer mx31_3ds_timer = {
|
|
.init = mx31_3ds_timer_init,
|
|
};
|
|
|
|
static void __init mx31_3ds_reserve(void)
|
|
{
|
|
/* reserve MX31_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
|
|
mx3_camera_base = arm_memblock_steal(MX31_3DS_CAMERA_BUF_SIZE,
|
|
MX31_3DS_CAMERA_BUF_SIZE);
|
|
}
|
|
|
|
MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
|
|
/* Maintainer: Freescale Semiconductor, Inc. */
|
|
.atag_offset = 0x100,
|
|
.map_io = mx31_map_io,
|
|
.init_early = imx31_init_early,
|
|
.init_irq = mx31_init_irq,
|
|
.handle_irq = imx31_handle_irq,
|
|
.timer = &mx31_3ds_timer,
|
|
.init_machine = mx31_3ds_init,
|
|
.reserve = mx31_3ds_reserve,
|
|
.restart = mxc_restart,
|
|
MACHINE_END
|