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There are different kind of workarounds (those that modify registers that live in the context image, those that modify global registers, those that whitelist registers, etc...) and they have different requirements in terms of where they are applied and how. Also, by splitting them apart, it should be easier to decide where a new workaround should go. v2: - Add multiple MISSING_CASE - Rebased v3: - Rename mmio_workarounds to gt_workarounds (Chris, Mika) - Create empty placeholders for BDW and CHV GT WAs - Rebased v4: Rebased v5: - Rebased - FORCE_TO_NONPRIV register exists since BDW, so make a path for it to achieve universality, even if empty (Chris) Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> [ickle: appease checkpatch] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/1523376767-18480-2-git-send-email-oscar.mateo@intel.com
18 lines
419 B
C
18 lines
419 B
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2014-2018 Intel Corporation
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*/
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#ifndef _I915_WORKAROUNDS_H_
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#define _I915_WORKAROUNDS_H_
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int intel_ctx_workarounds_init(struct drm_i915_private *dev_priv);
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int intel_ctx_workarounds_emit(struct i915_request *rq);
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void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv);
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int intel_whitelist_workarounds_apply(struct intel_engine_cs *engine);
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#endif
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