![Rafał Miłecki](/assets/img/avatar_default.png)
Starting with commit 8947e396a8
("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
280 lines
5.9 KiB
Plaintext
280 lines
5.9 KiB
Plaintext
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx53.dtsi"
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/ {
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model = "Freescale i.MX53 Smart Mobile Reference Design Board";
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compatible = "fsl,imx53-smd", "fsl,imx53";
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memory {
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reg = <0x70000000 0x40000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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volume-up {
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label = "Volume Up";
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gpios = <&gpio2 14 0>;
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linux,code = <115>; /* KEY_VOLUMEUP */
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio2 15 0>;
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linux,code = <114>; /* KEY_VOLUMEDOWN */
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};
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};
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&esdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc2>;
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non-removable;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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fsl,spi-num-chipselects = <2>;
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cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
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status = "okay";
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zigbee: mc1323@0 {
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compatible = "fsl,mc1323";
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spi-max-frequency = <8000000>;
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reg = <0>;
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};
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flash: m25p32@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p32", "st,m25p", "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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reg = <1>;
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partition@0 {
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label = "U-Boot";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "Kernel";
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reg = <0x40000 0x3c0000>;
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};
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};
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};
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&esdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc3>;
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non-removable;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx53-smd {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
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MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
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MX53_PAD_EIM_EB2__GPIO2_30 0x80000000
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MX53_PAD_EIM_DA13__GPIO3_13 0x80000000
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MX53_PAD_EIM_D19__GPIO3_19 0x80000000
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MX53_PAD_KEY_ROW2__GPIO4_11 0x80000000
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MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
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MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
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MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
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>;
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};
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
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MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
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MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
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MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
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MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
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MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
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>;
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};
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pinctrl_esdhc2: esdhc2grp {
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fsl,pins = <
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MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
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MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
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MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
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MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
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MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
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MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
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>;
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};
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pinctrl_esdhc3: esdhc3grp {
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fsl,pins = <
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MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
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MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
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MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
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MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
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MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
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MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
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MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
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MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
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MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
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MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
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MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
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MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
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MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
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MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
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MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
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MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
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MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
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MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
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MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000
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MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
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MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
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MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
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MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
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MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
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MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
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MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
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>;
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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};
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magnetometer: mag3110@0e {
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compatible = "fsl,mag3110";
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reg = <0x0e>;
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};
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touchkey: mpr121@5a {
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compatible = "fsl,mpr121";
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reg = <0x5a>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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accelerometer: mma8450@1c {
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compatible = "fsl,mma8450";
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reg = <0x1c>;
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};
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camera: ov5642@3c {
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compatible = "ovti,ov5642";
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reg = <0x3c>;
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};
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pmic: dialog@48 {
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compatible = "dlg,da9053", "dlg,da9052";
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reg = <0x48>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "rmii";
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phy-reset-gpios = <&gpio7 6 0>;
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status = "okay";
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};
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