6d1c244803
As usual, the bulk of this release is again DT file contents. There's a huge number of changes here, and it's challenging to give a crisp overview of just what is in here. To start with: New boards: - TI-based DM3730 from LogicPD (Torpedo) - Cosmic+ M4 (nommu) initial support (Freescale Vybrid) - Raspberry Pi 2 DT files - Watchdog on Meson8b - Veyron-mickey (ASUS Chromebit) DTS - Rockchip rk3228 SoC and eval board - Sigma Designs Tango4 Improvements: - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files - Misc new devices for Rockchip rk3036 and rk3288 - Allwinner updates for misc SoCs and systems ... and a _large_ number of other changes across the field. Devices added to SoC DTSI and board DTS files for a number of SoC vendors, new product boards on already-supported SoCs, cleanups and refactorings of existing DTS/DTSI files and a bunch of other changes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWnr6fAAoJEIwa5zzehBx3p+gP+wYLUqXjCYgyu6oJPxJbWghj gPc4QJmhVlAWTqvE7Ut7RumWzGa7nUEH2QF9tiCLbDAw8727HJXhRHknFwaCsX45 BsvFQaKY99ClfUhoSI9GRa8e2jEArjzEPqkynHW/8FM20qWaj/Z8DDfixG75gR8u onrMw6kprNGwmyQwqu5zLDXhUBCQIs1xRRSabUjV1P5420dbBaGgtmQrdj7k+JDt wo9SKiG6d9CSYil3r7BC+0JwzbKNBxRGs2vv1BJOfbZ3Lj+uC0vj1AxoF/p7dOHy ohuvt7UwwtoUzzFMcMUo7E8qxl9u6bbnPDlUoRF7DVVi5SQoeZd8BOZXOdLRN2OQ qtgsmziDxtvh7Ydj6i89D69x7+GurAFcP8Aturprc5Zd5lO70PAYBD379IhIZ8y1 MVJltIEeuUZo7BaVBCHWQY9jJRtI3bAU6JdFPrFROsuo810IYd72Wbb1ZCfF7SV7 nBRvV7e71VQxb48c3p8Et5FntHuXfUlhkMrQ7Cb+2ugB/diGgZB9NfrZbP3Azv7f A5Ey9tNHaOCUxzYDCw80jTa7OwVWNJf2kOT1yikASk3vODKLv4E5YQ2DULnObWG7 iRmLYuuGka4sMs0ZjpV3kaqs+8rWu08x2rEr5X0wfU+DalIzUWA2oDKSgPLJoacV gXKP039CIxQAiottcppA =XDLa -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "As usual, the bulk of this release is again DT file contents. There's a huge number of changes here, and it's challenging to give a crisp overview of just what is in here. To start with: New boards: - TI-based DM3730 from LogicPD (Torpedo) - Cosmic+ M4 (nommu) initial support (Freescale Vybrid) - Raspberry Pi 2 DT files - Watchdog on Meson8b - Veyron-mickey (ASUS Chromebit) DTS - Rockchip rk3228 SoC and eval board - Sigma Designs Tango4 Improvements: - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files - Misc new devices for Rockchip rk3036 and rk3288 - Allwinner updates for misc SoCs and systems ... and a _large_ number of other changes across the field. Devices added to SoC DTSI and board DTS files for a number of SoC vendors, new product boards on already-supported SoCs, cleanups and refactorings of existing DTS/DTSI files and a bunch of other changes" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits) ARM: dts: compulab: add new board description ARM: versatile: add the syscon LEDs to the DT dts: vt8500: Fix errors in SDHC node for WM8505 ARM: dts: imx6q: clean up unused ipu2grp ARM: dts: silk: Add compatible property to "partitions" node ARM: dts: gose: Add compatible property to "partitions" node ARM: dts: porter: Add compatible property to "partitions" node ARM: dts: koelsch: Add compatible property to "partitions" node ARM: dts: lager: Add compatible property to "partitions" node ARM: dts: bockw: Add compatible property to "partitions" node ARM: dts: meson8b: Add watchdog node Documentation: watchdog: Add new bindings for meson8b ARM: meson: Add status LED for Odroid-C1 ARM: dts: uniphier: fix a typo in comment block ARM: bcm2835: Add the auxiliary clocks to the device tree. ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT. ARM: bcm2835: Split the DT for peripherals from the DT for the CPU ARM: realview: set up cache correctly on the PB11MPCore ARM: dts: Unify G2D device node with other devices on exynos4 ...
357 lines
7.5 KiB
Plaintext
357 lines
7.5 KiB
Plaintext
/dts-v1/;
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/include/ "skeleton.dtsi"
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/ {
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model = "ARM Versatile AB";
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compatible = "arm,versatile-ab";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&vic>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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i2c0 = &i2c0;
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};
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chosen {
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stdout-path = &uart0;
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};
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memory {
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reg = <0x0 0x08000000>;
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};
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xtal24mhz: xtal24mhz@24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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core-module@10000000 {
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compatible = "arm,core-module-versatile", "syscon", "simple-mfd";
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reg = <0x10000000 0x200>;
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led@08.0 {
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compatible = "register-bit-led";
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offset = <0x08>;
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mask = <0x01>;
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label = "versatile:0";
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linux,default-trigger = "heartbeat";
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default-state = "on";
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};
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led@08.1 {
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compatible = "register-bit-led";
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offset = <0x08>;
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mask = <0x02>;
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label = "versatile:1";
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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led@08.2 {
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compatible = "register-bit-led";
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offset = <0x08>;
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mask = <0x04>;
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label = "versatile:2";
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linux,default-trigger = "cpu0";
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default-state = "off";
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};
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led@08.3 {
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compatible = "register-bit-led";
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offset = <0x08>;
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mask = <0x08>;
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label = "versatile:3";
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default-state = "off";
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};
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led@08.4 {
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compatible = "register-bit-led";
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offset = <0x08>;
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mask = <0x10>;
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label = "versatile:4";
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default-state = "off";
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};
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led@08.5 {
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compatible = "register-bit-led";
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offset = <0x08>;
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mask = <0x20>;
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label = "versatile:5";
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default-state = "off";
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};
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led@08.6 {
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compatible = "register-bit-led";
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offset = <0x08>;
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mask = <0x40>;
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label = "versatile:6";
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default-state = "off";
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};
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led@08.7 {
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compatible = "register-bit-led";
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offset = <0x08>;
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mask = <0x80>;
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label = "versatile:7";
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default-state = "off";
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};
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/* OSC1 on AB, OSC4 on PB */
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osc1: cm_aux_osc@24M {
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#clock-cells = <0>;
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compatible = "arm,versatile-cm-auxosc";
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clocks = <&xtal24mhz>;
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};
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/* The timer clock is the 24 MHz oscillator divided to 1MHz */
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timclk: timclk@1M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <24>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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pclk: pclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <1>;
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clock-mult = <1>;
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clocks = <&xtal24mhz>;
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};
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};
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flash@34000000 {
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compatible = "arm,versatile-flash";
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reg = <0x34000000 0x4000000>;
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bank-width = <4>;
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};
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i2c0: i2c@10002000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "arm,versatile-i2c";
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reg = <0x10002000 0x1000>;
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rtc@68 {
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compatible = "dallas,ds1338";
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reg = <0x68>;
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};
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};
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net@10010000 {
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compatible = "smsc,lan91c111";
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reg = <0x10010000 0x10000>;
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interrupts = <25>;
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};
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lcd@10008000 {
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compatible = "arm,versatile-lcd";
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reg = <0x10008000 0x1000>;
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};
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amba {
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compatible = "arm,amba-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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vic: intc@10140000 {
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compatible = "arm,versatile-vic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x10140000 0x1000>;
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clear-mask = <0xffffffff>;
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valid-mask = <0xffffffff>;
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};
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sic: intc@10003000 {
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compatible = "arm,versatile-sic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x10003000 0x1000>;
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interrupt-parent = <&vic>;
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interrupts = <31>; /* Cascaded to vic */
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clear-mask = <0xffffffff>;
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/*
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* Valid interrupt lines mask according to
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* table 4-36 page 4-50 of ARM DUI 0225D
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*/
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valid-mask = <0x0760031b>;
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};
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dma@10130000 {
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compatible = "arm,pl081", "arm,primecell";
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reg = <0x10130000 0x1000>;
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interrupts = <17>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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uart0: uart@101f1000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f1000 0x1000>;
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interrupts = <12>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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uart1: uart@101f2000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f2000 0x1000>;
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interrupts = <13>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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uart2: uart@101f3000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x101f3000 0x1000>;
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interrupts = <14>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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smc@10100000 {
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compatible = "arm,primecell";
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reg = <0x10100000 0x1000>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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mpmc@10110000 {
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compatible = "arm,primecell";
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reg = <0x10110000 0x1000>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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display@10120000 {
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compatible = "arm,pl110", "arm,primecell";
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reg = <0x10120000 0x1000>;
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interrupts = <16>;
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clocks = <&osc1>, <&pclk>;
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clock-names = "clcd", "apb_pclk";
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};
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sctl@101e0000 {
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compatible = "arm,primecell";
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reg = <0x101e0000 0x1000>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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watchdog@101e1000 {
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compatible = "arm,primecell";
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reg = <0x101e1000 0x1000>;
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interrupts = <0>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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timer@101e2000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x101e2000 0x1000>;
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interrupts = <4>;
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clocks = <&timclk>, <&timclk>, <&pclk>;
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clock-names = "timer0", "timer1", "apb_pclk";
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};
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timer@101e3000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x101e3000 0x1000>;
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interrupts = <5>;
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clocks = <&timclk>, <&timclk>, <&pclk>;
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clock-names = "timer0", "timer1", "apb_pclk";
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};
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gpio0: gpio@101e4000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x101e4000 0x1000>;
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gpio-controller;
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interrupts = <6>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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gpio1: gpio@101e5000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x101e5000 0x1000>;
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interrupts = <7>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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rtc@101e8000 {
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compatible = "arm,pl030", "arm,primecell";
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reg = <0x101e8000 0x1000>;
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interrupts = <10>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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sci@101f0000 {
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compatible = "arm,primecell";
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reg = <0x101f0000 0x1000>;
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interrupts = <15>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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ssp@101f4000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x101f4000 0x1000>;
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interrupts = <11>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "SSPCLK", "apb_pclk";
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};
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fpga {
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compatible = "arm,versatile-fpga", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x10000000 0x10000>;
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sysreg@0 {
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compatible = "arm,versatile-sysreg", "syscon";
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reg = <0x00000 0x1000>;
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};
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aaci@4000 {
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compatible = "arm,primecell";
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reg = <0x4000 0x1000>;
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interrupts = <24>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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mmc@5000 {
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compatible = "arm,pl180", "arm,primecell";
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reg = <0x5000 0x1000>;
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interrupts-extended = <&vic 22 &sic 1>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "mclk", "apb_pclk";
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};
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kmi@6000 {
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x6000 0x1000>;
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interrupt-parent = <&sic>;
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interrupts = <3>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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kmi@7000 {
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x7000 0x1000>;
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interrupt-parent = <&sic>;
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interrupts = <4>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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};
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};
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};
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