c91e02bd97
Use perf framework to manage hardware instruction and data breakpoints. Add two new ptrace calls: PTRACE_GETHBPREGS and PTRACE_SETHBPREGS to query and set instruction and data breakpoints. Address bit 0 choose instruction (0) or data (1) break register, bits 31..1 are the register number. Both calls transfer two 32-bit words: address (0) and control (1). Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set. Data breakpoint control word bit 31 is 'trigger on store', bit 30 is 'trigger on load, bits 29..0 are length. Length 0 is used to clear a breakpoint. To set a breakpoint length must be a power of 2 in the range 1..64 and the address must be length-aligned. Introduce new thread_info flag: TIF_DB_DISABLED. Set it if debug exception is raised by the kernel code accessing watched userspace address and disable corresponding data breakpoint. On exit to userspace check that flag and, if set, restore all data breakpoints. Handle debug exceptions raised with PS.EXCM set. This may happen when window overflow/underflow handler or fast exception handler hits data breakpoint, in which case save and disable all data breakpoints, single-step faulting instruction and restore data breakpoints. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
138 lines
3.6 KiB
C
138 lines
3.6 KiB
C
/*
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* include/asm-xtensa/thread_info.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_THREAD_INFO_H
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#define _XTENSA_THREAD_INFO_H
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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# include <asm/processor.h>
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#endif
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/*
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* low level task data that entry.S needs immediate access to
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* - this struct should fit entirely inside of one cache line
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* - this struct shares the supervisor stack pages
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* - if the contents of this structure are changed, the assembly constants
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* must also be changed
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*/
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#ifndef __ASSEMBLY__
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#if XTENSA_HAVE_COPROCESSORS
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typedef struct xtregs_coprocessor {
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xtregs_cp0_t cp0;
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xtregs_cp1_t cp1;
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xtregs_cp2_t cp2;
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xtregs_cp3_t cp3;
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xtregs_cp4_t cp4;
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xtregs_cp5_t cp5;
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xtregs_cp6_t cp6;
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xtregs_cp7_t cp7;
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} xtregs_coprocessor_t;
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#endif
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struct thread_info {
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struct task_struct *task; /* main task structure */
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unsigned long flags; /* low level flags */
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unsigned long status; /* thread-synchronous flags */
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__u32 cpu; /* current CPU */
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__s32 preempt_count; /* 0 => preemptable,< 0 => BUG*/
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mm_segment_t addr_limit; /* thread address space */
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unsigned long cpenable;
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/* Allocate storage for extra user states and coprocessor states. */
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#if XTENSA_HAVE_COPROCESSORS
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xtregs_coprocessor_t xtregs_cp;
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#endif
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xtregs_user_t xtregs_user;
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};
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#endif
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/*
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* macros/functions for gaining access to the thread information structure
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*/
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#ifndef __ASSEMBLY__
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#define INIT_THREAD_INFO(tsk) \
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{ \
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.task = &tsk, \
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.flags = 0, \
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.cpu = 0, \
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.preempt_count = INIT_PREEMPT_COUNT, \
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.addr_limit = KERNEL_DS, \
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}
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#define init_thread_info (init_thread_union.thread_info)
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#define init_stack (init_thread_union.stack)
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/* how to get the thread information struct from C */
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static inline struct thread_info *current_thread_info(void)
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{
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struct thread_info *ti;
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__asm__("extui %0,a1,0,13\n\t"
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"xor %0, a1, %0" : "=&r" (ti) : );
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return ti;
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}
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#else /* !__ASSEMBLY__ */
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/* how to get the thread information struct from ASM */
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#define GET_THREAD_INFO(reg,sp) \
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extui reg, sp, 0, 13; \
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xor reg, sp, reg
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#endif
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/*
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* thread information flags
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* - these are process state flags that various assembly files may need to access
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* - pending work-to-be-done flags are in LSW
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* - other flags in MSW
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*/
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#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
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#define TIF_SIGPENDING 1 /* signal pending */
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#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
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#define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */
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#define TIF_MEMDIE 5 /* is terminating due to OOM killer */
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#define TIF_RESTORE_SIGMASK 6 /* restore signal mask in do_signal() */
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#define TIF_NOTIFY_RESUME 7 /* callback before returning to user */
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#define TIF_DB_DISABLED 8 /* debug trap disabled for syscall */
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#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
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#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
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#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
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#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
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#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
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#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
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/*
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* Thread-synchronous status.
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*
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* This is different from the flags in that nobody else
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* ever touches our thread-synchronous status, so we don't
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* have to worry about atomic accesses.
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*/
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#define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */
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#define THREAD_SIZE 8192 //(2*PAGE_SIZE)
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#define THREAD_SIZE_ORDER 1
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#endif /* __KERNEL__ */
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#endif /* _XTENSA_THREAD_INFO */
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