![Andy Shevchenko](/assets/img/avatar_default.png)
Intel Merrifield platform contains Intel integrated DMA (iDMA 32-bit) which has a slightly different register mapping, e.g. some bits in CTL_* and CFG_* channel registers, and has to use platform data since there is no autoconfiguration. The iDMA 32-bit specification is available in the publicly available documentation for Intel Braswell and BayTrail SoCs as LPE Audio DMA. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
150 lines
3.3 KiB
C
150 lines
3.3 KiB
C
/*
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* PCI driver for the Synopsys DesignWare DMA Controller
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*
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* Copyright (C) 2013 Intel Corporation
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/device.h>
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#include "internal.h"
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static struct dw_dma_platform_data mrfld_pdata = {
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.nr_channels = 8,
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.is_private = true,
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.is_memcpy = true,
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.is_idma32 = true,
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.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
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.chan_priority = CHAN_PRIORITY_ASCENDING,
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.block_size = 131071,
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.nr_masters = 1,
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.data_width = {4},
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};
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static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
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{
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const struct dw_dma_platform_data *pdata = (void *)pid->driver_data;
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struct dw_dma_chip *chip;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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ret = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
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if (ret) {
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dev_err(&pdev->dev, "I/O memory remapping failed\n");
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return ret;
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}
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pci_set_master(pdev);
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pci_try_set_mwi(pdev);
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ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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chip->dev = &pdev->dev;
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chip->id = pdev->devfn;
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chip->regs = pcim_iomap_table(pdev)[0];
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chip->irq = pdev->irq;
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chip->pdata = pdata;
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ret = dw_dma_probe(chip);
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if (ret)
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return ret;
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pci_set_drvdata(pdev, chip);
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return 0;
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}
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static void dw_pci_remove(struct pci_dev *pdev)
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{
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struct dw_dma_chip *chip = pci_get_drvdata(pdev);
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int ret;
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ret = dw_dma_remove(chip);
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if (ret)
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dev_warn(&pdev->dev, "can't remove device properly: %d\n", ret);
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}
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#ifdef CONFIG_PM_SLEEP
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static int dw_pci_suspend_late(struct device *dev)
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{
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struct pci_dev *pci = to_pci_dev(dev);
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struct dw_dma_chip *chip = pci_get_drvdata(pci);
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return dw_dma_disable(chip);
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};
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static int dw_pci_resume_early(struct device *dev)
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{
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struct pci_dev *pci = to_pci_dev(dev);
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struct dw_dma_chip *chip = pci_get_drvdata(pci);
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return dw_dma_enable(chip);
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};
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#endif /* CONFIG_PM_SLEEP */
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static const struct dev_pm_ops dw_pci_dev_pm_ops = {
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SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_pci_suspend_late, dw_pci_resume_early)
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};
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static const struct pci_device_id dw_pci_id_table[] = {
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/* Medfield (GPDMA) */
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{ PCI_VDEVICE(INTEL, 0x0827) },
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/* BayTrail */
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{ PCI_VDEVICE(INTEL, 0x0f06) },
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{ PCI_VDEVICE(INTEL, 0x0f40) },
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/* Merrifield iDMA 32-bit (GPDMA) */
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{ PCI_VDEVICE(INTEL, 0x11a2), (kernel_ulong_t)&mrfld_pdata },
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/* Braswell */
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{ PCI_VDEVICE(INTEL, 0x2286) },
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{ PCI_VDEVICE(INTEL, 0x22c0) },
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/* Haswell */
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{ PCI_VDEVICE(INTEL, 0x9c60) },
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/* Broadwell */
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{ PCI_VDEVICE(INTEL, 0x9ce0) },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, dw_pci_id_table);
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static struct pci_driver dw_pci_driver = {
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.name = "dw_dmac_pci",
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.id_table = dw_pci_id_table,
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.probe = dw_pci_probe,
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.remove = dw_pci_remove,
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.driver = {
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.pm = &dw_pci_dev_pm_ops,
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},
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};
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module_pci_driver(dw_pci_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller PCI driver");
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MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
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