c06e836ada
Resetting these SoCs requires no real magic. The code is straight forward. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4891/
45 lines
979 B
C
45 lines
979 B
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/pm.h>
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#include <linux/io.h>
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#include <asm/reboot.h>
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#include <asm/mach-ralink/ralink_regs.h>
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/* Reset Control */
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#define SYSC_REG_RESET_CTRL 0x034
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#define RSTCTL_RESET_SYSTEM BIT(0)
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static void ralink_restart(char *command)
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{
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local_irq_disable();
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rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
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unreachable();
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}
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static void ralink_halt(void)
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{
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local_irq_disable();
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unreachable();
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}
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static int __init mips_reboot_setup(void)
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{
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_machine_restart = ralink_restart;
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_machine_halt = ralink_halt;
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pm_power_off = ralink_halt;
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return 0;
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}
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arch_initcall(mips_reboot_setup);
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