![Roel Kluin](/assets/img/avatar_default.png)
n_val should be assigned to n_val attribute of HUB chip. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
117 lines
3.3 KiB
C
117 lines
3.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* SGI UV Core Functions
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*
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* Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/module.h>
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#include <linux/percpu.h>
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#include <asm/sn/simulator.h>
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#include <asm/uv/uv_mmrs.h>
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#include <asm/uv/uv_hub.h>
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DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
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EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
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#ifdef CONFIG_IA64_SGI_UV
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int sn_prom_type;
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long sn_partition_id;
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EXPORT_SYMBOL(sn_partition_id);
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long sn_coherency_id;
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EXPORT_SYMBOL_GPL(sn_coherency_id);
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long sn_region_size;
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EXPORT_SYMBOL(sn_region_size);
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#endif
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struct redir_addr {
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unsigned long redirect;
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unsigned long alias;
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};
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#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
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static __initdata struct redir_addr redir_addrs[] = {
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{UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG},
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{UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG},
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{UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG},
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};
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static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size)
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{
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union uvh_si_alias0_overlay_config_u alias;
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union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect;
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int i;
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for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) {
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alias.v = uv_read_local_mmr(redir_addrs[i].alias);
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if (alias.s.base == 0) {
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*size = (1UL << alias.s.m_alias);
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redirect.v = uv_read_local_mmr(redir_addrs[i].redirect);
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*base = (unsigned long)redirect.s.dest_base << DEST_SHIFT;
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return;
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}
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}
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BUG();
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}
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void __init uv_setup(char **cmdline_p)
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{
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union uvh_si_addr_map_config_u m_n_config;
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union uvh_node_id_u node_id;
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unsigned long gnode_upper;
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int nid, cpu, m_val, n_val;
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unsigned long mmr_base, lowmem_redir_base, lowmem_redir_size;
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if (IS_MEDUSA()) {
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lowmem_redir_base = 0;
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lowmem_redir_size = 0;
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node_id.v = 0;
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m_n_config.s.m_skt = 37;
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m_n_config.s.n_skt = 0;
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mmr_base = 0;
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#if 0
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/* Need BIOS calls - TDB */
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if (!ia64_sn_is_fake_prom())
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sn_prom_type = 1;
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else
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#endif
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sn_prom_type = 2;
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printk(KERN_INFO "Running on medusa with %s PROM\n",
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(sn_prom_type == 1) ? "real" : "fake");
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} else {
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get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
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node_id.v = uv_read_local_mmr(UVH_NODE_ID);
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m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
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mmr_base =
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uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
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~UV_MMR_ENABLE;
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}
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m_val = m_n_config.s.m_skt;
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n_val = m_n_config.s.n_skt;
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printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base);
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gnode_upper = (((unsigned long)node_id.s.node_id) &
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~((1 << n_val) - 1)) << m_val;
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for_each_present_cpu(cpu) {
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nid = cpu_to_node(cpu);
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uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;
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uv_cpu_hub_info(cpu)->lowmem_remap_top =
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lowmem_redir_base + lowmem_redir_size;
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uv_cpu_hub_info(cpu)->m_val = m_val;
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uv_cpu_hub_info(cpu)->n_val = n_val;
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uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) -1;
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uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
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uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
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uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
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uv_cpu_hub_info(cpu)->coherency_domain_number = 0;/* ZZZ */
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printk(KERN_DEBUG "UV cpu %d, nid %d\n", cpu, nid);
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}
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}
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