Icenowy Zheng d86e63e1f0 arm64: allwinner: h5: fix pinctrl IRQs ... The pin controller of H5 has three IRQs at the chip's GIC, which represents three banks of pinctrl IRQs. However, the device tree used to miss the third IRQ of the pin controller, which makes the PG bank IRQ not usable. Add the missing IRQ to the pinctrl node. Fixes: 4e36de179f ("arm64: allwinner: h5: add Allwinner H5 .dtsi") Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Chen-Yu Tsai <wens@csie.org>		2017-08-14 14:18:21 +08:00
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Makefile	Allwinner H5 DT changes for 4.13	2017-06-18 20:45:17 -07:00
sun50i-a64-bananapi-m64.dts	arm64: allwinner: a64: bananapi-m64: add missing ethernet0 alias	2017-08-10 14:00:10 +08:00
sun50i-a64-orangepi-win.dts	arm64: allwinner: a64: Add initial Orangepi Win/WinPlus support	2017-06-13 09:17:44 +02:00
sun50i-a64-pine64-plus.dts	arm64: allwinner: pine64-plus: Enable dwmac-sun8i	2017-06-07 15:25:51 +02:00
sun50i-a64-pine64.dts	arm64: allwinner: a64: pine64: add missing ethernet0 alias	2017-08-10 14:01:38 +08:00
sun50i-a64-sopine-baseboard.dts	arm64: allwinner: a64: sopine: add missing ethernet0 alias	2017-08-10 14:02:38 +08:00
sun50i-a64-sopine.dtsi	arm64: allwinner: a64: add DTSI file for SoPine SoM	2017-06-07 15:25:46 +02:00
sun50i-a64.dtsi	arm64: allwinner: sun50i-a64: Correct emac register size	2017-07-27 21:18:43 +08:00
sun50i-h5-nanopi-neo2.dts	arm64: allwinner: h5: enable dwmac-sun8i for Nano Pi NEO2	2017-06-07 15:26:50 +02:00
sun50i-h5-orangepi-pc2.dts	arm64: allwinner: orangepi-pc2: Enable dwmac-sun8i	2017-06-06 20:12:20 +02:00
sun50i-h5-orangepi-prime.dts	arm64: allwinner: h5: enable dwmac-sun8i for Orange Pi Prime	2017-06-07 15:26:45 +02:00
sun50i-h5-orangepi-zero-plus2.dts	arm64: allwinner: h5: Add initial Orangepi Zero Plus 2 support	2017-06-13 09:18:31 +02:00
sun50i-h5.dtsi	arm64: allwinner: h5: fix pinctrl IRQs	2017-08-14 14:18:21 +08:00