![Gavin Shan](/assets/img/avatar_default.png)
The patch defines PCI error types and functions in uapi/asm/eeh.h and exports function eeh_pe_inject_err(), which will be called by VFIO driver to inject the specified PCI error to the indicated PE for testing purpose. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
57 lines
2.1 KiB
C
57 lines
2.1 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2015
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*
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* Authors: Gavin Shan <gwshan@linux.vnet.ibm.com>
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*/
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#ifndef _ASM_POWERPC_EEH_H
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#define _ASM_POWERPC_EEH_H
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/* PE states */
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#define EEH_PE_STATE_NORMAL 0 /* Normal state */
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#define EEH_PE_STATE_RESET 1 /* PE reset asserted */
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#define EEH_PE_STATE_STOPPED_IO_DMA 2 /* Frozen PE */
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#define EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */
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#define EEH_PE_STATE_UNAVAIL 5 /* Unavailable */
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/* EEH error types and functions */
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#define EEH_ERR_TYPE_32 0 /* 32-bits error */
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#define EEH_ERR_TYPE_64 1 /* 64-bits error */
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#define EEH_ERR_FUNC_MIN 0
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#define EEH_ERR_FUNC_LD_MEM_ADDR 0 /* Memory load */
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#define EEH_ERR_FUNC_LD_MEM_DATA 1
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#define EEH_ERR_FUNC_LD_IO_ADDR 2 /* IO load */
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#define EEH_ERR_FUNC_LD_IO_DATA 3
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#define EEH_ERR_FUNC_LD_CFG_ADDR 4 /* Config load */
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#define EEH_ERR_FUNC_LD_CFG_DATA 5
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#define EEH_ERR_FUNC_ST_MEM_ADDR 6 /* Memory store */
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#define EEH_ERR_FUNC_ST_MEM_DATA 7
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#define EEH_ERR_FUNC_ST_IO_ADDR 8 /* IO store */
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#define EEH_ERR_FUNC_ST_IO_DATA 9
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#define EEH_ERR_FUNC_ST_CFG_ADDR 10 /* Config store */
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#define EEH_ERR_FUNC_ST_CFG_DATA 11
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#define EEH_ERR_FUNC_DMA_RD_ADDR 12 /* DMA read */
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#define EEH_ERR_FUNC_DMA_RD_DATA 13
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#define EEH_ERR_FUNC_DMA_RD_MASTER 14
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#define EEH_ERR_FUNC_DMA_RD_TARGET 15
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#define EEH_ERR_FUNC_DMA_WR_ADDR 16 /* DMA write */
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#define EEH_ERR_FUNC_DMA_WR_DATA 17
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#define EEH_ERR_FUNC_DMA_WR_MASTER 18
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#define EEH_ERR_FUNC_DMA_WR_TARGET 19
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#define EEH_ERR_FUNC_MAX 19
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#endif /* _ASM_POWERPC_EEH_H */
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